MdePkg/Include/IndustryStandard/Acpi65.h

   1 /** @file
   2   ACPI 6.5 definitions from the ACPI Specification Revision 6.5 Aug, 2022.
   3
   4   Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
   5   Copyright (c) 2019 - 2021, ARM Ltd. All rights reserved.<BR>
   6   Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.<BR>
   7
   8   SPDX-License-Identifier: BSD-2-Clause-Patent
   9 **/
  10
  11 #ifndef ACPI_6_5_H_
  12 #define ACPI_6_5_H_
  13
  14 #include <IndustryStandard/Acpi64.h>
  15
  16 //
  17 // Ensure proper structure formats
  18 //
  19 #pragma pack(1)
  20
  21 ///
  22 /// ACPI 6.5 Generic Address Space definition
  23 ///
  24 typedef struct {
  25   UINT8     AddressSpaceId;
  26   UINT8     RegisterBitWidth;
  27   UINT8     RegisterBitOffset;
  28   UINT8     AccessSize;
  29   UINT64    Address;
  30 } EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE;
  31
  32 //
  33 // Generic Address Space Address IDs
  34 //
  35 #define EFI_ACPI_6_5_SYSTEM_MEMORY                   0x00
  36 #define EFI_ACPI_6_5_SYSTEM_IO                       0x01
  37 #define EFI_ACPI_6_5_PCI_CONFIGURATION_SPACE         0x02
  38 #define EFI_ACPI_6_5_EMBEDDED_CONTROLLER             0x03
  39 #define EFI_ACPI_6_5_SMBUS                           0x04
  40 #define EFI_ACPI_6_5_SYSTEM_CMOS                     0x05
  41 #define EFI_ACPI_6_5_PCI_BAR_TARGET                  0x06
  42 #define EFI_ACPI_6_5_IPMI                            0x07
  43 #define EFI_ACPI_6_5_GENERAL_PURPOSE_IO              0x08
  44 #define EFI_ACPI_6_5_GENERIC_SERIAL_BUS              0x09
  45 #define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL  0x0A
  46 #define EFI_ACPI_6_5_FUNCTIONAL_FIXED_HARDWARE       0x7F
  47
  48 //
  49 // Generic Address Space Access Sizes
  50 //
  51 #define EFI_ACPI_6_5_UNDEFINED  0
  52 #define EFI_ACPI_6_5_BYTE       1
  53 #define EFI_ACPI_6_5_WORD       2
  54 #define EFI_ACPI_6_5_DWORD      3
  55 #define EFI_ACPI_6_5_QWORD      4
  56
  57 //
  58 // ACPI 6.5 table structures
  59 //
  60
  61 ///
  62 /// Root System Description Pointer Structure
  63 ///
  64 typedef struct {
  65   UINT64    Signature;
  66   UINT8     Checksum;
  67   UINT8     OemId[6];
  68   UINT8     Revision;
  69   UINT32    RsdtAddress;
  70   UINT32    Length;
  71   UINT64    XsdtAddress;
  72   UINT8     ExtendedChecksum;
  73   UINT8     Reserved[3];
  74 } EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER;
  75
  76 ///
  77 /// RSD_PTR Revision (as defined in ACPI 6.5 spec.)
  78 ///
  79 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION  0x02 ///< ACPISpec (Revision 6.5) says current value is 2
  80
  81 ///
  82 /// Common table header, this prefaces all ACPI tables, including FACS, but
  83 /// excluding the RSD PTR structure
  84 ///
  85 typedef struct {
  86   UINT32    Signature;
  87   UINT32    Length;
  88 } EFI_ACPI_6_5_COMMON_HEADER;
  89
  90 //
  91 // Root System Description Table
  92 // No definition needed as it is a common description table header, the same with
  93 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.
  94 //
  95
  96 ///
  97 /// RSDT Revision (as defined in ACPI 6.5 spec.)
  98 ///
  99 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION  0x01
 100
 101 //
 102 // Extended System Description Table
 103 // No definition needed as it is a common description table header, the same with
 104 // EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.
 105 //
 106
 107 ///
 108 /// XSDT Revision (as defined in ACPI 6.5 spec.)
 109 ///
 110 #define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION  0x01
 111
 112 ///
 113 /// Fixed ACPI Description Table Structure (FADT)
 114 ///
 115 typedef struct {
 116   EFI_ACPI_DESCRIPTION_HEADER               Header;
 117   UINT32                                    FirmwareCtrl;
 118   UINT32                                    Dsdt;
 119   UINT8                                     Reserved0;
 120   UINT8                                     PreferredPmProfile;
 121   UINT16                                    SciInt;
 122   UINT32                                    SmiCmd;
 123   UINT8                                     AcpiEnable;
 124   UINT8                                     AcpiDisable;
 125   UINT8                                     S4BiosReq;
 126   UINT8                                     PstateCnt;
 127   UINT32                                    Pm1aEvtBlk;
 128   UINT32                                    Pm1bEvtBlk;
 129   UINT32                                    Pm1aCntBlk;
 130   UINT32                                    Pm1bCntBlk;
 131   UINT32                                    Pm2CntBlk;
 132   UINT32                                    PmTmrBlk;
 133   UINT32                                    Gpe0Blk;
 134   UINT32                                    Gpe1Blk;
 135   UINT8                                     Pm1EvtLen;
 136   UINT8                                     Pm1CntLen;
 137   UINT8                                     Pm2CntLen;
 138   UINT8                                     PmTmrLen;
 139   UINT8                                     Gpe0BlkLen;
 140   UINT8                                     Gpe1BlkLen;
 141   UINT8                                     Gpe1Base;
 142   UINT8                                     CstCnt;
 143   UINT16                                    PLvl2Lat;
 144   UINT16                                    PLvl3Lat;
 145   UINT16                                    FlushSize;
 146   UINT16                                    FlushStride;
 147   UINT8                                     DutyOffset;
 148   UINT8                                     DutyWidth;
 149   UINT8                                     DayAlrm;
 150   UINT8                                     MonAlrm;
 151   UINT8                                     Century;
 152   UINT16                                    IaPcBootArch;
 153   UINT8                                     Reserved1;
 154   UINT32                                    Flags;
 155   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    ResetReg;
 156   UINT8                                     ResetValue;
 157   UINT16                                    ArmBootArch;
 158   UINT8                                     MinorVersion;
 159   UINT64                                    XFirmwareCtrl;
 160   UINT64                                    XDsdt;
 161   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XPm1aEvtBlk;
 162   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XPm1bEvtBlk;
 163   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XPm1aCntBlk;
 164   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XPm1bCntBlk;
 165   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XPm2CntBlk;
 166   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XPmTmrBlk;
 167   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XGpe0Blk;
 168   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    XGpe1Blk;
 169   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    SleepControlReg;
 170   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    SleepStatusReg;
 171   UINT64                                    HypervisorVendorIdentity;
 172 } EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE;
 173
 174 ///
 175 /// FADT Version (as defined in ACPI 6.5 spec.)
 176 ///
 177 #define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_REVISION        0x06
 178 #define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_MINOR_REVISION  0x05
 179
 180 //
 181 // Fixed ACPI Description Table Preferred Power Management Profile
 182 //
 183 #define EFI_ACPI_6_5_PM_PROFILE_UNSPECIFIED         0
 184 #define EFI_ACPI_6_5_PM_PROFILE_DESKTOP             1
 185 #define EFI_ACPI_6_5_PM_PROFILE_MOBILE              2
 186 #define EFI_ACPI_6_5_PM_PROFILE_WORKSTATION         3
 187 #define EFI_ACPI_6_5_PM_PROFILE_ENTERPRISE_SERVER   4
 188 #define EFI_ACPI_6_5_PM_PROFILE_SOHO_SERVER         5
 189 #define EFI_ACPI_6_5_PM_PROFILE_APPLIANCE_PC        6
 190 #define EFI_ACPI_6_5_PM_PROFILE_PERFORMANCE_SERVER  7
 191 #define EFI_ACPI_6_5_PM_PROFILE_TABLET              8
 192
 193 //
 194 // Fixed ACPI Description Table Boot Architecture Flags
 195 // All other bits are reserved and must be set to 0.
 196 //
 197 #define EFI_ACPI_6_5_LEGACY_DEVICES        BIT0
 198 #define EFI_ACPI_6_5_8042                  BIT1
 199 #define EFI_ACPI_6_5_VGA_NOT_PRESENT       BIT2
 200 #define EFI_ACPI_6_5_MSI_NOT_SUPPORTED     BIT3
 201 #define EFI_ACPI_6_5_PCIE_ASPM_CONTROLS    BIT4
 202 #define EFI_ACPI_6_5_CMOS_RTC_NOT_PRESENT  BIT5
 203
 204 //
 205 // Fixed ACPI Description Table Arm Boot Architecture Flags
 206 // All other bits are reserved and must be set to 0.
 207 //
 208 #define EFI_ACPI_6_5_ARM_PSCI_COMPLIANT  BIT0
 209 #define EFI_ACPI_6_5_ARM_PSCI_USE_HVC    BIT1
 210
 211 //
 212 // Fixed ACPI Description Table Fixed Feature Flags
 213 // All other bits are reserved and must be set to 0.
 214 //
 215 #define EFI_ACPI_6_5_WBINVD                                BIT0
 216 #define EFI_ACPI_6_5_WBINVD_FLUSH                          BIT1
 217 #define EFI_ACPI_6_5_PROC_C1                               BIT2
 218 #define EFI_ACPI_6_5_P_LVL2_UP                             BIT3
 219 #define EFI_ACPI_6_5_PWR_BUTTON                            BIT4
 220 #define EFI_ACPI_6_5_SLP_BUTTON                            BIT5
 221 #define EFI_ACPI_6_5_FIX_RTC                               BIT6
 222 #define EFI_ACPI_6_5_RTC_S4                                BIT7
 223 #define EFI_ACPI_6_5_TMR_VAL_EXT                           BIT8
 224 #define EFI_ACPI_6_5_DCK_CAP                               BIT9
 225 #define EFI_ACPI_6_5_RESET_REG_SUP                         BIT10
 226 #define EFI_ACPI_6_5_SEALED_CASE                           BIT11
 227 #define EFI_ACPI_6_5_HEADLESS                              BIT12
 228 #define EFI_ACPI_6_5_CPU_SW_SLP                            BIT13
 229 #define EFI_ACPI_6_5_PCI_EXP_WAK                           BIT14
 230 #define EFI_ACPI_6_5_USE_PLATFORM_CLOCK                    BIT15
 231 #define EFI_ACPI_6_5_S4_RTC_STS_VALID                      BIT16
 232 #define EFI_ACPI_6_5_REMOTE_POWER_ON_CAPABLE               BIT17
 233 #define EFI_ACPI_6_5_FORCE_APIC_CLUSTER_MODEL              BIT18
 234 #define EFI_ACPI_6_5_FORCE_APIC_PHYSICAL_DESTINATION_MODE  BIT19
 235 #define EFI_ACPI_6_5_HW_REDUCED_ACPI                       BIT20
 236 #define EFI_ACPI_6_5_LOW_POWER_S0_IDLE_CAPABLE             BIT21
 237
 238 ///
 239 /// Firmware ACPI Control Structure
 240 ///
 241 typedef struct {
 242   UINT32    Signature;
 243   UINT32    Length;
 244   UINT32    HardwareSignature;
 245   UINT32    FirmwareWakingVector;
 246   UINT32    GlobalLock;
 247   UINT32    Flags;
 248   UINT64    XFirmwareWakingVector;
 249   UINT8     Version;
 250   UINT8     Reserved0[3];
 251   UINT32    OspmFlags;
 252   UINT8     Reserved1[24];
 253 } EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE;
 254
 255 ///
 256 /// FACS Version (as defined in ACPI 6.5 spec.)
 257 ///
 258 #define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x02
 259
 260 ///
 261 /// Firmware Control Structure Feature Flags
 262 /// All other bits are reserved and must be set to 0.
 263 ///
 264 #define EFI_ACPI_6_5_S4BIOS_F                BIT0
 265 #define EFI_ACPI_6_5_64BIT_WAKE_SUPPORTED_F  BIT1
 266
 267 ///
 268 /// OSPM Enabled Firmware Control Structure Flags
 269 /// All other bits are reserved and must be set to 0.
 270 ///
 271 #define EFI_ACPI_6_5_OSPM_64BIT_WAKE_F  BIT0
 272
 273 //
 274 // Differentiated System Description Table,
 275 // Secondary System Description Table
 276 // and Persistent System Description Table,
 277 // no definition needed as they are common description table header, the same with
 278 // EFI_ACPI_DESCRIPTION_HEADER, followed by a definition block.
 279 //
 280 #define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_REVISION  0x02
 281 #define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_REVISION       0x02
 282
 283 ///
 284 /// Multiple APIC Description Table header definition.  The rest of the table
 285 /// must be defined in a platform specific manner.
 286 ///
 287 typedef struct {
 288   EFI_ACPI_DESCRIPTION_HEADER    Header;
 289   UINT32                         LocalApicAddress;
 290   UINT32                         Flags;
 291 } EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;
 292
 293 ///
 294 /// MADT Revision (as defined in ACPI 6.5 spec.)
 295 ///
 296 #define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION  0x05
 297
 298 ///
 299 /// Multiple APIC Flags
 300 /// All other bits are reserved and must be set to 0.
 301 ///
 302 #define EFI_ACPI_6_5_PCAT_COMPAT  BIT0
 303
 304 //
 305 // Multiple APIC Description Table APIC structure types
 306 // All other values between 0x18 and 0x7F are reserved and
 307 // will be ignored by OSPM. 0x80 ~ 0xFF are reserved for OEM.
 308 //
 309 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC           0x00
 310 #define EFI_ACPI_6_5_IO_APIC                        0x01
 311 #define EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE      0x02
 312 #define EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE  0x03
 313 #define EFI_ACPI_6_5_LOCAL_APIC_NMI                 0x04
 314 #define EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE    0x05
 315 #define EFI_ACPI_6_5_IO_SAPIC                       0x06
 316 #define EFI_ACPI_6_5_LOCAL_SAPIC                    0x07
 317 #define EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES     0x08
 318 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC         0x09
 319 #define EFI_ACPI_6_5_LOCAL_X2APIC_NMI               0x0A
 320 #define EFI_ACPI_6_5_GIC                            0x0B
 321 #define EFI_ACPI_6_5_GICD                           0x0C
 322 #define EFI_ACPI_6_5_GIC_MSI_FRAME                  0x0D
 323 #define EFI_ACPI_6_5_GICR                           0x0E
 324 #define EFI_ACPI_6_5_GIC_ITS                        0x0F
 325 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP          0x10
 326 #define EFI_ACPI_6_5_CORE_PIC                       0x11
 327 #define EFI_ACPI_6_5_LIO_PIC                        0x12
 328 #define EFI_ACPI_6_5_HT_PIC                         0x13
 329 #define EFI_ACPI_6_5_EIO_PIC                        0x14
 330 #define EFI_ACPI_6_5_MSI_PIC                        0x15
 331 #define EFI_ACPI_6_5_BIO_PIC                        0x16
 332 #define EFI_ACPI_6_5_LPC_PIC                        0x17
 333
 334 //
 335 // APIC Structure Definitions
 336 //
 337
 338 ///
 339 /// Processor Local APIC Structure Definition
 340 ///
 341 typedef struct {
 342   UINT8     Type;
 343   UINT8     Length;
 344   UINT8     AcpiProcessorUid;
 345   UINT8     ApicId;
 346   UINT32    Flags;
 347 } EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_STRUCTURE;
 348
 349 ///
 350 /// Local APIC Flags.  All other bits are reserved and must be 0.
 351 ///
 352 #define EFI_ACPI_6_5_LOCAL_APIC_ENABLED         BIT0
 353 #define EFI_ACPI_6_5_LOCAL_APIC_ONLINE_CAPABLE  BIT1
 354
 355 ///
 356 /// IO APIC Structure
 357 ///
 358 typedef struct {
 359   UINT8     Type;
 360   UINT8     Length;
 361   UINT8     IoApicId;
 362   UINT8     Reserved;
 363   UINT32    IoApicAddress;
 364   UINT32    GlobalSystemInterruptBase;
 365 } EFI_ACPI_6_5_IO_APIC_STRUCTURE;
 366
 367 ///
 368 /// Interrupt Source Override Structure
 369 ///
 370 typedef struct {
 371   UINT8     Type;
 372   UINT8     Length;
 373   UINT8     Bus;
 374   UINT8     Source;
 375   UINT32    GlobalSystemInterrupt;
 376   UINT16    Flags;
 377 } EFI_ACPI_6_5_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;
 378
 379 ///
 380 /// Platform Interrupt Sources Structure Definition
 381 ///
 382 typedef struct {
 383   UINT8     Type;
 384   UINT8     Length;
 385   UINT16    Flags;
 386   UINT8     InterruptType;
 387   UINT8     ProcessorId;
 388   UINT8     ProcessorEid;
 389   UINT8     IoSapicVector;
 390   UINT32    GlobalSystemInterrupt;
 391   UINT32    PlatformInterruptSourceFlags;
 392   UINT8     CpeiProcessorOverride;
 393   UINT8     Reserved[31];
 394 } EFI_ACPI_6_5_PLATFORM_INTERRUPT_APIC_STRUCTURE;
 395
 396 //
 397 // MPS INTI flags.
 398 // All other bits are reserved and must be set to 0.
 399 //
 400 #define EFI_ACPI_6_5_POLARITY      (3 << 0)
 401 #define EFI_ACPI_6_5_TRIGGER_MODE  (3 << 2)
 402
 403 ///
 404 /// Non-Maskable Interrupt Source Structure
 405 ///
 406 typedef struct {
 407   UINT8     Type;
 408   UINT8     Length;
 409   UINT16    Flags;
 410   UINT32    GlobalSystemInterrupt;
 411 } EFI_ACPI_6_5_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;
 412
 413 ///
 414 /// Local APIC NMI Structure
 415 ///
 416 typedef struct {
 417   UINT8     Type;
 418   UINT8     Length;
 419   UINT8     AcpiProcessorUid;
 420   UINT16    Flags;
 421   UINT8     LocalApicLint;
 422 } EFI_ACPI_6_5_LOCAL_APIC_NMI_STRUCTURE;
 423
 424 ///
 425 /// Local APIC Address Override Structure
 426 ///
 427 typedef struct {
 428   UINT8     Type;
 429   UINT8     Length;
 430   UINT16    Reserved;
 431   UINT64    LocalApicAddress;
 432 } EFI_ACPI_6_5_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;
 433
 434 ///
 435 /// IO SAPIC Structure
 436 ///
 437 typedef struct {
 438   UINT8     Type;
 439   UINT8     Length;
 440   UINT8     IoApicId;
 441   UINT8     Reserved;
 442   UINT32    GlobalSystemInterruptBase;
 443   UINT64    IoSapicAddress;
 444 } EFI_ACPI_6_5_IO_SAPIC_STRUCTURE;
 445
 446 ///
 447 /// Local SAPIC Structure
 448 /// This struct followed by a null-terminated ASCII string - ACPI Processor UID String
 449 ///
 450 typedef struct {
 451   UINT8     Type;
 452   UINT8     Length;
 453   UINT8     AcpiProcessorId;
 454   UINT8     LocalSapicId;
 455   UINT8     LocalSapicEid;
 456   UINT8     Reserved[3];
 457   UINT32    Flags;
 458   UINT32    ACPIProcessorUIDValue;
 459 } EFI_ACPI_6_5_PROCESSOR_LOCAL_SAPIC_STRUCTURE;
 460
 461 ///
 462 /// Platform Interrupt Sources Structure
 463 ///
 464 typedef struct {
 465   UINT8     Type;
 466   UINT8     Length;
 467   UINT16    Flags;
 468   UINT8     InterruptType;
 469   UINT8     ProcessorId;
 470   UINT8     ProcessorEid;
 471   UINT8     IoSapicVector;
 472   UINT32    GlobalSystemInterrupt;
 473   UINT32    PlatformInterruptSourceFlags;
 474 } EFI_ACPI_6_5_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;
 475
 476 ///
 477 /// Platform Interrupt Source Flags.
 478 /// All other bits are reserved and must be set to 0.
 479 ///
 480 #define EFI_ACPI_6_5_CPEI_PROCESSOR_OVERRIDE  BIT0
 481
 482 ///
 483 /// Processor Local x2APIC Structure Definition
 484 ///
 485 typedef struct {
 486   UINT8     Type;
 487   UINT8     Length;
 488   UINT8     Reserved[2];
 489   UINT32    X2ApicId;
 490   UINT32    Flags;
 491   UINT32    AcpiProcessorUid;
 492 } EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_STRUCTURE;
 493
 494 ///
 495 /// Local x2APIC NMI Structure
 496 ///
 497 typedef struct {
 498   UINT8     Type;
 499   UINT8     Length;
 500   UINT16    Flags;
 501   UINT32    AcpiProcessorUid;
 502   UINT8     LocalX2ApicLint;
 503   UINT8     Reserved[3];
 504 } EFI_ACPI_6_5_LOCAL_X2APIC_NMI_STRUCTURE;
 505
 506 ///
 507 /// GIC Structure
 508 ///
 509 typedef struct {
 510   UINT8     Type;
 511   UINT8     Length;
 512   UINT16    Reserved;
 513   UINT32    CPUInterfaceNumber;
 514   UINT32    AcpiProcessorUid;
 515   UINT32    Flags;
 516   UINT32    ParkingProtocolVersion;
 517   UINT32    PerformanceInterruptGsiv;
 518   UINT64    ParkedAddress;
 519   UINT64    PhysicalBaseAddress;
 520   UINT64    GICV;
 521   UINT64    GICH;
 522   UINT32    VGICMaintenanceInterrupt;
 523   UINT64    GICRBaseAddress;
 524   UINT64    MPIDR;
 525   UINT8     ProcessorPowerEfficiencyClass;
 526   UINT8     Reserved2;
 527   UINT16    SpeOverflowInterrupt;
 528 } EFI_ACPI_6_5_GIC_STRUCTURE;
 529
 530 ///
 531 /// GIC Flags.  All other bits are reserved and must be 0.
 532 ///
 533 #define EFI_ACPI_6_5_GIC_ENABLED                            BIT0
 534 #define EFI_ACPI_6_5_PERFORMANCE_INTERRUPT_MODEL            BIT1
 535 #define EFI_ACPI_6_5_VGIC_MAINTENANCE_INTERRUPT_MODE_FLAGS  BIT2
 536
 537 ///
 538 /// GIC Distributor Structure
 539 ///
 540 typedef struct {
 541   UINT8     Type;
 542   UINT8     Length;
 543   UINT16    Reserved1;
 544   UINT32    GicId;
 545   UINT64    PhysicalBaseAddress;
 546   UINT32    SystemVectorBase;
 547   UINT8     GicVersion;
 548   UINT8     Reserved2[3];
 549 } EFI_ACPI_6_5_GIC_DISTRIBUTOR_STRUCTURE;
 550
 551 ///
 552 /// GIC Version
 553 ///
 554 #define EFI_ACPI_6_5_GIC_V1  0x01
 555 #define EFI_ACPI_6_5_GIC_V2  0x02
 556 #define EFI_ACPI_6_5_GIC_V3  0x03
 557 #define EFI_ACPI_6_5_GIC_V4  0x04
 558
 559 ///
 560 /// GIC MSI Frame Structure
 561 ///
 562 typedef struct {
 563   UINT8     Type;
 564   UINT8     Length;
 565   UINT16    Reserved1;
 566   UINT32    GicMsiFrameId;
 567   UINT64    PhysicalBaseAddress;
 568   UINT32    Flags;
 569   UINT16    SPICount;
 570   UINT16    SPIBase;
 571 } EFI_ACPI_6_5_GIC_MSI_FRAME_STRUCTURE;
 572
 573 ///
 574 /// GIC MSI Frame Flags.  All other bits are reserved and must be 0.
 575 ///
 576 #define EFI_ACPI_6_5_SPI_COUNT_BASE_SELECT  BIT0
 577
 578 ///
 579 /// GICR Structure
 580 ///
 581 typedef struct {
 582   UINT8     Type;
 583   UINT8     Length;
 584   UINT16    Reserved;
 585   UINT64    DiscoveryRangeBaseAddress;
 586   UINT32    DiscoveryRangeLength;
 587 } EFI_ACPI_6_5_GICR_STRUCTURE;
 588
 589 ///
 590 /// GIC Interrupt Translation Service Structure
 591 ///
 592 typedef struct {
 593   UINT8     Type;
 594   UINT8     Length;
 595   UINT16    Reserved;
 596   UINT32    GicItsId;
 597   UINT64    PhysicalBaseAddress;
 598   UINT32    Reserved2;
 599 } EFI_ACPI_6_5_GIC_ITS_STRUCTURE;
 600
 601 ///
 602 /// Multiprocessor Wakeup Structure
 603 ///
 604 typedef struct {
 605   UINT8     Type;
 606   UINT8     Length;
 607   UINT16    MailBoxVersion;
 608   UINT32    Reserved;
 609   UINT64    MailBoxAddress;
 610 } EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_STRUCTURE;
 611
 612 ///
 613 /// Multiprocessor Wakeup Mailbox Structure
 614 ///
 615 typedef struct {
 616   UINT16    Command;
 617   UINT16    Reserved;
 618   UINT32    AcpiId;
 619   UINT64    WakeupVector;
 620   UINT8     ReservedForOs[2032];
 621   UINT8     ReservedForFirmware[2048];
 622 } EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_STRUCTURE;
 623
 624 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_NOOP    0x0000
 625 #define EFI_ACPI_6_5_MULTIPROCESSOR_WAKEUP_MAILBOX_COMMAND_WAKEUP  0x0001
 626
 627 ///
 628 /// Core Programmable Interrupt Controller
 629 ///
 630 typedef struct {
 631   UINT8     Type;
 632   UINT8     Length;
 633   UINT8     Version;
 634   UINT32    ProcessorId;
 635   UINT32    CoreId;
 636   UINT32    Flags;
 637 } EFI_ACPI_6_5_CORE_PIC_STRUCTURE;
 638
 639 ///
 640 /// Legacy I/O Programmable Interrupt Controller
 641 ///
 642 typedef struct {
 643   UINT8     Type;
 644   UINT8     Length;
 645   UINT8     Version;
 646   UINT64    Address;
 647   UINT16    Size;
 648   UINT8     Cascade[2];
 649   UINT32    CascadeMap[2];
 650 } EFI_ACPI_6_5_LIO_PIC_STRUCTURE;
 651
 652 ///
 653 /// HyperTransport Programmable Interrupt Controller
 654 ///
 655 typedef struct {
 656   UINT8     Type;
 657   UINT8     Length;
 658   UINT8     Version;
 659   UINT64    Address;
 660   UINT16    Size;
 661   UINT8     Cascade[8];
 662 } EFI_ACPI_6_5_HT_PIC_STRUCTURE;
 663
 664 ///
 665 /// Extend I/O Programmable Interrupt Controller
 666 ///
 667 typedef struct {
 668   UINT8     Type;
 669   UINT8     Length;
 670   UINT8     Version;
 671   UINT8     Cascade;
 672   UINT8     Node;
 673   UINT64    NodeMap;
 674 } EFI_ACPI_6_5_EIO_PIC_STRUCTURE;
 675
 676 ///
 677 /// MSI Programmable Interrupt Controller
 678 ///
 679 typedef struct {
 680   UINT8     Type;
 681   UINT8     Length;
 682   UINT8     Version;
 683   UINT64    MsgAddress;
 684   UINT32    Start;
 685   UINT32    Count;
 686 } EFI_ACPI_6_5_MSI_PIC_STRUCTURE;
 687
 688 ///
 689 /// Bridge I/O Programmable Interrupt Controller
 690 ///
 691 typedef struct {
 692   UINT8     Type;
 693   UINT8     Length;
 694   UINT8     Version;
 695   UINT64    Address;
 696   UINT16    Size;
 697   UINT16    Id;
 698   UINT16    GsiBase;
 699 } EFI_ACPI_6_5_BIO_PIC_STRUCTURE;
 700
 701 ///
 702 /// Low Pin Count Programmable Interrupt Controller
 703 ///
 704 typedef struct {
 705   UINT8     Type;
 706   UINT8     Length;
 707   UINT8     Version;
 708   UINT64    Address;
 709   UINT16    Size;
 710   UINT8     Cascade;
 711 } EFI_ACPI_6_5_LPC_PIC_STRUCTURE;
 712
 713 ///
 714 /// Smart Battery Description Table (SBST)
 715 ///
 716 typedef struct {
 717   EFI_ACPI_DESCRIPTION_HEADER    Header;
 718   UINT32                         WarningEnergyLevel;
 719   UINT32                         LowEnergyLevel;
 720   UINT32                         CriticalEnergyLevel;
 721 } EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE;
 722
 723 ///
 724 /// SBST Version (as defined in ACPI 6.5 spec.)
 725 ///
 726 #define EFI_ACPI_6_5_SMART_BATTERY_DESCRIPTION_TABLE_REVISION  0x01
 727
 728 ///
 729 /// Embedded Controller Boot Resources Table (ECDT)
 730 /// The table is followed by a null terminated ASCII string that contains
 731 /// a fully qualified reference to the name space object.
 732 ///
 733 typedef struct {
 734   EFI_ACPI_DESCRIPTION_HEADER               Header;
 735   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    EcControl;
 736   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    EcData;
 737   UINT32                                    Uid;
 738   UINT8                                     GpeBit;
 739 } EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;
 740
 741 ///
 742 /// ECDT Version (as defined in ACPI 6.5 spec.)
 743 ///
 744 #define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01
 745
 746 ///
 747 /// System Resource Affinity Table (SRAT).  The rest of the table
 748 /// must be defined in a platform specific manner.
 749 ///
 750 typedef struct {
 751   EFI_ACPI_DESCRIPTION_HEADER    Header;
 752   UINT32                         Reserved1; ///< Must be set to 1
 753   UINT64                         Reserved2;
 754 } EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;
 755
 756 ///
 757 /// SRAT Version (as defined in ACPI 6.5 spec.)
 758 ///
 759 #define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x03
 760
 761 //
 762 // SRAT structure types.
 763 // All other values between 0x06 an 0xFF are reserved and
 764 // will be ignored by OSPM.
 765 //
 766 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00
 767 #define EFI_ACPI_6_5_MEMORY_AFFINITY                      0x01
 768 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY      0x02
 769 #define EFI_ACPI_6_5_GICC_AFFINITY                        0x03
 770 #define EFI_ACPI_6_5_GIC_ITS_AFFINITY                     0x04
 771 #define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY           0x05
 772
 773 ///
 774 /// Processor Local APIC/SAPIC Affinity Structure Definition
 775 ///
 776 typedef struct {
 777   UINT8     Type;
 778   UINT8     Length;
 779   UINT8     ProximityDomain7To0;
 780   UINT8     ApicId;
 781   UINT32    Flags;
 782   UINT8     LocalSapicEid;
 783   UINT8     ProximityDomain31To8[3];
 784   UINT32    ClockDomain;
 785 } EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE;
 786
 787 ///
 788 /// Local APIC/SAPIC Flags.  All other bits are reserved and must be 0.
 789 ///
 790 #define EFI_ACPI_6_5_PROCESSOR_LOCAL_APIC_SAPIC_ENABLED  (1 << 0)
 791
 792 ///
 793 /// Memory Affinity Structure Definition
 794 ///
 795 typedef struct {
 796   UINT8     Type;
 797   UINT8     Length;
 798   UINT32    ProximityDomain;
 799   UINT16    Reserved1;
 800   UINT32    AddressBaseLow;
 801   UINT32    AddressBaseHigh;
 802   UINT32    LengthLow;
 803   UINT32    LengthHigh;
 804   UINT32    Reserved2;
 805   UINT32    Flags;
 806   UINT64    Reserved3;
 807 } EFI_ACPI_6_5_MEMORY_AFFINITY_STRUCTURE;
 808
 809 //
 810 // Memory Flags.  All other bits are reserved and must be 0.
 811 //
 812 #define EFI_ACPI_6_5_MEMORY_ENABLED        (1 << 0)
 813 #define EFI_ACPI_6_5_MEMORY_HOT_PLUGGABLE  (1 << 1)
 814 #define EFI_ACPI_6_5_MEMORY_NONVOLATILE    (1 << 2)
 815
 816 ///
 817 /// Processor Local x2APIC Affinity Structure Definition
 818 ///
 819 typedef struct {
 820   UINT8     Type;
 821   UINT8     Length;
 822   UINT8     Reserved1[2];
 823   UINT32    ProximityDomain;
 824   UINT32    X2ApicId;
 825   UINT32    Flags;
 826   UINT32    ClockDomain;
 827   UINT8     Reserved2[4];
 828 } EFI_ACPI_6_5_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE;
 829
 830 ///
 831 /// GICC Affinity Structure Definition
 832 ///
 833 typedef struct {
 834   UINT8     Type;
 835   UINT8     Length;
 836   UINT32    ProximityDomain;
 837   UINT32    AcpiProcessorUid;
 838   UINT32    Flags;
 839   UINT32    ClockDomain;
 840 } EFI_ACPI_6_5_GICC_AFFINITY_STRUCTURE;
 841
 842 ///
 843 /// GICC Flags.  All other bits are reserved and must be 0.
 844 ///
 845 #define EFI_ACPI_6_5_GICC_ENABLED  (1 << 0)
 846
 847 ///
 848 /// GIC Interrupt Translation Service (ITS) Affinity Structure Definition
 849 ///
 850 typedef struct {
 851   UINT8     Type;
 852   UINT8     Length;
 853   UINT32    ProximityDomain;
 854   UINT8     Reserved[2];
 855   UINT32    ItsId;
 856 } EFI_ACPI_6_5_GIC_ITS_AFFINITY_STRUCTURE;
 857
 858 //
 859 // Generic Initiator Affinity Structure Device Handle Types
 860 // All other values between 0x02 an 0xFF are reserved and
 861 // will be ignored by OSPM.
 862 //
 863 #define EFI_ACPI_6_5_ACPI_DEVICE_HANDLE  0x00
 864 #define EFI_ACPI_6_5_PCI_DEVICE_HANDLE   0x01
 865
 866 ///
 867 /// Device Handle - ACPI
 868 ///
 869 typedef struct {
 870   UINT64    AcpiHid;
 871   UINT32    AcpiUid;
 872   UINT8     Reserved[4];
 873 } EFI_ACPI_6_5_DEVICE_HANDLE_ACPI;
 874
 875 ///
 876 /// Device Handle - PCI
 877 ///
 878 typedef struct {
 879   UINT16    PciSegment;
 880   UINT16    PciBdfNumber;
 881   UINT8     Reserved[12];
 882 } EFI_ACPI_6_5_DEVICE_HANDLE_PCI;
 883
 884 ///
 885 /// Device Handle
 886 ///
 887 typedef union {
 888   EFI_ACPI_6_5_DEVICE_HANDLE_ACPI    Acpi;
 889   EFI_ACPI_6_5_DEVICE_HANDLE_PCI     Pci;
 890 } EFI_ACPI_6_5_DEVICE_HANDLE;
 891
 892 ///
 893 /// Generic Initiator Affinity Structure
 894 ///
 895 typedef struct {
 896   UINT8                         Type;
 897   UINT8                         Length;
 898   UINT8                         Reserved1;
 899   UINT8                         DeviceHandleType;
 900   UINT32                        ProximityDomain;
 901   EFI_ACPI_6_5_DEVICE_HANDLE    DeviceHandle;
 902   UINT32                        Flags;
 903   UINT8                         Reserved2[4];
 904 } EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE;
 905
 906 ///
 907 /// Generic Initiator Affinity Structure Flags. All other bits are reserved
 908 /// and must be 0.
 909 ///
 910 #define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ENABLED                     BIT0
 911 #define EFI_ACPI_6_5_GENERIC_INITIATOR_AFFINITY_STRUCTURE_ARCHITECTURAL_TRANSACTIONS  BIT1
 912
 913 ///
 914 /// System Locality Distance Information Table (SLIT).
 915 /// The rest of the table is a matrix.
 916 ///
 917 typedef struct {
 918   EFI_ACPI_DESCRIPTION_HEADER    Header;
 919   UINT64                         NumberOfSystemLocalities;
 920 } EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER;
 921
 922 ///
 923 /// SLIT Version (as defined in ACPI 6.5 spec.)
 924 ///
 925 #define EFI_ACPI_6_5_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION  0x01
 926
 927 ///
 928 /// Corrected Platform Error Polling Table (CPEP)
 929 ///
 930 typedef struct {
 931   EFI_ACPI_DESCRIPTION_HEADER    Header;
 932   UINT8                          Reserved[8];
 933 } EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_HEADER;
 934
 935 ///
 936 /// CPEP Version (as defined in ACPI 6.5 spec.)
 937 ///
 938 #define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_REVISION  0x01
 939
 940 //
 941 // CPEP processor structure types.
 942 //
 943 #define EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC  0x00
 944
 945 ///
 946 /// Corrected Platform Error Polling Processor Structure Definition
 947 ///
 948 typedef struct {
 949   UINT8     Type;
 950   UINT8     Length;
 951   UINT8     ProcessorId;
 952   UINT8     ProcessorEid;
 953   UINT32    PollingInterval;
 954 } EFI_ACPI_6_5_CPEP_PROCESSOR_APIC_SAPIC_STRUCTURE;
 955
 956 ///
 957 /// Maximum System Characteristics Table (MSCT)
 958 ///
 959 typedef struct {
 960   EFI_ACPI_DESCRIPTION_HEADER    Header;
 961   UINT32                         OffsetProxDomInfo;
 962   UINT32                         MaximumNumberOfProximityDomains;
 963   UINT32                         MaximumNumberOfClockDomains;
 964   UINT64                         MaximumPhysicalAddress;
 965 } EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_HEADER;
 966
 967 ///
 968 /// MSCT Version (as defined in ACPI 6.5 spec.)
 969 ///
 970 #define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_REVISION  0x01
 971
 972 ///
 973 /// Maximum Proximity Domain Information Structure Definition
 974 ///
 975 typedef struct {
 976   UINT8     Revision;
 977   UINT8     Length;
 978   UINT32    ProximityDomainRangeLow;
 979   UINT32    ProximityDomainRangeHigh;
 980   UINT32    MaximumProcessorCapacity;
 981   UINT64    MaximumMemoryCapacity;
 982 } EFI_ACPI_6_5_MAXIMUM_PROXIMITY_DOMAIN_INFORMATION_STRUCTURE;
 983
 984 ///
 985 /// ACPI RAS Feature Table definition.
 986 ///
 987 typedef struct {
 988   EFI_ACPI_DESCRIPTION_HEADER    Header;
 989   UINT8                          PlatformCommunicationChannelIdentifier[12];
 990 } EFI_ACPI_6_5_RAS_FEATURE_TABLE;
 991
 992 ///
 993 /// RASF Version (as defined in ACPI 6.5 spec.)
 994 ///
 995 #define EFI_ACPI_6_5_RAS_FEATURE_TABLE_REVISION  0x01
 996
 997 ///
 998 /// ACPI RASF Platform Communication Channel Shared Memory Region definition.
 999 ///
1000 typedef struct {
1001   UINT32    Signature;
1002   UINT16    Command;
1003   UINT16    Status;
1004   UINT16    Version;
1005   UINT8     RASCapabilities[16];
1006   UINT8     SetRASCapabilities[16];
1007   UINT16    NumberOfRASFParameterBlocks;
1008   UINT32    SetRASCapabilitiesStatus;
1009 } EFI_ACPI_6_5_RASF_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
1010
1011 ///
1012 /// ACPI RASF PCC command code
1013 ///
1014 #define EFI_ACPI_6_5_RASF_PCC_COMMAND_CODE_EXECUTE_RASF_COMMAND  0x01
1015
1016 ///
1017 /// ACPI RASF Platform RAS Capabilities
1018 ///
1019 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED                          BIT0
1020 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_HARDWARE_BASED_PATROL_SCRUB_SUPPORTED_AND_EXPOSED_TO_SOFTWARE  BIT1
1021 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS             BIT2
1022 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS     BIT3
1023 #define EFI_ACPI_6_5_RASF_PLATFORM_RAS_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING          BIT4
1024
1025 ///
1026 /// ACPI RASF Parameter Block structure for PATROL_SCRUB
1027 ///
1028 typedef struct {
1029   UINT16    Type;
1030   UINT16    Version;
1031   UINT16    Length;
1032   UINT16    PatrolScrubCommand;
1033   UINT64    RequestedAddressRange[2];
1034   UINT64    ActualAddressRange[2];
1035   UINT16    Flags;
1036   UINT8     RequestedSpeed;
1037 } EFI_ACPI_6_5_RASF_PATROL_SCRUB_PLATFORM_BLOCK_STRUCTURE;
1038
1039 ///
1040 /// ACPI RASF Patrol Scrub command
1041 ///
1042 #define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_GET_PATROL_PARAMETERS  0x01
1043 #define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_START_PATROL_SCRUBBER  0x02
1044 #define EFI_ACPI_6_5_RASF_PATROL_SCRUB_COMMAND_STOP_PATROL_SCRUBBER   0x03
1045
1046 ///
1047 /// Memory Power State Table definition.
1048 ///
1049 typedef struct {
1050   EFI_ACPI_DESCRIPTION_HEADER    Header;
1051   UINT8                          PlatformCommunicationChannelIdentifier;
1052   UINT8                          Reserved[3];
1053   // Memory Power Node Structure
1054   // Memory Power State Characteristics
1055 } EFI_ACPI_6_5_MEMORY_POWER_STATUS_TABLE;
1056
1057 ///
1058 /// MPST Version (as defined in ACPI 6.5 spec.)
1059 ///
1060 #define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_REVISION  0x01
1061
1062 ///
1063 /// MPST Platform Communication Channel Shared Memory Region definition.
1064 ///
1065 typedef struct {
1066   UINT32    Signature;
1067   UINT16    Command;
1068   UINT16    Status;
1069   UINT32    MemoryPowerCommandRegister;
1070   UINT32    MemoryPowerStatusRegister;
1071   UINT32    PowerStateId;
1072   UINT32    MemoryPowerNodeId;
1073   UINT64    MemoryEnergyConsumed;
1074   UINT64    ExpectedAveragePowerComsuned;
1075 } EFI_ACPI_6_5_MPST_PLATFORM_COMMUNICATION_CHANNEL_SHARED_MEMORY_REGION;
1076
1077 ///
1078 /// ACPI MPST PCC command code
1079 ///
1080 #define EFI_ACPI_6_5_MPST_PCC_COMMAND_CODE_EXECUTE_MPST_COMMAND  0x03
1081
1082 ///
1083 /// ACPI MPST Memory Power command
1084 ///
1085 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_POWER_STATE      0x01
1086 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_SET_MEMORY_POWER_STATE      0x02
1087 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_AVERAGE_POWER_CONSUMED  0x03
1088 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_COMMAND_GET_MEMORY_ENERGY_CONSUMED  0x04
1089
1090 ///
1091 /// MPST Memory Power Node Table
1092 ///
1093 typedef struct {
1094   UINT8    PowerStateValue;
1095   UINT8    PowerStateInformationIndex;
1096 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE;
1097
1098 typedef struct {
1099   UINT8     Flag;
1100   UINT8     Reserved;
1101   UINT16    MemoryPowerNodeId;
1102   UINT32    Length;
1103   UINT64    AddressBase;
1104   UINT64    AddressLength;
1105   UINT32    NumberOfPowerStates;
1106   UINT32    NumberOfPhysicalComponents;
1107   // EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE              MemoryPowerState[NumberOfPowerStates];
1108   // UINT16                                            PhysicalComponentIdentifier[NumberOfPhysicalComponents];
1109 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE;
1110
1111 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_ENABLE         0x01
1112 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_POWER_MANAGED  0x02
1113 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STRUCTURE_FLAG_HOT_PLUGGABLE  0x04
1114
1115 typedef struct {
1116   UINT16    MemoryPowerNodeCount;
1117   UINT8     Reserved[2];
1118 } EFI_ACPI_6_5_MPST_MEMORY_POWER_NODE_TABLE;
1119
1120 ///
1121 /// MPST Memory Power State Characteristics Table
1122 ///
1123 typedef struct {
1124   UINT8     PowerStateStructureID;
1125   UINT8     Flag;
1126   UINT16    Reserved;
1127   UINT32    AveragePowerConsumedInMPS0;
1128   UINT32    RelativePowerSavingToMPS0;
1129   UINT64    ExitLatencyToMPS0;
1130 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE;
1131
1132 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_MEMORY_CONTENT_PRESERVED             0x01
1133 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_ENTRY  0x02
1134 #define EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_STRUCTURE_FLAG_AUTONOMOUS_MEMORY_POWER_STATE_EXIT   0x04
1135
1136 typedef struct {
1137   UINT16    MemoryPowerStateCharacteristicsCount;
1138   UINT8     Reserved[2];
1139 } EFI_ACPI_6_5_MPST_MEMORY_POWER_STATE_CHARACTERISTICS_TABLE;
1140
1141 ///
1142 /// Platform Memory Topology Table definition.
1143 ///
1144 typedef struct {
1145   EFI_ACPI_DESCRIPTION_HEADER    Header;
1146   UINT32                         NumberOfMemoryDevices;
1147   // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE  MemoryDeviceStructure[NumberOfMemoryDevices];
1148 } EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE;
1149
1150 ///
1151 /// PMTT Version (as defined in ACPI 6.5 spec.)
1152 ///
1153 #define EFI_ACPI_6_5_MEMORY_TOPOLOGY_TABLE_REVISION  0x02
1154
1155 ///
1156 /// Common Memory Device.
1157 ///
1158 typedef struct {
1159   UINT8     Type;
1160   UINT8     Reserved;
1161   UINT16    Length;
1162   UINT16    Flags;
1163   UINT16    Reserved1;
1164   UINT32    NumberOfMemoryDevices;
1165   // UINT8                                   TypeSpecificData[];
1166   // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE  MemoryDeviceStructure[NumberOfMemoryDevices];
1167 } EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE;
1168
1169 ///
1170 /// Memory Device Type.
1171 ///
1172 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_SOCKET                0x0
1173 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_MEMORY_CONTROLLER     0x1
1174 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_DIMM                  0x2
1175 #define EFI_ACPI_6_5_PMTT_MEMORY_DEVICE_TYPE_VENDOR_SPECIFIC_TYPE  0xFF
1176
1177 ///
1178 /// Socket Type Data.
1179 ///
1180 typedef struct {
1181   EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE    CommonMemoryDeviceHeader;
1182   UINT16                                    SocketIdentifier;
1183   UINT16                                    Reserved;
1184   // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE  MemoryDeviceStructure[];
1185 } EFI_ACPI_6_5_PMTT_SOCKET_TYPE_DATA;
1186
1187 ///
1188 /// Memory Controller Type Data.
1189 ///
1190 typedef struct {
1191   EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE    CommonMemoryDeviceHeader;
1192   UINT16                                    MemoryControllerIdentifier;
1193   UINT16                                    Reserved;
1194   // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE  MemoryDeviceStructure[];
1195 } EFI_ACPI_6_5_PMTT_MEMORY_CONTROLLER_TYPE_DATA;
1196
1197 ///
1198 /// DIMM Type Specific Data.
1199 ///
1200 typedef struct {
1201   EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE    CommonMemoryDeviceHeader;
1202   UINT32                                    SmbiosHandle;
1203 } EFI_ACPI_6_5_PMTT_DIMM_TYPE_SPECIFIC_DATA;
1204
1205 ///
1206 /// Vendor Specific Type Data.
1207 ///
1208 typedef struct {
1209   EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE    CommonMemoryDeviceHeader;
1210   UINT8                                     TypeUuid[16];
1211   // EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA   VendorSpecificData[];
1212   // EFI_ACPI_6_5_PMTT_COMMON_MEMORY_DEVICE        MemoryDeviceStructure[];
1213 } EFI_ACPI_6_5_PMTT_VENDOR_SPECIFIC_TYPE_DATA;
1214
1215 ///
1216 /// Boot Graphics Resource Table definition.
1217 ///
1218 typedef struct {
1219   EFI_ACPI_DESCRIPTION_HEADER    Header;
1220   ///
1221   /// 2-bytes (16 bit) version ID. This value must be 1.
1222   ///
1223   UINT16                         Version;
1224   ///
1225   /// 1-byte status field indicating current status about the table.
1226   ///     Bits[7:3] = Reserved (must be zero)
1227   ///     Bits[2:1] = Orientation Offset. These bits describe the clockwise
1228   ///                 degree offset from the image's default orientation.
1229   ///                 [00] = 0, no offset
1230   ///                 [01] = 90
1231   ///                 [10] = 180
1232   ///                 [11] = 270
1233   ///     Bit [0] = Displayed. A one indicates the boot image graphic is
1234   ///               displayed.
1235   ///
1236   UINT8     Status;
1237   ///
1238   /// 1-byte enumerated type field indicating format of the image.
1239   ///     0 = Bitmap
1240   ///     1 - 255  Reserved (for future use)
1241   ///
1242   UINT8     ImageType;
1243   ///
1244   /// 8-byte (64 bit) physical address pointing to the firmware's in-memory copy
1245   /// of the image bitmap.
1246   ///
1247   UINT64    ImageAddress;
1248   ///
1249   /// A 4-byte (32-bit) unsigned long describing the display X-offset of the boot image.
1250   /// (X, Y) display offset of the top left corner of the boot image.
1251   /// The top left corner of the display is at offset (0, 0).
1252   ///
1253   UINT32    ImageOffsetX;
1254   ///
1255   /// A 4-byte (32-bit) unsigned long describing the display Y-offset of the boot image.
1256   /// (X, Y) display offset of the top left corner of the boot image.
1257   /// The top left corner of the display is at offset (0, 0).
1258   ///
1259   UINT32    ImageOffsetY;
1260 } EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE;
1261
1262 ///
1263 /// BGRT Revision
1264 ///
1265 #define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_REVISION  1
1266
1267 ///
1268 /// BGRT Version
1269 ///
1270 #define EFI_ACPI_6_5_BGRT_VERSION  0x01
1271
1272 ///
1273 /// BGRT Status
1274 ///
1275 #define EFI_ACPI_6_5_BGRT_STATUS_NOT_DISPLAYED  0x00
1276 #define EFI_ACPI_6_5_BGRT_STATUS_DISPLAYED      0x01
1277
1278 ///
1279 /// BGRT Image Type
1280 ///
1281 #define EFI_ACPI_6_5_BGRT_IMAGE_TYPE_BMP  0x00
1282
1283 ///
1284 /// FPDT Version (as defined in ACPI 6.5 spec.)
1285 ///
1286 #define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_REVISION  0x01
1287
1288 ///
1289 /// FPDT Performance Record Types
1290 ///
1291 #define EFI_ACPI_6_5_FPDT_RECORD_TYPE_FIRMWARE_BASIC_BOOT_POINTER   0x0000
1292 #define EFI_ACPI_6_5_FPDT_RECORD_TYPE_S3_PERFORMANCE_TABLE_POINTER  0x0001
1293
1294 ///
1295 /// FPDT Performance Record Revision
1296 ///
1297 #define EFI_ACPI_6_5_FPDT_RECORD_REVISION_FIRMWARE_BASIC_BOOT_POINTER   0x01
1298 #define EFI_ACPI_6_5_FPDT_RECORD_REVISION_S3_PERFORMANCE_TABLE_POINTER  0x01
1299
1300 ///
1301 /// FPDT Runtime Performance Record Types
1302 ///
1303 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_RESUME            0x0000
1304 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_S3_SUSPEND           0x0001
1305 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_TYPE_FIRMWARE_BASIC_BOOT  0x0002
1306
1307 ///
1308 /// FPDT Runtime Performance Record Revision
1309 ///
1310 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_RESUME            0x01
1311 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_S3_SUSPEND           0x01
1312 #define EFI_ACPI_6_5_FPDT_RUNTIME_RECORD_REVISION_FIRMWARE_BASIC_BOOT  0x02
1313
1314 ///
1315 /// FPDT Performance Record header
1316 ///
1317 typedef struct {
1318   UINT16    Type;
1319   UINT8     Length;
1320   UINT8     Revision;
1321 } EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER;
1322
1323 ///
1324 /// FPDT Performance Table header
1325 ///
1326 typedef struct {
1327   UINT32    Signature;
1328   UINT32    Length;
1329 } EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER;
1330
1331 ///
1332 /// FPDT Firmware Basic Boot Performance Pointer Record Structure
1333 ///
1334 typedef struct {
1335   EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER    Header;
1336   UINT32                                         Reserved;
1337   ///
1338   /// 64-bit processor-relative physical address of the Basic Boot Performance Table.
1339   ///
1340   UINT64                                         BootPerformanceTablePointer;
1341 } EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_POINTER_RECORD;
1342
1343 ///
1344 /// FPDT S3 Performance Table Pointer Record Structure
1345 ///
1346 typedef struct {
1347   EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER    Header;
1348   UINT32                                         Reserved;
1349   ///
1350   /// 64-bit processor-relative physical address of the S3 Performance Table.
1351   ///
1352   UINT64                                         S3PerformanceTablePointer;
1353 } EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_POINTER_RECORD;
1354
1355 ///
1356 /// FPDT Firmware Basic Boot Performance Record Structure
1357 ///
1358 typedef struct {
1359   EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER    Header;
1360   UINT32                                         Reserved;
1361   ///
1362   /// Timer value logged at the beginning of firmware image execution.
1363   /// This may not always be zero or near zero.
1364   ///
1365   UINT64                                         ResetEnd;
1366   ///
1367   /// Timer value logged just prior to loading the OS boot loader into memory.
1368   /// For non-UEFI compatible boots, this field must be zero.
1369   ///
1370   UINT64                                         OsLoaderLoadImageStart;
1371   ///
1372   /// Timer value logged just prior to launching the previously loaded OS boot loader image.
1373   /// For non-UEFI compatible boots, the timer value logged will be just prior
1374   /// to the INT 19h handler invocation.
1375   ///
1376   UINT64                                         OsLoaderStartImageStart;
1377   ///
1378   /// Timer value logged at the point when the OS loader calls the
1379   /// ExitBootServices function for UEFI compatible firmware.
1380   /// For non-UEFI compatible boots, this field must be zero.
1381   ///
1382   UINT64                                         ExitBootServicesEntry;
1383   ///
1384   /// Timer value logged at the point just prior towhen the OS loader gaining
1385   /// control back from calls the ExitBootServices function for UEFI compatible firmware.
1386   /// For non-UEFI compatible boots, this field must be zero.
1387   ///
1388   UINT64                                         ExitBootServicesExit;
1389 } EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_RECORD;
1390
1391 ///
1392 /// FPDT Firmware Basic Boot Performance Table signature
1393 ///
1394 #define EFI_ACPI_6_5_FPDT_BOOT_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('F', 'B', 'P', 'T')
1395
1396 //
1397 // FPDT Firmware Basic Boot Performance Table
1398 //
1399 typedef struct {
1400   EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER    Header;
1401   //
1402   // one or more Performance Records.
1403   //
1404 } EFI_ACPI_6_5_FPDT_FIRMWARE_BASIC_BOOT_TABLE;
1405
1406 ///
1407 /// FPDT "S3PT" S3 Performance Table
1408 ///
1409 #define EFI_ACPI_6_5_FPDT_S3_PERFORMANCE_TABLE_SIGNATURE  SIGNATURE_32('S', '3', 'P', 'T')
1410
1411 //
1412 // FPDT Firmware S3 Boot Performance Table
1413 //
1414 typedef struct {
1415   EFI_ACPI_6_5_FPDT_PERFORMANCE_TABLE_HEADER    Header;
1416   //
1417   // one or more Performance Records.
1418   //
1419 } EFI_ACPI_6_5_FPDT_FIRMWARE_S3_BOOT_TABLE;
1420
1421 ///
1422 /// FPDT Basic S3 Resume Performance Record
1423 ///
1424 typedef struct {
1425   EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER    Header;
1426   ///
1427   /// A count of the number of S3 resume cycles since the last full boot sequence.
1428   ///
1429   UINT32                                         ResumeCount;
1430   ///
1431   /// Timer recorded at the end of BIOS S3 resume, just prior to handoff to the
1432   /// OS waking vector. Only the most recent resume cycle's time is retained.
1433   ///
1434   UINT64                                         FullResume;
1435   ///
1436   /// Average timer value of all resume cycles logged since the last full boot
1437   /// sequence, including the most recent resume.  Note that the entire log of
1438   /// timer values does not need to be retained in order to calculate this average.
1439   ///
1440   UINT64                                         AverageResume;
1441 } EFI_ACPI_6_5_FPDT_S3_RESUME_RECORD;
1442
1443 ///
1444 /// FPDT Basic S3 Suspend Performance Record
1445 ///
1446 typedef struct {
1447   EFI_ACPI_6_5_FPDT_PERFORMANCE_RECORD_HEADER    Header;
1448   ///
1449   /// Timer value recorded at the OS write to SLP_TYP upon entry to S3.
1450   /// Only the most recent suspend cycle's timer value is retained.
1451   ///
1452   UINT64                                         SuspendStart;
1453   ///
1454   /// Timer value recorded at the final firmware write to SLP_TYP (or other
1455   /// mechanism) used to trigger hardware entry to S3.
1456   /// Only the most recent suspend cycle's timer value is retained.
1457   ///
1458   UINT64                                         SuspendEnd;
1459 } EFI_ACPI_6_5_FPDT_S3_SUSPEND_RECORD;
1460
1461 ///
1462 /// Firmware Performance Record Table definition.
1463 ///
1464 typedef struct {
1465   EFI_ACPI_DESCRIPTION_HEADER    Header;
1466 } EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_RECORD_TABLE;
1467
1468 ///
1469 /// Generic Timer Description Table definition.
1470 ///
1471 typedef struct {
1472   EFI_ACPI_DESCRIPTION_HEADER    Header;
1473   UINT64                         CntControlBasePhysicalAddress;
1474   UINT32                         Reserved;
1475   UINT32                         SecurePL1TimerGSIV;
1476   UINT32                         SecurePL1TimerFlags;
1477   UINT32                         NonSecurePL1TimerGSIV;
1478   UINT32                         NonSecurePL1TimerFlags;
1479   UINT32                         VirtualTimerGSIV;
1480   UINT32                         VirtualTimerFlags;
1481   UINT32                         NonSecurePL2TimerGSIV;
1482   UINT32                         NonSecurePL2TimerFlags;
1483   UINT64                         CntReadBasePhysicalAddress;
1484   UINT32                         PlatformTimerCount;
1485   UINT32                         PlatformTimerOffset;
1486   UINT32                         VirtualPL2TimerGSIV;
1487   UINT32                         VirtualPL2TimerFlags;
1488 } EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE;
1489
1490 ///
1491 /// GTDT Version (as defined in ACPI 6.5 spec.)
1492 ///
1493 #define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_REVISION  0x03
1494
1495 ///
1496 /// Timer Flags.  All other bits are reserved and must be 0.
1497 ///
1498 #define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_MODE      BIT0
1499 #define EFI_ACPI_6_5_GTDT_TIMER_FLAG_TIMER_INTERRUPT_POLARITY  BIT1
1500 #define EFI_ACPI_6_5_GTDT_TIMER_FLAG_ALWAYS_ON_CAPABILITY      BIT2
1501
1502 ///
1503 /// Platform Timer Type
1504 ///
1505 #define EFI_ACPI_6_5_GTDT_GT_BLOCK              0
1506 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG  1
1507
1508 ///
1509 /// GT Block Structure
1510 ///
1511 typedef struct {
1512   UINT8     Type;
1513   UINT16    Length;
1514   UINT8     Reserved;
1515   UINT64    CntCtlBase;
1516   UINT32    GTBlockTimerCount;
1517   UINT32    GTBlockTimerOffset;
1518 } EFI_ACPI_6_5_GTDT_GT_BLOCK_STRUCTURE;
1519
1520 ///
1521 /// GT Block Timer Structure
1522 ///
1523 typedef struct {
1524   UINT8     GTFrameNumber;
1525   UINT8     Reserved[3];
1526   UINT64    CntBaseX;
1527   UINT64    CntEL0BaseX;
1528   UINT32    GTxPhysicalTimerGSIV;
1529   UINT32    GTxPhysicalTimerFlags;
1530   UINT32    GTxVirtualTimerGSIV;
1531   UINT32    GTxVirtualTimerFlags;
1532   UINT32    GTxCommonFlags;
1533 } EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_STRUCTURE;
1534
1535 ///
1536 /// GT Block Physical Timers and Virtual Timers Flags.  All other bits are reserved and must be 0.
1537 ///
1538 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_MODE      BIT0
1539 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_TIMER_FLAG_TIMER_INTERRUPT_POLARITY  BIT1
1540
1541 ///
1542 /// Common Flags Flags.  All other bits are reserved and must be 0.
1543 ///
1544 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_SECURE_TIMER          BIT0
1545 #define EFI_ACPI_6_5_GTDT_GT_BLOCK_COMMON_FLAG_ALWAYS_ON_CAPABILITY  BIT1
1546
1547 ///
1548 /// Arm Generic Watchdog Structure
1549 ///
1550 typedef struct {
1551   UINT8     Type;
1552   UINT16    Length;
1553   UINT8     Reserved;
1554   UINT64    RefreshFramePhysicalAddress;
1555   UINT64    WatchdogControlFramePhysicalAddress;
1556   UINT32    WatchdogTimerGSIV;
1557   UINT32    WatchdogTimerFlags;
1558 } EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_STRUCTURE;
1559
1560 ///
1561 /// Arm Generic Watchdog Timer Flags.  All other bits are reserved and must be 0.
1562 ///
1563 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_MODE      BIT0
1564 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_TIMER_INTERRUPT_POLARITY  BIT1
1565 #define EFI_ACPI_6_5_GTDT_ARM_GENERIC_WATCHDOG_FLAG_SECURE_TIMER              BIT2
1566
1567 //
1568 // NVDIMM Firmware Interface Table definition.
1569 //
1570 typedef struct {
1571   EFI_ACPI_DESCRIPTION_HEADER    Header;
1572   UINT32                         Reserved;
1573 } EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE;
1574
1575 //
1576 // NFIT Version (as defined in ACPI 6.5 spec.)
1577 //
1578 #define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_REVISION  0x1
1579
1580 //
1581 // Definition for NFIT Table Structure Types
1582 //
1583 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE_TYPE    0
1584 #define EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE_TYPE            1
1585 #define EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE_TYPE                       2
1586 #define EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE_TYPE    3
1587 #define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE_TYPE            4
1588 #define EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE_TYPE  5
1589 #define EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE_TYPE               6
1590 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE_TYPE            7
1591
1592 //
1593 // Definition for NFIT Structure Header
1594 //
1595 typedef struct {
1596   UINT16    Type;
1597   UINT16    Length;
1598 } EFI_ACPI_6_5_NFIT_STRUCTURE_HEADER;
1599
1600 //
1601 // Definition for System Physical Address Range Structure
1602 //
1603 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_CONTROL_REGION_FOR_MANAGEMENT  BIT0
1604 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_PROXIMITY_DOMAIN_VALID         BIT1
1605 #define EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_FLAGS_SPA_LOCATION_COOKIE_VALID      BIT2
1606
1607 #define EFI_ACPI_6_5_NFIT_GUID_VOLATILE_MEMORY_REGION                              { 0x7305944F, 0xFDDA, 0x44E3, { 0xB1, 0x6C, 0x3F, 0x22, 0xD2, 0x52, 0xE5, 0xD0 }}
1608 #define EFI_ACPI_6_5_NFIT_GUID_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_REGION           { 0x66F0D379, 0xB4F3, 0x4074, { 0xAC, 0x43, 0x0D, 0x33, 0x18, 0xB7, 0x8C, 0xDB }}
1609 #define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_CONTROL_REGION                               { 0x92F701F6, 0x13B4, 0x405D, { 0x91, 0x0B, 0x29, 0x93, 0x67, 0xE8, 0x23, 0x4C }}
1610 #define EFI_ACPI_6_5_NFIT_GUID_NVDIMM_BLOCK_DATA_WINDOW_REGION                     { 0x91AF0530, 0x5D86, 0x470E, { 0xA6, 0xB0, 0x0A, 0x2D, 0xB9, 0x40, 0x82, 0x49 }}
1611 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_VOLATILE    { 0x77AB535A, 0x45FC, 0x6.5B, { 0x55, 0x60, 0xF7, 0xB2, 0x81, 0xD1, 0xF9, 0x6E }}
1612 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_VOLATILE      { 0x3D5ABD30, 0x4175, 0x87CE, { 0x6D, 0x64, 0xD2, 0xAD, 0xE5, 0x23, 0xC4, 0xBB }}
1613 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_DISK_REGION_PERSISTENT  { 0x5CEA02C9, 0x4D07, 0x69D3, { 0x26, 0x9F ,0x44, 0x96, 0xFB, 0xE0, 0x96, 0xF9 }}
1614 #define EFI_ACPI_6_5_NFIT_GUID_RAM_DISK_SUPPORTING_VIRTUAL_CD_REGION_PERSISTENT    { 0x08018188, 0x42CD, 0xBB48, { 0x10, 0x0F, 0x53, 0x87, 0xD5, 0x3D, 0xED, 0x3D }}
1615
1616 typedef struct {
1617   UINT16    Type;
1618   UINT16    Length;
1619   UINT16    SPARangeStructureIndex;
1620   UINT16    Flags;
1621   UINT32    Reserved_8;
1622   UINT32    ProximityDomain;
1623   GUID      AddressRangeTypeGUID;
1624   UINT64    SystemPhysicalAddressRangeBase;
1625   UINT64    SystemPhysicalAddressRangeLength;
1626   UINT64    AddressRangeMemoryMappingAttribute;
1627   UINT64    SPALocationCookie;
1628 } EFI_ACPI_6_5_NFIT_SYSTEM_PHYSICAL_ADDRESS_RANGE_STRUCTURE;
1629
1630 //
1631 // Definition for Memory Device to System Physical Address Range Mapping Structure
1632 //
1633 typedef struct {
1634   UINT32    DIMMNumber          : 4;
1635   UINT32    MemoryChannelNumber : 4;
1636   UINT32    MemoryControllerID  : 4;
1637   UINT32    SocketID            : 4;
1638   UINT32    NodeControllerID    : 12;
1639   UINT32    Reserved_28         : 4;
1640 } EFI_ACPI_6_5_NFIT_DEVICE_HANDLE;
1641
1642 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PREVIOUS_SAVE_FAIL                                      BIT0
1643 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_LAST_RESTORE_FAIL                                       BIT1
1644 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_PLATFORM_FLUSH_FAIL                                     BIT2
1645 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_NOT_ARMED_PRIOR_TO_OSPM_HAND_OFF                        BIT3
1646 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_SMART_HEALTH_EVENTS_PRIOR_OSPM_HAND_OFF                 BIT4
1647 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_ENABLED_TO_NOTIFY_OSPM_ON_SMART_HEALTH_EVENTS  BIT5
1648 #define EFI_ACPI_6_5_NFIT_MEMORY_DEVICE_STATE_FLAGS_FIRMWARE_NOT_MAP_NVDIMM_TO_SPA                          BIT6
1649
1650 typedef struct {
1651   UINT16                             Type;
1652   UINT16                             Length;
1653   EFI_ACPI_6_5_NFIT_DEVICE_HANDLE    NFITDeviceHandle;
1654   UINT16                             NVDIMMPhysicalID;
1655   UINT16                             NVDIMMRegionID;
1656   UINT16                             SPARangeStructureIndex;
1657   UINT16                             NVDIMMControlRegionStructureIndex;
1658   UINT64                             NVDIMMRegionSize;
1659   UINT64                             RegionOffset;
1660   UINT64                             NVDIMMPhysicalAddressRegionBase;
1661   UINT16                             InterleaveStructureIndex;
1662   UINT16                             InterleaveWays;
1663   UINT16                             NVDIMMStateFlags;
1664   UINT16                             Reserved_46;
1665 } EFI_ACPI_6_5_NFIT_NVDIMM_REGION_MAPPING_STRUCTURE;
1666
1667 //
1668 // Definition for Interleave Structure
1669 //
1670 typedef struct {
1671   UINT16    Type;
1672   UINT16    Length;
1673   UINT16    InterleaveStructureIndex;
1674   UINT16    Reserved_6;
1675   UINT32    NumberOfLines;
1676   UINT32    LineSize;
1677   // UINT32                                      LineOffset[NumberOfLines];
1678 } EFI_ACPI_6_5_NFIT_INTERLEAVE_STRUCTURE;
1679
1680 //
1681 // Definition for SMBIOS Management Information Structure
1682 //
1683 typedef struct {
1684   UINT16    Type;
1685   UINT16    Length;
1686   UINT32    Reserved_4;
1687   // UINT8                                       Data[];
1688 } EFI_ACPI_6_5_NFIT_SMBIOS_MANAGEMENT_INFORMATION_STRUCTURE;
1689
1690 //
1691 // Definition for NVDIMM Control Region Structure
1692 //
1693 #define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_VALID_FIELDS_MANUFACTURING  BIT0
1694
1695 #define EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_FLAGS_BLOCK_DATA_WINDOWS_BUFFERED  BIT0
1696
1697 typedef struct {
1698   UINT16    Type;
1699   UINT16    Length;
1700   UINT16    NVDIMMControlRegionStructureIndex;
1701   UINT16    VendorID;
1702   UINT16    DeviceID;
1703   UINT16    RevisionID;
1704   UINT16    SubsystemVendorID;
1705   UINT16    SubsystemDeviceID;
1706   UINT16    SubsystemRevisionID;
1707   UINT8     ValidFields;
1708   UINT8     ManufacturingLocation;
1709   UINT16    ManufacturingDate;
1710   UINT8     Reserved_22[2];
1711   UINT32    SerialNumber;
1712   UINT16    RegionFormatInterfaceCode;
1713   UINT16    NumberOfBlockControlWindows;
1714   UINT64    SizeOfBlockControlWindow;
1715   UINT64    CommandRegisterOffsetInBlockControlWindow;
1716   UINT64    SizeOfCommandRegisterInBlockControlWindows;
1717   UINT64    StatusRegisterOffsetInBlockControlWindow;
1718   UINT64    SizeOfStatusRegisterInBlockControlWindows;
1719   UINT16    NVDIMMControlRegionFlag;
1720   UINT8     Reserved_74[6];
1721 } EFI_ACPI_6_5_NFIT_NVDIMM_CONTROL_REGION_STRUCTURE;
1722
1723 //
1724 // Definition for NVDIMM Block Data Window Region Structure
1725 //
1726 typedef struct {
1727   UINT16    Type;
1728   UINT16    Length;
1729   UINT16    NVDIMMControlRegionStructureIndex;
1730   UINT16    NumberOfBlockDataWindows;
1731   UINT64    BlockDataWindowStartOffset;
1732   UINT64    SizeOfBlockDataWindow;
1733   UINT64    BlockAccessibleMemoryCapacity;
1734   UINT64    BeginningAddressOfFirstBlockInBlockAccessibleMemory;
1735 } EFI_ACPI_6_5_NFIT_NVDIMM_BLOCK_DATA_WINDOW_REGION_STRUCTURE;
1736
1737 //
1738 // Definition for Flush Hint Address Structure
1739 //
1740 typedef struct {
1741   UINT16                             Type;
1742   UINT16                             Length;
1743   EFI_ACPI_6_5_NFIT_DEVICE_HANDLE    NFITDeviceHandle;
1744   UINT16                             NumberOfFlushHintAddresses;
1745   UINT8                              Reserved_10[6];
1746   // UINT64                                      FlushHintAddress[NumberOfFlushHintAddresses];
1747 } EFI_ACPI_6_5_NFIT_FLUSH_HINT_ADDRESS_STRUCTURE;
1748
1749 //
1750 // Definition for Platform Capabilities Structure
1751 //
1752 typedef struct {
1753   UINT16    Type;
1754   UINT16    Length;
1755   UINT8     HighestValidCapability;
1756   UINT8     Reserved_5[3];
1757   UINT32    Capabilities;
1758   UINT8     Reserved_12[4];
1759 } EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITIES_STRUCTURE;
1760
1761 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_CPU_CACHE_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS          BIT0
1762 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_MEMORY_CONTROLLER_FLUSH_TO_NVDIMM_DURABILITY_ON_POWER_LOSS  BIT1
1763 #define EFI_ACPI_6_5_NFIT_PLATFORM_CAPABILITY_BYTE_ADDRESSABLE_PERSISTENT_MEMORY_HARDWARE_MIRRORING       BIT2
1764
1765 ///
1766 /// Secure DEVices Table (SDEV)
1767 ///
1768 typedef struct {
1769   EFI_ACPI_DESCRIPTION_HEADER    Header;
1770 } EFI_ACPI_6_5_SECURE_DEVICES_TABLE_HEADER;
1771
1772 ///
1773 /// SDEV Revision (as defined in ACPI 6.5 spec.)
1774 ///
1775 #define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_REVISION  0x01
1776
1777 ///
1778 /// Secure Device types
1779 ///
1780 #define EFI_ACPI_6_5_SDEV_TYPE_ACPI_NAMESPACE_DEVICE  0x00
1781 #define EFI_ACPI_6_5_SDEV_TYPE_PCIE_ENDPOINT_DEVICE   0x01
1782
1783 ///
1784 /// Secure Device flags
1785 ///
1786 #define EFI_ACPI_6_5_SDEV_FLAG_ALLOW_HANDOFF                     BIT0
1787 #define EFI_ACPI_6_5_SDEV_FLAG_SECURE_ACCESS_COMPONENTS_PRESENT  BIT1
1788
1789 ///
1790 /// SDEV Structure Header
1791 ///
1792 typedef struct {
1793   UINT8     Type;
1794   UINT8     Flags;
1795   UINT16    Length;
1796 } EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER;
1797
1798 ///
1799 /// ACPI_NAMESPACE_DEVICE based Secure Device Structure
1800 ///
1801 typedef struct {
1802   EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER    Header;
1803   UINT16                                DeviceIdentifierOffset;
1804   UINT16                                DeviceIdentifierLength;
1805   UINT16                                VendorSpecificDataOffset;
1806   UINT16                                VendorSpecificDataLength;
1807   UINT16                                SecureAccessComponentsOffset;
1808   UINT16                                SecureAccessComponentsLength;
1809 } EFI_ACPI_6_5_SDEV_STRUCTURE_ACPI_NAMESPACE_DEVICE;
1810
1811 ///
1812 /// Secure Access Component Types
1813 ///
1814 #define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_IDENTIFICATION  0x00
1815 #define EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_TYPE_MEMORY          0x01
1816
1817 ///
1818 /// Identification Based Secure Access Component
1819 ///
1820 typedef struct {
1821   EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER    Header;
1822   UINT16                                HardwareIdentifierOffset;
1823   UINT16                                HardwareIdentifierLength;
1824   UINT16                                SubsystemIdentifierOffset;
1825   UINT16                                SubsystemIdentifierLength;
1826   UINT16                                HardwareRevision;
1827   UINT8                                 HardwareRevisionPresent;
1828   UINT8                                 ClassCodePresent;
1829   UINT8                                 PciCompatibleBaseClass;
1830   UINT8                                 PciCompatibleSubClass;
1831   UINT8                                 PciCompatibleProgrammingInterface;
1832 } EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_IDENTIFICATION_STRUCTURE;
1833
1834 ///
1835 /// Memory-based Secure Access Component
1836 ///
1837 typedef struct {
1838   EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER    Header;
1839   UINT32                                Reserved;
1840   UINT64                                MemoryAddressBase;
1841   UINT64                                MemoryLength;
1842 } EFI_ACPI_6_5_SDEV_SECURE_ACCESS_COMPONENT_MEMORY_STRUCTURE;
1843
1844 ///
1845 /// PCIe Endpoint Device based Secure Device Structure
1846 ///
1847 typedef struct {
1848   EFI_ACPI_6_5_SDEV_STRUCTURE_HEADER    Header;
1849   UINT16                                PciSegmentNumber;
1850   UINT16                                StartBusNumber;
1851   UINT16                                PciPathOffset;
1852   UINT16                                PciPathLength;
1853   UINT16                                VendorSpecificDataOffset;
1854   UINT16                                VendorSpecificDataLength;
1855 } EFI_ACPI_6_5_SDEV_STRUCTURE_PCIE_ENDPOINT_DEVICE;
1856
1857 ///
1858 /// Boot Error Record Table (BERT)
1859 ///
1860 typedef struct {
1861   EFI_ACPI_DESCRIPTION_HEADER    Header;
1862   UINT32                         BootErrorRegionLength;
1863   UINT64                         BootErrorRegion;
1864 } EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_HEADER;
1865
1866 ///
1867 /// BERT Version (as defined in ACPI 6.5 spec.)
1868 ///
1869 #define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_REVISION  0x01
1870
1871 ///
1872 /// Boot Error Region Block Status Definition
1873 ///
1874 typedef struct {
1875   UINT32    UncorrectableErrorValid     : 1;
1876   UINT32    CorrectableErrorValid       : 1;
1877   UINT32    MultipleUncorrectableErrors : 1;
1878   UINT32    MultipleCorrectableErrors   : 1;
1879   UINT32    ErrorDataEntryCount         : 10;
1880   UINT32    Reserved                    : 18;
1881 } EFI_ACPI_6_5_ERROR_BLOCK_STATUS;
1882
1883 ///
1884 /// Boot Error Region Definition
1885 ///
1886 typedef struct {
1887   EFI_ACPI_6_5_ERROR_BLOCK_STATUS    BlockStatus;
1888   UINT32                             RawDataOffset;
1889   UINT32                             RawDataLength;
1890   UINT32                             DataLength;
1891   UINT32                             ErrorSeverity;
1892 } EFI_ACPI_6_5_BOOT_ERROR_REGION_STRUCTURE;
1893
1894 //
1895 // Boot Error Severity types
1896 //
1897 #define EFI_ACPI_6_5_ERROR_SEVERITY_RECOVERABLE  0x00
1898 #define EFI_ACPI_6_5_ERROR_SEVERITY_FATAL        0x01
1899 #define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTED    0x02
1900 #define EFI_ACPI_6_5_ERROR_SEVERITY_NONE         0x03
1901 //
1902 // The term 'Correctable' is no longer being used as an error severity of the
1903 // reported error since ACPI Specification Version 5.1 Errata B.
1904 // The below macro is considered as deprecated and should no longer be used.
1905 //
1906 #define EFI_ACPI_6_5_ERROR_SEVERITY_CORRECTABLE  0x00
1907
1908 ///
1909 /// Generic Error Data Entry Definition
1910 ///
1911 typedef struct {
1912   UINT8     SectionType[16];
1913   UINT32    ErrorSeverity;
1914   UINT16    Revision;
1915   UINT8     ValidationBits;
1916   UINT8     Flags;
1917   UINT32    ErrorDataLength;
1918   UINT8     FruId[16];
1919   UINT8     FruText[20];
1920   UINT8     Timestamp[8];
1921 } EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_STRUCTURE;
1922
1923 ///
1924 /// Generic Error Data Entry Version (as defined in ACPI 6.5 spec.)
1925 ///
1926 #define EFI_ACPI_6_5_GENERIC_ERROR_DATA_ENTRY_REVISION  0x0300
1927
1928 ///
1929 /// HEST - Hardware Error Source Table
1930 ///
1931 typedef struct {
1932   EFI_ACPI_DESCRIPTION_HEADER    Header;
1933   UINT32                         ErrorSourceCount;
1934 } EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_HEADER;
1935
1936 ///
1937 /// HEST Version (as defined in ACPI 6.5 spec.)
1938 ///
1939 #define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_REVISION  0x01
1940
1941 //
1942 // Error Source structure types.
1943 //
1944 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION  0x00
1945 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK  0x01
1946 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR                0x02
1947 #define EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER                  0x06
1948 #define EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER                     0x07
1949 #define EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER                     0x08
1950 #define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR                     0x09
1951 #define EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_VERSION_2           0x0A
1952 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK   0x0B
1953
1954 //
1955 // Error Source structure flags.
1956 //
1957 #define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_FIRMWARE_FIRST  (1 << 0)
1958 #define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GLOBAL          (1 << 1)
1959 #define EFI_ACPI_6_5_ERROR_SOURCE_FLAG_GHES_ASSIST     (1 << 2)
1960
1961 ///
1962 /// IA-32 Architecture Machine Check Exception Structure Definition
1963 ///
1964 typedef struct {
1965   UINT16    Type;
1966   UINT16    SourceId;
1967   UINT8     Reserved0[2];
1968   UINT8     Flags;
1969   UINT8     Enabled;
1970   UINT32    NumberOfRecordsToPreAllocate;
1971   UINT32    MaxSectionsPerRecord;
1972   UINT64    GlobalCapabilityInitData;
1973   UINT64    GlobalControlInitData;
1974   UINT8     NumberOfHardwareBanks;
1975   UINT8     Reserved1[7];
1976 } EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_EXCEPTION_STRUCTURE;
1977
1978 ///
1979 /// IA-32 Architecture Machine Check Bank Structure Definition
1980 ///
1981 typedef struct {
1982   UINT8     BankNumber;
1983   UINT8     ClearStatusOnInitialization;
1984   UINT8     StatusDataFormat;
1985   UINT8     Reserved0;
1986   UINT32    ControlRegisterMsrAddress;
1987   UINT64    ControlInitData;
1988   UINT32    StatusRegisterMsrAddress;
1989   UINT32    AddressRegisterMsrAddress;
1990   UINT32    MiscRegisterMsrAddress;
1991 } EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_BANK_STRUCTURE;
1992
1993 ///
1994 /// IA-32 Architecture Machine Check Bank Structure MCA data format
1995 ///
1996 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_IA32     0x00
1997 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_INTEL64  0x01
1998 #define EFI_ACPI_6_5_IA32_ARCHITECTURE_MACHINE_CHECK_ERROR_DATA_FORMAT_AMD64    0x02
1999
2000 //
2001 // Hardware Error Notification types. All other values are reserved
2002 //
2003 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_POLLED                        0x00
2004 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_EXTERNAL_INTERRUPT            0x01
2005 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_LOCAL_INTERRUPT               0x02
2006 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SCI                           0x03
2007 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_NMI                           0x04
2008 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CMCI                          0x05
2009 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_MCE                           0x06
2010 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GPIO_SIGNAL                   0x07
2011 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEA                     0x08
2012 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_ARMV8_SEI                     0x09
2013 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_GSIV                          0x0A
2014 #define EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_SOFTWARE_DELEGATED_EXCEPTION  0x0B
2015
2016 ///
2017 /// Hardware Error Notification Configuration Write Enable Structure Definition
2018 ///
2019 typedef struct {
2020   UINT16    Type                           : 1;
2021   UINT16    PollInterval                   : 1;
2022   UINT16    SwitchToPollingThresholdValue  : 1;
2023   UINT16    SwitchToPollingThresholdWindow : 1;
2024   UINT16    ErrorThresholdValue            : 1;
2025   UINT16    ErrorThresholdWindow           : 1;
2026   UINT16    Reserved                       : 10;
2027 } EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE;
2028
2029 ///
2030 /// Hardware Error Notification Structure Definition
2031 ///
2032 typedef struct {
2033   UINT8                                                                            Type;
2034   UINT8                                                                            Length;
2035   EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_CONFIGURATION_WRITE_ENABLE_STRUCTURE    ConfigurationWriteEnable;
2036   UINT32                                                                           PollInterval;
2037   UINT32                                                                           Vector;
2038   UINT32                                                                           SwitchToPollingThresholdValue;
2039   UINT32                                                                           SwitchToPollingThresholdWindow;
2040   UINT32                                                                           ErrorThresholdValue;
2041   UINT32                                                                           ErrorThresholdWindow;
2042 } EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE;
2043
2044 ///
2045 /// IA-32 Architecture Corrected Machine Check Structure Definition
2046 ///
2047 typedef struct {
2048   UINT16                                                Type;
2049   UINT16                                                SourceId;
2050   UINT8                                                 Reserved0[2];
2051   UINT8                                                 Flags;
2052   UINT8                                                 Enabled;
2053   UINT32                                                NumberOfRecordsToPreAllocate;
2054   UINT32                                                MaxSectionsPerRecord;
2055   EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE    NotificationStructure;
2056   UINT8                                                 NumberOfHardwareBanks;
2057   UINT8                                                 Reserved1[3];
2058 } EFI_ACPI_6_5_IA32_ARCHITECTURE_CORRECTED_MACHINE_CHECK_STRUCTURE;
2059
2060 ///
2061 /// IA-32 Architecture NMI Error Structure Definition
2062 ///
2063 typedef struct {
2064   UINT16    Type;
2065   UINT16    SourceId;
2066   UINT8     Reserved0[2];
2067   UINT32    NumberOfRecordsToPreAllocate;
2068   UINT32    MaxSectionsPerRecord;
2069   UINT32    MaxRawDataLength;
2070 } EFI_ACPI_6_5_IA32_ARCHITECTURE_NMI_ERROR_STRUCTURE;
2071
2072 ///
2073 /// PCI Express Root Port AER Structure Definition
2074 ///
2075 typedef struct {
2076   UINT16    Type;
2077   UINT16    SourceId;
2078   UINT8     Reserved0[2];
2079   UINT8     Flags;
2080   UINT8     Enabled;
2081   UINT32    NumberOfRecordsToPreAllocate;
2082   UINT32    MaxSectionsPerRecord;
2083   UINT32    Bus;
2084   UINT16    Device;
2085   UINT16    Function;
2086   UINT16    DeviceControl;
2087   UINT8     Reserved1[2];
2088   UINT32    UncorrectableErrorMask;
2089   UINT32    UncorrectableErrorSeverity;
2090   UINT32    CorrectableErrorMask;
2091   UINT32    AdvancedErrorCapabilitiesAndControl;
2092   UINT32    RootErrorCommand;
2093 } EFI_ACPI_6_5_PCI_EXPRESS_ROOT_PORT_AER_STRUCTURE;
2094
2095 ///
2096 /// PCI Express Device AER Structure Definition
2097 ///
2098 typedef struct {
2099   UINT16    Type;
2100   UINT16    SourceId;
2101   UINT8     Reserved0[2];
2102   UINT8     Flags;
2103   UINT8     Enabled;
2104   UINT32    NumberOfRecordsToPreAllocate;
2105   UINT32    MaxSectionsPerRecord;
2106   UINT32    Bus;
2107   UINT16    Device;
2108   UINT16    Function;
2109   UINT16    DeviceControl;
2110   UINT8     Reserved1[2];
2111   UINT32    UncorrectableErrorMask;
2112   UINT32    UncorrectableErrorSeverity;
2113   UINT32    CorrectableErrorMask;
2114   UINT32    AdvancedErrorCapabilitiesAndControl;
2115 } EFI_ACPI_6_5_PCI_EXPRESS_DEVICE_AER_STRUCTURE;
2116
2117 ///
2118 /// PCI Express Bridge AER Structure Definition
2119 ///
2120 typedef struct {
2121   UINT16    Type;
2122   UINT16    SourceId;
2123   UINT8     Reserved0[2];
2124   UINT8     Flags;
2125   UINT8     Enabled;
2126   UINT32    NumberOfRecordsToPreAllocate;
2127   UINT32    MaxSectionsPerRecord;
2128   UINT32    Bus;
2129   UINT16    Device;
2130   UINT16    Function;
2131   UINT16    DeviceControl;
2132   UINT8     Reserved1[2];
2133   UINT32    UncorrectableErrorMask;
2134   UINT32    UncorrectableErrorSeverity;
2135   UINT32    CorrectableErrorMask;
2136   UINT32    AdvancedErrorCapabilitiesAndControl;
2137   UINT32    SecondaryUncorrectableErrorMask;
2138   UINT32    SecondaryUncorrectableErrorSeverity;
2139   UINT32    SecondaryAdvancedErrorCapabilitiesAndControl;
2140 } EFI_ACPI_6_5_PCI_EXPRESS_BRIDGE_AER_STRUCTURE;
2141
2142 ///
2143 /// Generic Hardware Error Source Structure Definition
2144 ///
2145 typedef struct {
2146   UINT16                                                Type;
2147   UINT16                                                SourceId;
2148   UINT16                                                RelatedSourceId;
2149   UINT8                                                 Flags;
2150   UINT8                                                 Enabled;
2151   UINT32                                                NumberOfRecordsToPreAllocate;
2152   UINT32                                                MaxSectionsPerRecord;
2153   UINT32                                                MaxRawDataLength;
2154   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE                ErrorStatusAddress;
2155   EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE    NotificationStructure;
2156   UINT32                                                ErrorStatusBlockLength;
2157 } EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_STRUCTURE;
2158
2159 ///
2160 /// Generic Hardware Error Source Version 2 Structure Definition
2161 ///
2162 typedef struct {
2163   UINT16                                                Type;
2164   UINT16                                                SourceId;
2165   UINT16                                                RelatedSourceId;
2166   UINT8                                                 Flags;
2167   UINT8                                                 Enabled;
2168   UINT32                                                NumberOfRecordsToPreAllocate;
2169   UINT32                                                MaxSectionsPerRecord;
2170   UINT32                                                MaxRawDataLength;
2171   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE                ErrorStatusAddress;
2172   EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE    NotificationStructure;
2173   UINT32                                                ErrorStatusBlockLength;
2174   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE                ReadAckRegister;
2175   UINT64                                                ReadAckPreserve;
2176   UINT64                                                ReadAckWrite;
2177 } EFI_ACPI_6_5_GENERIC_HARDWARE_ERROR_SOURCE_VERSION_2_STRUCTURE;
2178
2179 ///
2180 /// Generic Error Status Definition
2181 ///
2182 typedef struct {
2183   EFI_ACPI_6_5_ERROR_BLOCK_STATUS    BlockStatus;
2184   UINT32                             RawDataOffset;
2185   UINT32                             RawDataLength;
2186   UINT32                             DataLength;
2187   UINT32                             ErrorSeverity;
2188 } EFI_ACPI_6_5_GENERIC_ERROR_STATUS_STRUCTURE;
2189
2190 ///
2191 /// IA-32 Architecture Deferred Machine Check Structure Definition
2192 ///
2193 typedef struct {
2194   UINT16                                                Type;
2195   UINT16                                                SourceId;
2196   UINT8                                                 Reserved0[2];
2197   UINT8                                                 Flags;
2198   UINT8                                                 Enabled;
2199   UINT32                                                NumberOfRecordsToPreAllocate;
2200   UINT32                                                MaxSectionsPerRecord;
2201   EFI_ACPI_6_5_HARDWARE_ERROR_NOTIFICATION_STRUCTURE    NotificationStructure;
2202   UINT8                                                 NumberOfHardwareBanks;
2203   UINT8                                                 Reserved1[3];
2204 } EFI_ACPI_6_5_IA32_ARCHITECTURE_DEFERRED_MACHINE_CHECK_STRUCTURE;
2205
2206 ///
2207 /// HMAT - Heterogeneous Memory Attribute Table
2208 ///
2209 typedef struct {
2210   EFI_ACPI_DESCRIPTION_HEADER    Header;
2211   UINT8                          Reserved[4];
2212 } EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_HEADER;
2213
2214 ///
2215 /// HMAT Revision (as defined in ACPI 6.5 spec.)
2216 ///
2217 #define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_REVISION  0x02
2218
2219 ///
2220 /// HMAT types
2221 ///
2222 #define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES          0x00
2223 #define EFI_ACPI_6_5_HMAT_TYPE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO  0x01
2224 #define EFI_ACPI_6_5_HMAT_TYPE_MEMORY_SIDE_CACHE_INFO                      0x02
2225
2226 ///
2227 /// HMAT Structure Header
2228 ///
2229 typedef struct {
2230   UINT16    Type;
2231   UINT8     Reserved[2];
2232   UINT32    Length;
2233 } EFI_ACPI_6_5_HMAT_STRUCTURE_HEADER;
2234
2235 ///
2236 /// Memory Proximity Domain Attributes Structure flags
2237 ///
2238 typedef struct {
2239   UINT16    InitiatorProximityDomainValid : 1;
2240   UINT16    Reserved                      : 15;
2241 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS;
2242
2243 ///
2244 /// Memory Proximity Domain Attributes Structure
2245 ///
2246 typedef struct {
2247   UINT16                                                                  Type;
2248   UINT8                                                                   Reserved[2];
2249   UINT32                                                                  Length;
2250   EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_FLAGS    Flags;
2251   UINT8                                                                   Reserved1[2];
2252   UINT32                                                                  InitiatorProximityDomain;
2253   UINT32                                                                  MemoryProximityDomain;
2254   UINT8                                                                   Reserved2[20];
2255 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES;
2256
2257 ///
2258 /// System Locality Latency and Bandwidth Information Structure flags
2259 ///
2260 typedef struct {
2261   UINT8    MemoryHierarchy  : 4;
2262   UINT8    AccessAttributes : 2;
2263   UINT8    Reserved         : 2;
2264 } EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS;
2265
2266 ///
2267 /// System Locality Latency and Bandwidth Information Structure
2268 ///
2269 typedef struct {
2270   UINT16                                                                          Type;
2271   UINT8                                                                           Reserved[2];
2272   UINT32                                                                          Length;
2273   EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO_FLAGS    Flags;
2274   UINT8                                                                           DataType;
2275   UINT8                                                                           MinTransferSize;
2276   UINT8                                                                           Reserved1;
2277   UINT32                                                                          NumberOfInitiatorProximityDomains;
2278   UINT32                                                                          NumberOfTargetProximityDomains;
2279   UINT8                                                                           Reserved2[4];
2280   UINT64                                                                          EntryBaseUnit;
2281 } EFI_ACPI_6_5_HMAT_STRUCTURE_SYSTEM_LOCALITY_LATENCY_AND_BANDWIDTH_INFO;
2282
2283 ///
2284 /// Memory Side Cache Information Structure cache attributes
2285 ///
2286 typedef struct {
2287   UINT32    TotalCacheLevels   : 4;
2288   UINT32    CacheLevel         : 4;
2289   UINT32    CacheAssociativity : 4;
2290   UINT32    WritePolicy        : 4;
2291   UINT32    CacheLineSize      : 16;
2292 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES;
2293
2294 ///
2295 /// Memory Side Cache Information Structure
2296 ///
2297 typedef struct {
2298   UINT16                                                                 Type;
2299   UINT8                                                                  Reserved[2];
2300   UINT32                                                                 Length;
2301   UINT32                                                                 MemoryProximityDomain;
2302   UINT8                                                                  Reserved1[4];
2303   UINT64                                                                 MemorySideCacheSize;
2304   EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO_CACHE_ATTRIBUTES    CacheAttributes;
2305   UINT8                                                                  Reserved2[2];
2306   UINT16                                                                 NumberOfSmbiosHandles;
2307 } EFI_ACPI_6_5_HMAT_STRUCTURE_MEMORY_SIDE_CACHE_INFO;
2308
2309 ///
2310 /// ERST - Error Record Serialization Table
2311 ///
2312 typedef struct {
2313   EFI_ACPI_DESCRIPTION_HEADER    Header;
2314   UINT32                         SerializationHeaderSize;
2315   UINT8                          Reserved0[4];
2316   UINT32                         InstructionEntryCount;
2317 } EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_HEADER;
2318
2319 ///
2320 /// ERST Version (as defined in ACPI 6.5 spec.)
2321 ///
2322 #define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_REVISION  0x01
2323
2324 ///
2325 /// ERST Serialization Actions
2326 ///
2327 #define EFI_ACPI_6_5_ERST_BEGIN_WRITE_OPERATION                   0x00
2328 #define EFI_ACPI_6_5_ERST_BEGIN_READ_OPERATION                    0x01
2329 #define EFI_ACPI_6_5_ERST_BEGIN_CLEAR_OPERATION                   0x02
2330 #define EFI_ACPI_6_5_ERST_END_OPERATION                           0x03
2331 #define EFI_ACPI_6_5_ERST_SET_RECORD_OFFSET                       0x04
2332 #define EFI_ACPI_6_5_ERST_EXECUTE_OPERATION                       0x05
2333 #define EFI_ACPI_6_5_ERST_CHECK_BUSY_STATUS                       0x06
2334 #define EFI_ACPI_6_5_ERST_GET_COMMAND_STATUS                      0x07
2335 #define EFI_ACPI_6_5_ERST_GET_RECORD_IDENTIFIER                   0x08
2336 #define EFI_ACPI_6_5_ERST_SET_RECORD_IDENTIFIER                   0x09
2337 #define EFI_ACPI_6_5_ERST_GET_RECORD_COUNT                        0x0A
2338 #define EFI_ACPI_6_5_ERST_BEGIN_DUMMY_WRITE_OPERATION             0x0B
2339 #define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE             0x0D
2340 #define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_LENGTH      0x0E
2341 #define EFI_ACPI_6_5_ERST_GET_ERROR_LOG_ADDRESS_RANGE_ATTRIBUTES  0x0F
2342 #define EFI_ACPI_6_5_ERST_GET_EXECUTE_OPERATION_TIMINGS           0x10
2343
2344 ///
2345 /// ERST Action Command Status
2346 ///
2347 #define EFI_ACPI_6_5_ERST_STATUS_SUCCESS                 0x00
2348 #define EFI_ACPI_6_5_ERST_STATUS_NOT_ENOUGH_SPACE        0x01
2349 #define EFI_ACPI_6_5_ERST_STATUS_HARDWARE_NOT_AVAILABLE  0x02
2350 #define EFI_ACPI_6_5_ERST_STATUS_FAILED                  0x03
2351 #define EFI_ACPI_6_5_ERST_STATUS_RECORD_STORE_EMPTY      0x04
2352 #define EFI_ACPI_6_5_ERST_STATUS_RECORD_NOT_FOUND        0x05
2353
2354 ///
2355 /// ERST Serialization Instructions
2356 ///
2357 #define EFI_ACPI_6_5_ERST_READ_REGISTER                  0x00
2358 #define EFI_ACPI_6_5_ERST_READ_REGISTER_VALUE            0x01
2359 #define EFI_ACPI_6_5_ERST_WRITE_REGISTER                 0x02
2360 #define EFI_ACPI_6_5_ERST_WRITE_REGISTER_VALUE           0x03
2361 #define EFI_ACPI_6_5_ERST_NOOP                           0x04
2362 #define EFI_ACPI_6_5_ERST_LOAD_VAR1                      0x05
2363 #define EFI_ACPI_6_5_ERST_LOAD_VAR2                      0x06
2364 #define EFI_ACPI_6_5_ERST_STORE_VAR1                     0x07
2365 #define EFI_ACPI_6_5_ERST_ADD                            0x08
2366 #define EFI_ACPI_6_5_ERST_SUBTRACT                       0x09
2367 #define EFI_ACPI_6_5_ERST_ADD_VALUE                      0x0A
2368 #define EFI_ACPI_6_5_ERST_SUBTRACT_VALUE                 0x0B
2369 #define EFI_ACPI_6_5_ERST_STALL                          0x0C
2370 #define EFI_ACPI_6_5_ERST_STALL_WHILE_TRUE               0x0D
2371 #define EFI_ACPI_6_5_ERST_SKIP_NEXT_INSTRUCTION_IF_TRUE  0x0E
2372 #define EFI_ACPI_6_5_ERST_GOTO                           0x0F
2373 #define EFI_ACPI_6_5_ERST_SET_SRC_ADDRESS_BASE           0x10
2374 #define EFI_ACPI_6_5_ERST_SET_DST_ADDRESS_BASE           0x11
2375 #define EFI_ACPI_6_5_ERST_MOVE_DATA                      0x12
2376
2377 ///
2378 /// ERST Instruction Flags
2379 ///
2380 #define EFI_ACPI_6_5_ERST_PRESERVE_REGISTER  0x01
2381
2382 ///
2383 /// ERST Serialization Instruction Entry
2384 ///
2385 typedef struct {
2386   UINT8                                     SerializationAction;
2387   UINT8                                     Instruction;
2388   UINT8                                     Flags;
2389   UINT8                                     Reserved0;
2390   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    RegisterRegion;
2391   UINT64                                    Value;
2392   UINT64                                    Mask;
2393 } EFI_ACPI_6_5_ERST_SERIALIZATION_INSTRUCTION_ENTRY;
2394
2395 ///
2396 /// EINJ - Error Injection Table
2397 ///
2398 typedef struct {
2399   EFI_ACPI_DESCRIPTION_HEADER    Header;
2400   UINT32                         InjectionHeaderSize;
2401   UINT8                          InjectionFlags;
2402   UINT8                          Reserved0[3];
2403   UINT32                         InjectionEntryCount;
2404 } EFI_ACPI_6_5_ERROR_INJECTION_TABLE_HEADER;
2405
2406 ///
2407 /// EINJ Version (as defined in ACPI 6.5 spec.)
2408 ///
2409 #define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_REVISION  0x01
2410
2411 ///
2412 /// EINJ Error Injection Actions
2413 ///
2414 #define EFI_ACPI_6_5_EINJ_BEGIN_INJECTION_OPERATION       0x00
2415 #define EFI_ACPI_6_5_EINJ_GET_TRIGGER_ERROR_ACTION_TABLE  0x01
2416 #define EFI_ACPI_6_5_EINJ_SET_ERROR_TYPE                  0x02
2417 #define EFI_ACPI_6_5_EINJ_GET_ERROR_TYPE                  0x03
2418 #define EFI_ACPI_6_5_EINJ_END_OPERATION                   0x04
2419 #define EFI_ACPI_6_5_EINJ_EXECUTE_OPERATION               0x05
2420 #define EFI_ACPI_6_5_EINJ_CHECK_BUSY_STATUS               0x06
2421 #define EFI_ACPI_6_5_EINJ_GET_COMMAND_STATUS              0x07
2422 #define EFI_ACPI_6_5_EINJ_TRIGGER_ERROR                   0xFF
2423
2424 ///
2425 /// EINJ Action Command Status
2426 ///
2427 #define EFI_ACPI_6_5_EINJ_STATUS_SUCCESS          0x00
2428 #define EFI_ACPI_6_5_EINJ_STATUS_UNKNOWN_FAILURE  0x01
2429 #define EFI_ACPI_6_5_EINJ_STATUS_INVALID_ACCESS   0x02
2430
2431 ///
2432 /// EINJ Error Type Definition
2433 ///
2434 #define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_CORRECTABLE               (1 << 0)
2435 #define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_NONFATAL    (1 << 1)
2436 #define EFI_ACPI_6_5_EINJ_ERROR_PROCESSOR_UNCORRECTABLE_FATAL       (1 << 2)
2437 #define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_CORRECTABLE                  (1 << 3)
2438 #define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_NONFATAL       (1 << 4)
2439 #define EFI_ACPI_6_5_EINJ_ERROR_MEMORY_UNCORRECTABLE_FATAL          (1 << 5)
2440 #define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_CORRECTABLE             (1 << 6)
2441 #define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_NONFATAL  (1 << 7)
2442 #define EFI_ACPI_6_5_EINJ_ERROR_PCI_EXPRESS_UNCORRECTABLE_FATAL     (1 << 8)
2443 #define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_CORRECTABLE                (1 << 9)
2444 #define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_NONFATAL     (1 << 10)
2445 #define EFI_ACPI_6_5_EINJ_ERROR_PLATFORM_UNCORRECTABLE_FATAL        (1 << 11)
2446
2447 ///
2448 /// EINJ Injection Instructions
2449 ///
2450 #define EFI_ACPI_6_5_EINJ_READ_REGISTER         0x00
2451 #define EFI_ACPI_6_5_EINJ_READ_REGISTER_VALUE   0x01
2452 #define EFI_ACPI_6_5_EINJ_WRITE_REGISTER        0x02
2453 #define EFI_ACPI_6_5_EINJ_WRITE_REGISTER_VALUE  0x03
2454 #define EFI_ACPI_6_5_EINJ_NOOP                  0x04
2455
2456 ///
2457 /// EINJ Instruction Flags
2458 ///
2459 #define EFI_ACPI_6_5_EINJ_PRESERVE_REGISTER  0x01
2460
2461 ///
2462 /// EINJ Injection Instruction Entry
2463 ///
2464 typedef struct {
2465   UINT8                                     InjectionAction;
2466   UINT8                                     Instruction;
2467   UINT8                                     Flags;
2468   UINT8                                     Reserved0;
2469   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    RegisterRegion;
2470   UINT64                                    Value;
2471   UINT64                                    Mask;
2472 } EFI_ACPI_6_5_EINJ_INJECTION_INSTRUCTION_ENTRY;
2473
2474 ///
2475 /// EINJ Trigger Action Table
2476 ///
2477 typedef struct {
2478   UINT32    HeaderSize;
2479   UINT32    Revision;
2480   UINT32    TableSize;
2481   UINT32    EntryCount;
2482 } EFI_ACPI_6_5_EINJ_TRIGGER_ACTION_TABLE;
2483
2484 ///
2485 /// Platform Communications Channel Table (PCCT)
2486 ///
2487 typedef struct {
2488   EFI_ACPI_DESCRIPTION_HEADER    Header;
2489   UINT32                         Flags;
2490   UINT64                         Reserved;
2491 } EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_HEADER;
2492
2493 ///
2494 /// PCCT Version (as defined in ACPI 6.5 spec.)
2495 ///
2496 #define EFI_ACPI_6_5_PLATFORM_COMMUNICATION_CHANNEL_TABLE_REVISION  0x02
2497
2498 ///
2499 /// PCCT Global Flags
2500 ///
2501 #define EFI_ACPI_6_5_PCCT_FLAGS_PLATFORM_INTERRUPT  BIT0
2502
2503 //
2504 // PCCT Subspace type
2505 //
2506 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_GENERIC                        0x00
2507 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_1_HW_REDUCED_COMMUNICATIONS    0x01
2508 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_2_HW_REDUCED_COMMUNICATIONS    0x02
2509 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_3_EXTENDED_PCC                 0x03
2510 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_4_EXTENDED_PCC                 0x04
2511 #define EFI_ACPI_6_5_PCCT_SUBSPACE_TYPE_5_HW_REGISTERS_COMMUNICATIONS  0x05
2512
2513 ///
2514 /// PCC Subspace Structure Header
2515 ///
2516 typedef struct {
2517   UINT8    Type;
2518   UINT8    Length;
2519 } EFI_ACPI_6_5_PCCT_SUBSPACE_HEADER;
2520
2521 ///
2522 /// Generic Communications Subspace Structure
2523 ///
2524 typedef struct {
2525   UINT8                                     Type;
2526   UINT8                                     Length;
2527   UINT8                                     Reserved[6];
2528   UINT64                                    BaseAddress;
2529   UINT64                                    AddressLength;
2530   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    DoorbellRegister;
2531   UINT64                                    DoorbellPreserve;
2532   UINT64                                    DoorbellWrite;
2533   UINT32                                    NominalLatency;
2534   UINT32                                    MaximumPeriodicAccessRate;
2535   UINT16                                    MinimumRequestTurnaroundTime;
2536 } EFI_ACPI_6_5_PCCT_SUBSPACE_GENERIC;
2537
2538 ///
2539 /// Generic Communications Channel Shared Memory Region
2540 ///
2541
2542 typedef struct {
2543   UINT8    Command;
2544   UINT8    Reserved           : 7;
2545   UINT8    NotifyOnCompletion : 1;
2546 } EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND;
2547
2548 typedef struct {
2549   UINT8    CommandComplete      : 1;
2550   UINT8    PlatformInterrupt    : 1;
2551   UINT8    Error                : 1;
2552   UINT8    PlatformNotification : 1;
2553   UINT8    Reserved             : 4;
2554   UINT8    Reserved1;
2555 } EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS;
2556
2557 typedef struct {
2558   UINT32                                                    Signature;
2559   EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_COMMAND    Command;
2560   EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_STATUS     Status;
2561 } EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER;
2562
2563 #define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_POLARITY  BIT0
2564 #define EFI_ACPI_6_5_PCCT_SUBSPACE_PLATFORM_INTERRUPT_FLAGS_MODE      BIT1
2565
2566 ///
2567 /// Type 1 HW-Reduced Communications Subspace Structure
2568 ///
2569 typedef struct {
2570   UINT8                                     Type;
2571   UINT8                                     Length;
2572   UINT32                                    PlatformInterrupt;
2573   UINT8                                     PlatformInterruptFlags;
2574   UINT8                                     Reserved;
2575   UINT64                                    BaseAddress;
2576   UINT64                                    AddressLength;
2577   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    DoorbellRegister;
2578   UINT64                                    DoorbellPreserve;
2579   UINT64                                    DoorbellWrite;
2580   UINT32                                    NominalLatency;
2581   UINT32                                    MaximumPeriodicAccessRate;
2582   UINT16                                    MinimumRequestTurnaroundTime;
2583 } EFI_ACPI_6_5_PCCT_SUBSPACE_1_HW_REDUCED_COMMUNICATIONS;
2584
2585 ///
2586 /// Type 2 HW-Reduced Communications Subspace Structure
2587 ///
2588 typedef struct {
2589   UINT8                                     Type;
2590   UINT8                                     Length;
2591   UINT32                                    PlatformInterrupt;
2592   UINT8                                     PlatformInterruptFlags;
2593   UINT8                                     Reserved;
2594   UINT64                                    BaseAddress;
2595   UINT64                                    AddressLength;
2596   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    DoorbellRegister;
2597   UINT64                                    DoorbellPreserve;
2598   UINT64                                    DoorbellWrite;
2599   UINT32                                    NominalLatency;
2600   UINT32                                    MaximumPeriodicAccessRate;
2601   UINT16                                    MinimumRequestTurnaroundTime;
2602   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    PlatformInterruptAckRegister;
2603   UINT64                                    PlatformInterruptAckPreserve;
2604   UINT64                                    PlatformInterruptAckWrite;
2605 } EFI_ACPI_6_5_PCCT_SUBSPACE_2_HW_REDUCED_COMMUNICATIONS;
2606
2607 ///
2608 /// Type 3 Extended PCC Subspace Structure
2609 ///
2610 typedef struct {
2611   UINT8                                     Type;
2612   UINT8                                     Length;
2613   UINT32                                    PlatformInterrupt;
2614   UINT8                                     PlatformInterruptFlags;
2615   UINT8                                     Reserved;
2616   UINT64                                    BaseAddress;
2617   UINT32                                    AddressLength;
2618   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    DoorbellRegister;
2619   UINT64                                    DoorbellPreserve;
2620   UINT64                                    DoorbellWrite;
2621   UINT32                                    NominalLatency;
2622   UINT32                                    MaximumPeriodicAccessRate;
2623   UINT32                                    MinimumRequestTurnaroundTime;
2624   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    PlatformInterruptAckRegister;
2625   UINT64                                    PlatformInterruptAckPreserve;
2626   UINT64                                    PlatformInterruptAckSet;
2627   UINT8                                     Reserved1[8];
2628   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    CommandCompleteCheckRegister;
2629   UINT64                                    CommandCompleteCheckMask;
2630   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    CommandCompleteUpdateRegister;
2631   UINT64                                    CommandCompleteUpdatePreserve;
2632   UINT64                                    CommandCompleteUpdateSet;
2633   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    ErrorStatusRegister;
2634   UINT64                                    ErrorStatusMask;
2635 } EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC;
2636
2637 ///
2638 /// Type 4 Extended PCC Subspace Structure
2639 ///
2640 typedef EFI_ACPI_6_5_PCCT_SUBSPACE_3_EXTENDED_PCC EFI_ACPI_6_5_PCCT_SUBSPACE_4_EXTENDED_PCC;
2641
2642 #define EFI_ACPI_6_5_PCCT_MASTER_SLAVE_COMMUNICATIONS_CHANNEL_FLAGS_NOTIFY_ON_COMPLETION  BIT0
2643
2644 typedef struct {
2645   UINT32    Signature;
2646   UINT32    Flags;
2647   UINT32    Length;
2648   UINT32    Command;
2649 } EFI_ACPI_6_5_PCCT_EXTENDED_PCC_SHARED_MEMORY_REGION_HEADER;
2650
2651 ///
2652 /// Type 5 HW Registers based Communications Subspace Structure
2653 ///
2654 typedef struct {
2655   UINT8                                     Type;
2656   UINT8                                     Length;
2657   UINT16                                    Version;
2658   UINT64                                    BaseAddress;
2659   UINT64                                    SharedMemoryRangeLength;
2660   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    DoorbellRegister;
2661   UINT64                                    DoorbellPreserve;
2662   UINT64                                    DoorbellWrite;
2663   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    CommandCompleteCheckRegister;
2664   UINT64                                    CommandCompleteCheckMask;
2665   EFI_ACPI_6_5_GENERIC_ADDRESS_STRUCTURE    ErrorStatusRegister;
2666   UINT64                                    ErrorStatusMask;
2667   UINT32                                    NominalLatency;
2668   UINT32                                    MinimumRequestTurnaroundTime;
2669 } EFI_ACPI_6_5_PCCT_SUBSPACE_5_HW_REGISTERS_COMMUNICATIONS;
2670
2671 ///
2672 /// Reduced PCC Subspace Shared Memory Region
2673 ///
2674 typedef struct {
2675   UINT32    Signature;
2676   // UINT8       CommunicationSubspace[];
2677 } EFI_6_5_PCCT_REDUCED_PCC_SUBSPACE_SHARED_MEMORY_REGION;
2678
2679 ///
2680 /// Platform Debug Trigger Table (PDTT)
2681 ///
2682 typedef struct {
2683   EFI_ACPI_DESCRIPTION_HEADER    Header;
2684   UINT8                          TriggerCount;
2685   UINT8                          Reserved[3];
2686   UINT32                         TriggerIdentifierArrayOffset;
2687 } EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_HEADER;
2688
2689 ///
2690 /// PDTT Revision (as defined in ACPI 6.5 spec.)
2691 ///
2692 #define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_REVISION  0x00
2693
2694 ///
2695 /// PDTT Platform Communication Channel Identifier Structure
2696 ///
2697 typedef struct {
2698   UINT16    SubChannelIdentifer : 8;
2699   UINT16    Runtime             : 1;
2700   UINT16    WaitForCompletion   : 1;
2701   UINT16    TriggerOrder        : 1;
2702   UINT16    Reserved            : 5;
2703 } EFI_ACPI_6_5_PDTT_PCC_IDENTIFIER;
2704
2705 ///
2706 /// PCC Commands Codes used by Platform Debug Trigger Table
2707 ///
2708 #define EFI_ACPI_6_5_PDTT_PCC_COMMAND_DOORBELL_ONLY    0x00
2709 #define EFI_ACPI_6_5_PDTT_PCC_COMMAND_VENDOR_SPECIFIC  0x01
2710
2711 ///
2712 /// PDTT Platform Communication Channel
2713 ///
2714 typedef EFI_ACPI_6_5_PCCT_GENERIC_SHARED_MEMORY_REGION_HEADER EFI_ACPI_6_5_PDTT_PCC;
2715
2716 ///
2717 /// Processor Properties Topology Table (PPTT)
2718 ///
2719 typedef struct {
2720   EFI_ACPI_DESCRIPTION_HEADER    Header;
2721 } EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_HEADER;
2722
2723 ///
2724 /// PPTT Revision (as defined in ACPI 6.5 spec.)
2725 ///
2726 #define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_REVISION  0x03
2727
2728 ///
2729 /// PPTT types
2730 ///
2731 #define EFI_ACPI_6_5_PPTT_TYPE_PROCESSOR  0x00
2732 #define EFI_ACPI_6_5_PPTT_TYPE_CACHE      0x01
2733
2734 ///
2735 /// PPTT Structure Header
2736 ///
2737 typedef struct {
2738   UINT8    Type;
2739   UINT8    Length;
2740   UINT8    Reserved[2];
2741 } EFI_ACPI_6_5_PPTT_STRUCTURE_HEADER;
2742
2743 ///
2744 /// For PPTT struct processor flags
2745 ///
2746 #define EFI_ACPI_6_5_PPTT_PACKAGE_NOT_PHYSICAL          0x0
2747 #define EFI_ACPI_6_5_PPTT_PACKAGE_PHYSICAL              0x1
2748 #define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_INVALID          0x0
2749 #define EFI_ACPI_6_5_PPTT_PROCESSOR_ID_VALID            0x1
2750 #define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_NOT_THREAD       0x0
2751 #define EFI_ACPI_6_5_PPTT_PROCESSOR_IS_THREAD           0x1
2752 #define EFI_ACPI_6_5_PPTT_NODE_IS_NOT_LEAF              0x0
2753 #define EFI_ACPI_6_5_PPTT_NODE_IS_LEAF                  0x1
2754 #define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_NOT_IDENTICAL  0x0
2755 #define EFI_ACPI_6_5_PPTT_IMPLEMENTATION_IDENTICAL      0x1
2756
2757 ///
2758 /// Processor hierarchy node structure flags
2759 ///
2760 typedef struct {
2761   UINT32    PhysicalPackage         : 1;
2762   UINT32    AcpiProcessorIdValid    : 1;
2763   UINT32    ProcessorIsAThread      : 1;
2764   UINT32    NodeIsALeaf             : 1;
2765   UINT32    IdenticalImplementation : 1;
2766   UINT32    Reserved                : 27;
2767 } EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS;
2768
2769 ///
2770 /// Processor hierarchy node structure
2771 ///
2772 typedef struct {
2773   UINT8                                          Type;
2774   UINT8                                          Length;
2775   UINT8                                          Reserved[2];
2776   EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR_FLAGS    Flags;
2777   UINT32                                         Parent;
2778   UINT32                                         AcpiProcessorId;
2779   UINT32                                         NumberOfPrivateResources;
2780 } EFI_ACPI_6_5_PPTT_STRUCTURE_PROCESSOR;
2781
2782 ///
2783 /// For PPTT struct cache flags
2784 ///
2785 #define EFI_ACPI_6_5_PPTT_CACHE_SIZE_INVALID       0x0
2786 #define EFI_ACPI_6_5_PPTT_CACHE_SIZE_VALID         0x1
2787 #define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_INVALID   0x0
2788 #define EFI_ACPI_6_5_PPTT_NUMBER_OF_SETS_VALID     0x1
2789 #define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_INVALID    0x0
2790 #define EFI_ACPI_6_5_PPTT_ASSOCIATIVITY_VALID      0x1
2791 #define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_INVALID  0x0
2792 #define EFI_ACPI_6_5_PPTT_ALLOCATION_TYPE_VALID    0x1
2793 #define EFI_ACPI_6_5_PPTT_CACHE_TYPE_INVALID       0x0
2794 #define EFI_ACPI_6_5_PPTT_CACHE_TYPE_VALID         0x1
2795 #define EFI_ACPI_6_5_PPTT_WRITE_POLICY_INVALID     0x0
2796 #define EFI_ACPI_6_5_PPTT_WRITE_POLICY_VALID       0x1
2797 #define EFI_ACPI_6_5_PPTT_LINE_SIZE_INVALID        0x0
2798 #define EFI_ACPI_6_5_PPTT_LINE_SIZE_VALID          0x1
2799 #define EFI_ACPI_6_5_PPTT_CACHE_ID_INVALID         0x0
2800 #define EFI_ACPI_6_5_PPTT_CACHE_ID_VALID           0x1
2801
2802 ///
2803 /// Cache Type Structure flags
2804 ///
2805 typedef struct {
2806   UINT32    SizePropertyValid   : 1;
2807   UINT32    NumberOfSetsValid   : 1;
2808   UINT32    AssociativityValid  : 1;
2809   UINT32    AllocationTypeValid : 1;
2810   UINT32    CacheTypeValid      : 1;
2811   UINT32    WritePolicyValid    : 1;
2812   UINT32    LineSizeValid       : 1;
2813   UINT32    CacheIdValid        : 1;
2814   UINT32    Reserved            : 24;
2815 } EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS;
2816
2817 ///
2818 /// For cache attributes
2819 ///
2820 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ             0x0
2821 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_WRITE            0x1
2822 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_ALLOCATION_READ_WRITE       0x2
2823 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_DATA             0x0
2824 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_INSTRUCTION      0x1
2825 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_CACHE_TYPE_UNIFIED          0x2
2826 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_BACK     0x0
2827 #define EFI_ACPI_6_5_CACHE_ATTRIBUTES_WRITE_POLICY_WRITE_THROUGH  0x1
2828
2829 ///
2830 /// Cache Type Structure cache attributes
2831 ///
2832 typedef struct {
2833   UINT8    AllocationType : 2;
2834   UINT8    CacheType      : 2;
2835   UINT8    WritePolicy    : 1;
2836   UINT8    Reserved       : 3;
2837 } EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES;
2838
2839 ///
2840 /// Cache Type Structure
2841 ///
2842 typedef struct {
2843   UINT8                                           Type;
2844   UINT8                                           Length;
2845   UINT8                                           Reserved[2];
2846   EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_FLAGS         Flags;
2847   UINT32                                          NextLevelOfCache;
2848   UINT32                                          Size;
2849   UINT32                                          NumberOfSets;
2850   UINT8                                           Associativity;
2851   EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE_ATTRIBUTES    Attributes;
2852   UINT16                                          LineSize;
2853   UINT32                                          CacheId;
2854 } EFI_ACPI_6_5_PPTT_STRUCTURE_CACHE;
2855
2856 ///
2857 /// Platform Health Assessment Table (PHAT) Format
2858 ///
2859 typedef struct {
2860   EFI_ACPI_DESCRIPTION_HEADER    Header;
2861   // UINT8                         PlatformTelemetryRecords[];
2862 } EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE;
2863
2864 #define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_REVISION  0x01
2865
2866 ///
2867 /// PHAT Record Format
2868 ///
2869 typedef struct {
2870   UINT16    PlatformHealthAssessmentRecordType;
2871   UINT16    RecordLength;
2872   UINT8     Revision;
2873   // UINT8   Data[];
2874 } EFI_ACPI_6_5_PHAT_RECORD;
2875
2876 ///
2877 /// PHAT Record Type Format
2878 ///
2879 #define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_VERSION_DATA_RECORD  0x0000
2880 #define EFI_ACPI_6_5_PHAT_RECORD_TYPE_FIRMWARE_HEALTH_DATA_RECORD   0x0001
2881
2882 ///
2883 /// PHAT Version Element
2884 ///
2885 typedef struct {
2886   GUID      ComponentId;
2887   UINT64    VersionValue;
2888   UINT32    ProducerId;
2889 } EFI_ACPI_6_5_PHAT_VERSION_ELEMENT;
2890
2891 ///
2892 /// PHAT Firmware Version Data Record
2893 ///
2894 typedef struct {
2895   UINT16    PlatformRecordType;
2896   UINT16    RecordLength;
2897   UINT8     Revision;
2898   UINT8     Reserved[3];
2899   UINT32    RecordCount;
2900   // UINT8   PhatVersionElement[];
2901 } EFI_ACPI_6_5_PHAT_FIRMWARE_VERISON_DATA_RECORD;
2902
2903 #define EFI_ACPI_6_5_PHAT_FIRMWARE_VERSION_DATA_RECORD_REVISION  0x01
2904
2905 ///
2906 /// Firmware Health Data Record Structure
2907 ///
2908 typedef struct {
2909   UINT16    PlatformRecordType;
2910   UINT16    RecordLength;
2911   UINT8     Revision;
2912   UINT16    Reserved;
2913   UINT8     AmHealthy;
2914   GUID      DeviceSignature;
2915   UINT32    DeviceSpecificDataOffset;
2916   // UINT8   DevicePath[];
2917   // UINT8   DeviceSpecificData[];
2918 } EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_STRUCTURE;
2919
2920 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_REVISION  0x01
2921
2922 ///
2923 /// Firmware Health Data Record device health state
2924 ///
2925 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ERRORS_FOUND     0x00
2926 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_NO_ERRORS_FOUND  0x01
2927 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_UNKNOWN          0x02
2928 #define EFI_ACPI_6_5_PHAT_FIRMWARE_HEALTH_DATA_RECORD_ADVISORY         0x03
2929
2930 //
2931 // Known table signatures
2932 //
2933
2934 ///
2935 /// "RSD PTR " Root System Description Pointer
2936 ///
2937 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  SIGNATURE_64('R', 'S', 'D', ' ', 'P', 'T', 'R', ' ')
2938
2939 ///
2940 /// "APIC" Multiple APIC Description Table
2941 ///
2942 #define EFI_ACPI_6_5_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'I', 'C')
2943
2944 ///
2945 /// "APMT" Arm Performance Monitoring Unit Table
2946 ///
2947 #define EFI_ACPI_6_5_ARM_PERFORMANCE_MONITORING_UNIT_TABLE_SIGNATURE  SIGNATURE_32('A', 'P', 'M', 'T')
2948
2949 ///
2950 /// "BERT" Boot Error Record Table
2951 ///
2952 #define EFI_ACPI_6_5_BOOT_ERROR_RECORD_TABLE_SIGNATURE  SIGNATURE_32('B', 'E', 'R', 'T')
2953
2954 ///
2955 /// "BGRT" Boot Graphics Resource Table
2956 ///
2957 #define EFI_ACPI_6_5_BOOT_GRAPHICS_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('B', 'G', 'R', 'T')
2958
2959 ///
2960 /// "CDIT" Component Distance Information Table
2961 ///
2962 #define EFI_ACPI_6_5_COMPONENT_DISTANCE_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('C', 'D', 'I', 'T')
2963
2964 ///
2965 /// "CPEP" Corrected Platform Error Polling Table
2966 ///
2967 #define EFI_ACPI_6_5_CORRECTED_PLATFORM_ERROR_POLLING_TABLE_SIGNATURE  SIGNATURE_32('C', 'P', 'E', 'P')
2968
2969 ///
2970 /// "CRAT" Component Resource Attribute Table
2971 ///
2972 #define EFI_ACPI_6_5_COMPONENT_RESOURCE_ATTRIBUTE_TABLE_SIGNATURE  SIGNATURE_32('C', 'R', 'A', 'T')
2973
2974 ///
2975 /// "DSDT" Differentiated System Description Table
2976 ///
2977 #define EFI_ACPI_6_5_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('D', 'S', 'D', 'T')
2978
2979 ///
2980 /// "ECDT" Embedded Controller Boot Resources Table
2981 ///
2982 #define EFI_ACPI_6_5_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE  SIGNATURE_32('E', 'C', 'D', 'T')
2983
2984 ///
2985 /// "EINJ" Error Injection Table
2986 ///
2987 #define EFI_ACPI_6_5_ERROR_INJECTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'I', 'N', 'J')
2988
2989 ///
2990 /// "ERST" Error Record Serialization Table
2991 ///
2992 #define EFI_ACPI_6_5_ERROR_RECORD_SERIALIZATION_TABLE_SIGNATURE  SIGNATURE_32('E', 'R', 'S', 'T')
2993
2994 ///
2995 /// "FACP" Fixed ACPI Description Table
2996 ///
2997 #define EFI_ACPI_6_5_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'P')
2998
2999 ///
3000 /// "FACS" Firmware ACPI Control Structure
3001 ///
3002 #define EFI_ACPI_6_5_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  SIGNATURE_32('F', 'A', 'C', 'S')
3003
3004 ///
3005 /// "FPDT" Firmware Performance Data Table
3006 ///
3007 #define EFI_ACPI_6_5_FIRMWARE_PERFORMANCE_DATA_TABLE_SIGNATURE  SIGNATURE_32('F', 'P', 'D', 'T')
3008
3009 ///
3010 /// "GTDT" Generic Timer Description Table
3011 ///
3012 #define EFI_ACPI_6_5_GENERIC_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('G', 'T', 'D', 'T')
3013
3014 ///
3015 /// "HEST" Hardware Error Source Table
3016 ///
3017 #define EFI_ACPI_6_5_HARDWARE_ERROR_SOURCE_TABLE_SIGNATURE  SIGNATURE_32('H', 'E', 'S', 'T')
3018
3019 ///
3020 /// "HMAT" Heterogeneous Memory Attribute Table
3021 ///
3022 #define EFI_ACPI_6_5_HETEROGENEOUS_MEMORY_ATTRIBUTE_TABLE_SIGNATURE  SIGNATURE_32('H', 'M', 'A', 'T')
3023
3024 ///
3025 /// "MPST" Memory Power State Table
3026 ///
3027 #define EFI_ACPI_6_5_MEMORY_POWER_STATE_TABLE_SIGNATURE  SIGNATURE_32('M', 'P', 'S', 'T')
3028
3029 ///
3030 /// "MSCT" Maximum System Characteristics Table
3031 ///
3032 #define EFI_ACPI_6_5_MAXIMUM_SYSTEM_CHARACTERISTICS_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'C', 'T')
3033
3034 ///
3035 /// "NFIT" NVDIMM Firmware Interface Table
3036 ///
3037 #define EFI_ACPI_6_5_NVDIMM_FIRMWARE_INTERFACE_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('N', 'F', 'I', 'T')
3038
3039 ///
3040 /// "PDTT" Platform Debug Trigger Table
3041 ///
3042 #define EFI_ACPI_6_5_PLATFORM_DEBUG_TRIGGER_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('P', 'D', 'T', 'T')
3043
3044 ///
3045 /// "PMTT" Platform Memory Topology Table
3046 ///
3047 #define EFI_ACPI_6_5_PLATFORM_MEMORY_TOPOLOGY_TABLE_SIGNATURE  SIGNATURE_32('P', 'M', 'T', 'T')
3048
3049 ///
3050 /// "PPTT" Processor Properties Topology Table
3051 ///
3052 #define EFI_ACPI_6_5_PROCESSOR_PROPERTIES_TOPOLOGY_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('P', 'P', 'T', 'T')
3053
3054 ///
3055 /// "PSDT" Persistent System Description Table
3056 ///
3057 #define EFI_ACPI_6_5_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('P', 'S', 'D', 'T')
3058
3059 ///
3060 /// "RASF" ACPI RAS Feature Table
3061 ///
3062 #define EFI_ACPI_6_5_ACPI_RAS_FEATURE_TABLE_SIGNATURE  SIGNATURE_32('R', 'A', 'S', 'F')
3063
3064 ///
3065 /// "RSDT" Root System Description Table
3066 ///
3067 #define EFI_ACPI_6_5_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('R', 'S', 'D', 'T')
3068
3069 ///
3070 /// "SBST" Smart Battery Specification Table
3071 ///
3072 #define EFI_ACPI_6_5_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'B', 'S', 'T')
3073
3074 ///
3075 /// "SDEV" Secure DEVices Table
3076 ///
3077 #define EFI_ACPI_6_5_SECURE_DEVICES_TABLE_SIGNATURE  SIGNATURE_32('S', 'D', 'E', 'V')
3078
3079 ///
3080 /// "SLIT" System Locality Information Table
3081 ///
3082 #define EFI_ACPI_6_5_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'T')
3083
3084 ///
3085 /// "SRAT" System Resource Affinity Table
3086 ///
3087 #define EFI_ACPI_6_5_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE  SIGNATURE_32('S', 'R', 'A', 'T')
3088
3089 ///
3090 /// "SSDT" Secondary System Description Table
3091 ///
3092 #define EFI_ACPI_6_5_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'S', 'D', 'T')
3093
3094 ///
3095 /// "XSDT" Extended System Description Table
3096 ///
3097 #define EFI_ACPI_6_5_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('X', 'S', 'D', 'T')
3098
3099 ///
3100 /// "BOOT" MS Simple Boot Spec
3101 ///
3102 #define EFI_ACPI_6_5_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE  SIGNATURE_32('B', 'O', 'O', 'T')
3103
3104 ///
3105 /// "CSRT" MS Core System Resource Table
3106 ///
3107 #define EFI_ACPI_6_5_CORE_SYSTEM_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('C', 'S', 'R', 'T')
3108
3109 ///
3110 /// "DBG2" MS Debug Port 2 Spec
3111 ///
3112 #define EFI_ACPI_6_5_DEBUG_PORT_2_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', '2')
3113
3114 ///
3115 /// "DBGP" MS Debug Port Spec
3116 ///
3117 #define EFI_ACPI_6_5_DEBUG_PORT_TABLE_SIGNATURE  SIGNATURE_32('D', 'B', 'G', 'P')
3118
3119 ///
3120 /// "DMAR" DMA Remapping Table
3121 ///
3122 #define EFI_ACPI_6_5_DMA_REMAPPING_TABLE_SIGNATURE  SIGNATURE_32('D', 'M', 'A', 'R')
3123
3124 ///
3125 /// "DRTM" Dynamic Root of Trust for Measurement Table
3126 ///
3127 #define EFI_ACPI_6_5_DYNAMIC_ROOT_OF_TRUST_FOR_MEASUREMENT_TABLE_SIGNATURE  SIGNATURE_32('D', 'R', 'T', 'M')
3128
3129 ///
3130 /// "ETDT" Event Timer Description Table
3131 ///
3132 #define EFI_ACPI_6_5_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('E', 'T', 'D', 'T')
3133
3134 ///
3135 /// "HPET" IA-PC High Precision Event Timer Table
3136 ///
3137 #define EFI_ACPI_6_5_HIGH_PRECISION_EVENT_TIMER_TABLE_SIGNATURE  SIGNATURE_32('H', 'P', 'E', 'T')
3138
3139 ///
3140 /// "iBFT" iSCSI Boot Firmware Table
3141 ///
3142 #define EFI_ACPI_6_5_ISCSI_BOOT_FIRMWARE_TABLE_SIGNATURE  SIGNATURE_32('i', 'B', 'F', 'T')
3143
3144 ///
3145 /// "IORT" I/O Remapping Table
3146 ///
3147 #define EFI_ACPI_6_5_IO_REMAPPING_TABLE_SIGNATURE  SIGNATURE_32('I', 'O', 'R', 'T')
3148
3149 ///
3150 /// "IVRS" I/O Virtualization Reporting Structure
3151 ///
3152 #define EFI_ACPI_6_5_IO_VIRTUALIZATION_REPORTING_STRUCTURE_SIGNATURE  SIGNATURE_32('I', 'V', 'R', 'S')
3153
3154 ///
3155 /// "LPIT" Low Power Idle Table
3156 ///
3157 #define EFI_ACPI_6_5_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE  SIGNATURE_32('L', 'P', 'I', 'T')
3158
3159 ///
3160 /// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table
3161 ///
3162 #define EFI_ACPI_6_5_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'F', 'G')
3163
3164 ///
3165 /// "MCHI" Management Controller Host Interface Table
3166 ///
3167 #define EFI_ACPI_6_5_MANAGEMENT_CONTROLLER_HOST_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('M', 'C', 'H', 'I')
3168
3169 ///
3170 /// "MSDM" MS Data Management Table
3171 ///
3172 #define EFI_ACPI_6_5_DATA_MANAGEMENT_TABLE_SIGNATURE  SIGNATURE_32('M', 'S', 'D', 'M')
3173
3174 ///
3175 /// "PCCT" Platform Communications Channel Table
3176 ///
3177 #define EFI_ACPI_6_5_PLATFORM_COMMUNICATIONS_CHANNEL_TABLE_SIGNATURE  SIGNATURE_32('P', 'C', 'C', 'T')
3178
3179 ///
3180 /// "PHAT" Platform Health Assessment Table
3181 ///
3182 #define EFI_ACPI_6_5_PLATFORM_HEALTH_ASSESSMENT_TABLE_SIGNATURE  SIGNATURE_32('P', 'H', 'A', 'T')
3183
3184 ///
3185 /// "SDEI" Software Delegated Exceptions Interface Table
3186 ///
3187 #define EFI_ACPI_6_5_SOFTWARE_DELEGATED_EXCEPTIONS_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('S', 'D', 'E', 'I')
3188
3189 ///
3190 /// "SLIC" MS Software Licensing Table Specification
3191 ///
3192 #define EFI_ACPI_6_5_SOFTWARE_LICENSING_TABLE_SIGNATURE  SIGNATURE_32('S', 'L', 'I', 'C')
3193
3194 ///
3195 /// "SPCR" Serial Port Concole Redirection Table
3196 ///
3197 #define EFI_ACPI_6_5_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'C', 'R')
3198
3199 ///
3200 /// "SPMI" Server Platform Management Interface Table
3201 ///
3202 #define EFI_ACPI_6_5_SERVER_PLATFORM_MANAGEMENT_INTERFACE_TABLE_SIGNATURE  SIGNATURE_32('S', 'P', 'M', 'I')
3203
3204 ///
3205 /// "STAO" _STA Override Table
3206 ///
3207 #define EFI_ACPI_6_5_STA_OVERRIDE_TABLE_SIGNATURE  SIGNATURE_32('S', 'T', 'A', 'O')
3208
3209 ///
3210 /// "TCPA" Trusted Computing Platform Alliance Capabilities Table
3211 ///
3212 #define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_ALLIANCE_CAPABILITIES_TABLE_SIGNATURE  SIGNATURE_32('T', 'C', 'P', 'A')
3213
3214 ///
3215 /// "TPM2" Trusted Computing Platform 1 Table
3216 ///
3217 #define EFI_ACPI_6_5_TRUSTED_COMPUTING_PLATFORM_2_TABLE_SIGNATURE  SIGNATURE_32('T', 'P', 'M', '2')
3218
3219 ///
3220 /// "UEFI" UEFI ACPI Data Table
3221 ///
3222 #define EFI_ACPI_6_5_UEFI_ACPI_DATA_TABLE_SIGNATURE  SIGNATURE_32('U', 'E', 'F', 'I')
3223
3224 ///
3225 /// "WAET" Windows ACPI Emulated Devices Table
3226 ///
3227 #define EFI_ACPI_6_5_WINDOWS_ACPI_EMULATED_DEVICES_TABLE_SIGNATURE  SIGNATURE_32('W', 'A', 'E', 'T')
3228
3229 ///
3230 /// "WDAT" Watchdog Action Table
3231 ///
3232 #define EFI_ACPI_6_5_WATCHDOG_ACTION_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'A', 'T')
3233
3234 ///
3235 /// "WDRT" Watchdog Resource Table
3236 ///
3237 #define EFI_ACPI_6_5_WATCHDOG_RESOURCE_TABLE_SIGNATURE  SIGNATURE_32('W', 'D', 'R', 'T')
3238
3239 ///
3240 /// "WPBT" MS Platform Binary Table
3241 ///
3242 #define EFI_ACPI_6_5_PLATFORM_BINARY_TABLE_SIGNATURE  SIGNATURE_32('W', 'P', 'B', 'T')
3243
3244 ///
3245 /// "WSMT" Windows SMM Security Mitigation Table
3246 ///
3247 #define EFI_ACPI_6_5_WINDOWS_SMM_SECURITY_MITIGATION_TABLE_SIGNATURE  SIGNATURE_32('W', 'S', 'M', 'T')
3248
3249 ///
3250 /// "XENV" Xen Project Table
3251 ///
3252 #define EFI_ACPI_6_5_XEN_PROJECT_TABLE_SIGNATURE  SIGNATURE_32('X', 'E', 'N', 'V')
3253
3254 #pragma pack()
3255
3256 #endif