MdePkg/Include/IndustryStandard/Atapi.h

   1 /** @file
   2   This file contains just some basic definitions that are needed by drivers
   3   that dealing with ATA/ATAPI interface.
   4
   5 Copyright (c) 2007 - 2008, Intel Corporation
   6 All rights reserved. This program and the accompanying materials
   7 are licensed and made available under the terms and conditions of the BSD License
   8 which accompanies this distribution.  The full text of the license may be found at
   9 http://opensource.org/licenses/bsd-license.php
  10
  11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef _ATAPI_H_
  17 #define _ATAPI_H_
  18
  19 ///
  20 /// ATAPI_IDENTIFY_DATA is defined in ATA-6
  21 ///
  22 typedef struct {
  23     UINT16  config;             ///< General Configuration
  24     UINT16  obsolete_1;
  25     UINT16  specific_config;
  26     UINT16  obsolete_3;
  27     UINT16  retired_4_5[2];
  28     UINT16  obsolete_6;
  29     UINT16  cfa_reserved_7_8[2];
  30     UINT16  retired_9;
  31     CHAR8   SerialNo[20];       ///< ASCII
  32     UINT16  retired_20_21[2];
  33     UINT16  obsolete_22;
  34     CHAR8   FirmwareVer[8];     ///< ASCII
  35     CHAR8   ModelName[40];      ///< ASCII
  36     UINT16  multi_sector_cmd_max_sct_cnt;
  37     UINT16  reserved_48;
  38     UINT16  capabilities_49;
  39     UINT16  capabilities_50;
  40     UINT16  obsolete_51_52[2];
  41     UINT16  field_validity;
  42     UINT16  obsolete_54_58[5];
  43     UINT16  mutil_sector_setting;
  44     UINT16  user_addressable_sectors_lo;
  45     UINT16  user_addressable_sectors_hi;
  46     UINT16  obsolete_62;
  47     UINT16  multi_word_dma_mode;
  48     UINT16  advanced_pio_modes;
  49     UINT16  min_multi_word_dma_cycle_time;
  50     UINT16  rec_multi_word_dma_cycle_time;
  51     UINT16  min_pio_cycle_time_without_flow_control;
  52     UINT16  min_pio_cycle_time_with_flow_control;
  53     UINT16  reserved_69_74[6];
  54     UINT16  queue_depth;
  55     UINT16  reserved_76_79[4];
  56     UINT16  major_version_no;
  57     UINT16  minor_version_no;
  58     UINT16  cmd_set_support_82;
  59     UINT16  cmd_set_support_83;
  60     UINT16  cmd_feature_support;
  61     UINT16  cmd_feature_enable_85;
  62     UINT16  cmd_feature_enable_86;
  63     UINT16  cmd_feature_default;
  64     UINT16  ultra_dma_select;
  65     UINT16  time_required_for_sec_erase;
  66     UINT16  time_required_for_enhanced_sec_erase;
  67     UINT16  current_advanced_power_mgmt_value;
  68     UINT16  master_pwd_revison_code;
  69     UINT16  hardware_reset_result;
  70     UINT16  current_auto_acoustic_mgmt_value;
  71     UINT16  reserved_95_99[5];
  72     UINT16  max_user_lba_for_48bit_addr[4];
  73     UINT16  reserved_104_126[23];
  74     UINT16  removable_media_status_notification_support;
  75     UINT16  security_status;
  76     UINT16  vendor_data_129_159[31];
  77     UINT16  cfa_power_mode;
  78     UINT16  cfa_reserved_161_175[15];
  79     UINT16  current_media_serial_no[30];
  80     UINT16  reserved_206_254[49];
  81     UINT16  integrity_word;
  82 } ATAPI_IDENTIFY_DATA;
  83
  84 ///
  85 /// Standard Quiry Data format, defined in SFF-8070i(ATAPI Removable Rewritable Specification)
  86 ///
  87 typedef struct {
  88   UINT8 peripheral_type;
  89   UINT8 RMB;
  90   UINT8 version;
  91   UINT8 response_data_format;
  92   UINT8 addnl_length;     ///< n - 4, Numbers of bytes following this one
  93   UINT8 reserved_5;
  94   UINT8 reserved_6;
  95   UINT8 reserved_7;
  96   UINT8 vendor_info[8];
  97   UINT8 product_id[16];
  98   UINT8 product_revision_level[4];
  99   UINT8 vendor_specific_36_55[55 - 36 + 1];
 100   UINT8 reserved_56_95[95 - 56 + 1];
 101   ///
 102   /// Vendor specific parameters fields, the sizeof (ATAPI_INQUIRY_DATA) is 254
 103   /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.
 104   ///
 105   UINT8 vendor_specific_96_253[253 - 96 + 1];
 106 } ATAPI_INQUIRY_DATA;
 107
 108 ///
 109 /// Request Sense Standard Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)
 110 ///
 111 typedef struct {
 112   UINT8 error_code : 7;
 113   UINT8 valid : 1;
 114   UINT8 reserved_1;
 115   UINT8 sense_key : 4;
 116   UINT8 reserved_2 : 1;
 117   UINT8 Vendor_specifc_1 : 3;
 118   UINT8 vendor_specific_3;
 119   UINT8 vendor_specific_4;
 120   UINT8 vendor_specific_5;
 121   UINT8 vendor_specific_6;
 122   UINT8 addnl_sense_length;           ///< n - 7
 123   UINT8 vendor_specific_8;
 124   UINT8 vendor_specific_9;
 125   UINT8 vendor_specific_10;
 126   UINT8 vendor_specific_11;
 127   UINT8 addnl_sense_code;             ///< mandatory
 128   UINT8 addnl_sense_code_qualifier;   ///< mandatory
 129   UINT8 field_replaceable_unit_code;  ///< optional
 130   UINT8 sense_key_specific_15 : 7;
 131   UINT8 SKSV : 1;
 132   UINT8 sense_key_specific_16;
 133   UINT8 sense_key_specific_17;
 134   ///
 135   /// Followed by additional sense bytes.
 136   /// the sizeof (ATAPI_REQUEST_SENSE_DATA) is 254,
 137   /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.
 138   ///
 139   UINT8 additional_sense_bytes_18_253[253 - 18 + 1];
 140 } ATAPI_REQUEST_SENSE_DATA;
 141
 142 //
 143 // The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)
 144 //
 145
 146 ///
 147 /// READ CAPACITY Data
 148 ///
 149 typedef struct {
 150   UINT8 LastLba3;
 151   UINT8 LastLba2;
 152   UINT8 LastLba1;
 153   UINT8 LastLba0;
 154   UINT8 BlockSize3;
 155   UINT8 BlockSize2;
 156   UINT8 BlockSize1;
 157   UINT8 BlockSize0;
 158 } ATAPI_READ_CAPACITY_DATA;
 159
 160 ///
 161 /// Capacity List Header + Current/Maximum Capacity Descriptor,
 162 ///
 163 typedef struct {
 164   UINT8 reserved_0;
 165   UINT8 reserved_1;
 166   UINT8 reserved_2;
 167   UINT8 Capacity_Length;
 168   UINT8 LastLba3;
 169   UINT8 LastLba2;
 170   UINT8 LastLba1;
 171   UINT8 LastLba0;
 172   UINT8 DesCode : 2;
 173   UINT8 reserved_9 : 6;
 174   UINT8 BlockSize2;
 175   UINT8 BlockSize1;
 176   UINT8 BlockSize0;
 177 } ATAPI_READ_FORMAT_CAPACITY_DATA;
 178
 179 ///
 180 /// Test Unit Ready Command
 181 ///
 182 typedef struct {
 183   UINT8 opcode;
 184   UINT8 reserved_1;
 185   UINT8 reserved_2;
 186   UINT8 reserved_3;
 187   UINT8 reserved_4;
 188   UINT8 reserved_5;
 189   UINT8 reserved_6;
 190   UINT8 reserved_7;
 191   UINT8 reserved_8;
 192   UINT8 reserved_9;
 193   UINT8 reserved_10;
 194   UINT8 reserved_11;
 195 } ATAPI_TEST_UNIT_READY_CMD;
 196
 197 ///
 198 /// INQUIRY Command
 199 ///
 200 typedef struct {
 201   UINT8 opcode;
 202   UINT8 reserved_1 : 5;
 203   UINT8 lun : 3;
 204   UINT8 page_code;        ///< defined in SFF8090i, V6
 205   UINT8 reserved_3;
 206   UINT8 allocation_length;
 207   UINT8 reserved_5;
 208   UINT8 reserved_6;
 209   UINT8 reserved_7;
 210   UINT8 reserved_8;
 211   UINT8 reserved_9;
 212   UINT8 reserved_10;
 213   UINT8 reserved_11;
 214 } ATAPI_INQUIRY_CMD;
 215
 216 ///
 217 /// REQUEST SENSE Command
 218 ///
 219 typedef struct {
 220   UINT8 opcode;
 221   UINT8 reserved_1 : 5;
 222   UINT8 lun : 3;
 223   UINT8 reserved_2;
 224   UINT8 reserved_3;
 225   UINT8 allocation_length;
 226   UINT8 reserved_5;
 227   UINT8 reserved_6;
 228   UINT8 reserved_7;
 229   UINT8 reserved_8;
 230   UINT8 reserved_9;
 231   UINT8 reserved_10;
 232   UINT8 reserved_11;
 233 } ATAPI_REQUEST_SENSE_CMD;
 234
 235 ///
 236 /// READ (10) Command
 237 ///
 238 typedef struct {
 239   UINT8 opcode;
 240   UINT8 reserved_1 : 5;
 241   UINT8 lun : 3;
 242   UINT8 Lba0;
 243   UINT8 Lba1;
 244   UINT8 Lba2;
 245   UINT8 Lba3;
 246   UINT8 reserved_6;
 247   UINT8 TranLen0;
 248   UINT8 TranLen1;
 249   UINT8 reserved_9;
 250   UINT8 reserved_10;
 251   UINT8 reserved_11;
 252 } ATAPI_READ10_CMD;
 253
 254 ///
 255 /// READ Format Capacity Command
 256 ///
 257 typedef struct {
 258   UINT8 opcode;
 259   UINT8 reserved_1 : 5;
 260   UINT8 lun : 3;
 261   UINT8 reserved_2;
 262   UINT8 reserved_3;
 263   UINT8 reserved_4;
 264   UINT8 reserved_5;
 265   UINT8 reserved_6;
 266   UINT8 allocation_length_hi;
 267   UINT8 allocation_length_lo;
 268   UINT8 reserved_9;
 269   UINT8 reserved_10;
 270   UINT8 reserved_11;
 271 } ATAPI_READ_FORMAT_CAP_CMD;
 272
 273 ///
 274 /// MODE SENSE Command
 275 ///
 276 typedef struct {
 277   UINT8 opcode;
 278   UINT8 reserved_1 : 5;
 279   UINT8 lun : 3;
 280   UINT8 page_code : 6;
 281   UINT8 page_control : 2;
 282   UINT8 reserved_3;
 283   UINT8 reserved_4;
 284   UINT8 reserved_5;
 285   UINT8 reserved_6;
 286   UINT8 parameter_list_length_hi;
 287   UINT8 parameter_list_length_lo;
 288   UINT8 reserved_9;
 289   UINT8 reserved_10;
 290   UINT8 reserved_11;
 291 } ATAPI_MODE_SENSE_CMD;
 292
 293 ///
 294 /// ATAPI_PACKET_COMMAND is not defined in ATA specification.
 295 /// We add it here for the convenience for ATA/ATAPI module writer.
 296 ///
 297 typedef union {
 298   UINT16                    Data16[6];
 299   ATAPI_TEST_UNIT_READY_CMD TestUnitReady;
 300   ATAPI_READ10_CMD          Read10;
 301   ATAPI_REQUEST_SENSE_CMD   RequestSence;
 302   ATAPI_INQUIRY_CMD         Inquiry;
 303   ATAPI_MODE_SENSE_CMD      ModeSense;
 304   ATAPI_READ_FORMAT_CAP_CMD ReadFormatCapacity;
 305 } ATAPI_PACKET_COMMAND;
 306
 307
 308 #define ATAPI_MAX_DMA_EXT_CMD_SECTORS 0x10000
 309 #define ATAPI_MAX_DMA_CMD_SECTORS     0x100
 310
 311 //
 312 // ATA Packet Command Code
 313 //
 314 #define ATA_CMD_SOFT_RESET                  0x08   ///< defined in ATA-6
 315 #define ATA_CMD_PACKET                      0xA0   ///< defined in ATA-6
 316 #define ATA_CMD_IDENTIFY_DEVICE             0xA1   ///< defined in ATA-6
 317 #define ATA_CMD_SERVICE                     0xA2   ///< defined in ATA-6
 318 #define ATA_CMD_TEST_UNIT_READY             0x00   ///< defined in ATA-6
 319 #define ATA_CMD_REQUEST_SENSE               0x03   ///< defined in ATA-6
 320 #define ATA_CMD_INQUIRY                     0x12   ///< defined in ATAPI Removable Rewritable Media Devcies
 321 #define ATA_CMD_READ_FORMAT_CAPACITY        0x23   ///< defined in ATAPI Removable Rewritable Media Devcies
 322 #define ATA_CMD_READ_CAPACITY               0x25   ///< defined in ATAPI Removable Rewritable Media Devcies
 323 #define ATA_CMD_READ_10                     0x28   ///< defined in ATAPI Removable Rewritable Media Devcies
 324 #define ATA_CMD_WRITE_10                    0x2A   ///< defined in ATAPI Removable Rewritable Media Devcies
 325
 326 //
 327 // ATA Commands Code
 328 //
 329
 330 //
 331 // Class 1: PIO Data-In Commands
 332 //
 333 #define ATA_CMD_IDENTIFY_DRIVE          0xec
 334 #define ATA_CMD_READ_BUFFER             0xe4
 335 #define ATA_CMD_READ_SECTORS            0x20   ///< defined in ATA-5
 336 #define ATA_CMD_READ_SECTORS_WITH_RETRY 0x21   ///< defined in ATA-5
 337 #define ATA_CMD_READ_LONG               0x22   ///< defined in ATA-5
 338 #define ATA_CMD_READ_LONG_WITH_RETRY    0x23   ///< defined in ATA-5
 339 #define ATA_CMD_READ_SECTORS_EXT        0x24   ///< defined in ATA-6
 340
 341 //
 342 // Class 2: PIO Data-Out Commands
 343 //
 344 #define ATA_CMD_FORMAT_TRACK              0x50  ///< defined in ATA-3
 345 #define ATA_CMD_WRITE_BUFFER              0xe8  ///< defined in ATA-6
 346 #define ATA_CMD_WRITE_SECTORS             0x30  ///< defined in ATA-6
 347 #define ATA_CMD_WRITE_SECTORS_WITH_RETRY  0x31  ///< defined in ATA-4
 348 #define ATA_CMD_WRITE_LONG                0x32  ///< defined in ATA-3
 349 #define ATA_CMD_WRITE_LONG_WITH_RETRY     0x33  ///< defined in ATA-3
 350 #define ATA_CMD_WRITE_VERIFY              0x3c  ///< defined in ATA-3
 351 #define ATA_CMD_WRITE_SECTORS_EXT         0x34  ///< defined in ATA-6
 352
 353 //
 354 // Class 3 No Data Command
 355 //
 356 #define ATA_CMD_ACK_MEDIA_CHANGE        0xdb  ///< defined in ATA-2
 357 #define ATA_CMD_BOOT_POST_BOOT          0xdc  ///< defined in ATA-2
 358 #define ATA_CMD_BOOT_PRE_BOOT           0xdd  ///< defined in ATA-2
 359 #define ATA_CMD_CHECK_POWER_MODE        0x98  ///< defined in ATA-3
 360 #define ATA_CMD_CHECK_POWER_MODE_ALIAS  0xe5  ///< defined in ATA-6
 361 #define ATA_CMD_DOOR_LOCK               0xde  ///< defined in ATA-6
 362 #define ATA_CMD_DOOR_UNLOCK             0xdf  ///< defined in ATA-6
 363 #define ATA_CMD_EXEC_DRIVE_DIAG         0x90  ///< defined in ATA-6
 364 #define ATA_CMD_IDLE_ALIAS              0x97  ///< defined in ATA-3
 365 #define ATA_CMD_IDLE                    0xe3  ///< defined in ATA-6
 366 #define ATA_CMD_IDLE_IMMEDIATE          0x95  ///< defined in ATA-3
 367 #define ATA_CMD_IDLE_IMMEDIATE_ALIAS    0xe1  ///< defined in ATA-6
 368 #define ATA_CMD_INIT_DRIVE_PARAM        0x91  ///< defined in ATA-5
 369 #define ATA_CMD_RECALIBRATE             0x10  ///< defined in ATA-3
 370 #define ATA_CMD_READ_DRIVE_STATE        0xe9  ///< defined in ATA-2
 371 #define ATA_CMD_SET_MULTIPLE_MODE       0xC6  ///< defined in ATA-6
 372 #define ATA_CMD_READ_VERIFY             0x40  ///< defined in ATA-6
 373 #define ATA_CMD_READ_VERIFY_WITH_RETRY  0x41  ///< defined in ATA-4
 374 #define ATA_CMD_SEEK                    0x70  ///< defined in ATA-6
 375 #define ATA_CMD_SET_FEATURES            0xef  ///< defined in ATA-6
 376 #define ATA_CMD_STANDBY                 0x96  ///< defined in ATA-3
 377 #define ATA_CMD_STANDBY_ALIAS           0xe2  ///< defined in ATA-6
 378 #define ATA_CMD_STANDBY_IMMEDIATE       0x94  ///< defined in ATA-3
 379 #define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0  ///< defined in ATA-6
 380 ///
 381 /// S.M.A.R.T
 382 ///
 383 #define ATA_CMD_SMART               0xb0
 384 #define ATA_CONSTANT_C2             0xc2
 385 #define ATA_CONSTANT_4F             0x4f
 386 #define ATA_SMART_ENABLE_OPERATION  0xd8
 387 #define ATA_SMART_RETURN_STATUS     0xda
 388
 389 ///
 390 /// Class 4: DMA Command
 391 ///
 392 #define ATA_CMD_READ_DMA              0xc8   ///< defined in ATA-6
 393 #define ATA_CMD_READ_DMA_WITH_RETRY   0xc9   ///< defined in ATA-4
 394 #define ATA_CMD_READ_DMA_EXT          0x25   ///< defined in ATA-6
 395 #define ATA_CMD_WRITE_DMA             0xca   ///< defined in ATA-6
 396 #define ATA_CMD_WRITE_DMA_WITH_RETRY  0xcb   ///< defined in ATA-4
 397 #define ATA_CMD_WRITE_DMA_EXT         0x35   ///< defined in ATA-6
 398
 399 ///
 400 /// default content of device control register, disable INT,
 401 /// Bit3 is set to 1 according ATA-1
 402 ///
 403 #define ATA_DEFAULT_CTL           (0x0a)
 404 ///
 405 /// default context of Device/Head Register,
 406 /// Bit7 and Bit5 are set to 1 for back-compatibilities
 407 ///
 408 #define ATA_DEFAULT_CMD           (0xa0)
 409
 410 #define ATAPI_MAX_BYTE_COUNT  (0xfffe)
 411
 412 #define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i
 413
 414 //
 415 // Sense Key, Additional Sense Codes and Additional Sense Code Qualifier
 416 // defined in MultiMedia Commands (MMC, MMC-2)
 417 //
 418 // Sense Key
 419 //
 420 #define ATA_SK_NO_SENSE         (0x0)
 421 #define ATA_SK_RECOVERY_ERROR   (0x1)
 422 #define ATA_SK_NOT_READY        (0x2)
 423 #define ATA_SK_MEDIUM_ERROR     (0x3)
 424 #define ATA_SK_HARDWARE_ERROR   (0x4)
 425 #define ATA_SK_ILLEGAL_REQUEST  (0x5)
 426 #define ATA_SK_UNIT_ATTENTION   (0x6)
 427 #define ATA_SK_DATA_PROTECT     (0x7)
 428 #define ATA_SK_BLANK_CHECK      (0x8)
 429 #define ATA_SK_VENDOR_SPECIFIC  (0x9)
 430 #define ATA_SK_RESERVED_A       (0xA)
 431 #define ATA_SK_ABORT            (0xB)
 432 #define ATA_SK_RESERVED_C       (0xC)
 433 #define ATA_SK_OVERFLOW         (0xD)
 434 #define ATA_SK_MISCOMPARE       (0xE)
 435 #define ATA_SK_RESERVED_F       (0xF)
 436
 437 //
 438 // Additional Sense Codes
 439 //
 440 #define ATA_ASC_NOT_READY                   (0x04)
 441 #define ATA_ASC_MEDIA_ERR1                  (0x10)
 442 #define ATA_ASC_MEDIA_ERR2                  (0x11)
 443 #define ATA_ASC_MEDIA_ERR3                  (0x14)
 444 #define ATA_ASC_MEDIA_ERR4                  (0x30)
 445 #define ATA_ASC_MEDIA_UPSIDE_DOWN           (0x06)
 446 #define ATA_ASC_INVALID_CMD                 (0x20)
 447 #define ATA_ASC_LBA_OUT_OF_RANGE            (0x21)
 448 #define ATA_ASC_INVALID_FIELD               (0x24)
 449 #define ATA_ASC_WRITE_PROTECTED             (0x27)
 450 #define ATA_ASC_MEDIA_CHANGE                (0x28)
 451 #define ATA_ASC_RESET                       (0x29)  ///< Power On Reset or Bus Reset occurred
 452 #define ATA_ASC_ILLEGAL_FIELD               (0x26)
 453 #define ATA_ASC_NO_MEDIA                    (0x3A)
 454 #define ATA_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)
 455
 456 //
 457 // Additional Sense Code Qualifier
 458 //
 459 #define ATA_ASCQ_IN_PROGRESS  (0x01)
 460
 461 //
 462 // Error Register
 463 //
 464 #define ATA_ERRREG_BBK   BIT7  ///< Bad block detected      defined in ATA-1
 465 #define ATA_ERRREG_UNC   BIT6  ///< Uncorrectable Data      defined in ATA-3
 466 #define ATA_ERRREG_MC    BIT5  ///< Media Change            defined in ATA-3
 467 #define ATA_ERRREG_IDNF  BIT4  ///< ID Not Found            defined in ATA-3
 468 #define ATA_ERRREG_MCR   BIT3  ///< Media Change Requested  defined in ATA-3
 469 #define ATA_ERRREG_ABRT  BIT2  ///< Aborted Command         defined in ATA-6
 470 #define ATA_ERRREG_TK0NF BIT1  ///< Track 0 Not Found       defined in ATA-3
 471 #define ATA_ERRREG_AMNF  BIT0  ///< Address Mark Not Found  defined in ATA-3
 472
 473 //
 474 // Status Register
 475 //
 476 #define ATA_STSREG_BSY   BIT7  ///< Controller Busy         defined in ATA-6
 477 #define ATA_STSREG_DRDY  BIT6  ///< Drive Ready             defined in ATA-6
 478 #define ATA_STSREG_DWF   BIT5  ///< Drive Write Fault       defined in ATA-6
 479 #define ATA_STSREG_DSC   BIT4  ///< Disk Seek Complete      defined in ATA-3
 480 #define ATA_STSREG_DRQ   BIT3  ///< Data Request            defined in ATA-6
 481 #define ATA_STSREG_CORR  BIT2  ///< Corrected Data          defined in ATA-3
 482 #define ATA_STSREG_IDX   BIT1  ///< Index                   defined in ATA-3
 483 #define ATA_STSREG_ERR   BIT0  ///< Error                   defined in ATA-6
 484
 485 //
 486 // Device Control Register
 487 //
 488 #define ATA_CTLREG_SRST  BIT2  ///< Software Reset
 489 #define ATA_CTLREG_IEN_L BIT1  ///< Interrupt Enable #
 490
 491 #endif
 492