MdePkg/Include/IndustryStandard/DmaRemappingReportingTable.h

   1 /** @file
   2   DMA Remapping Reporting (DMAR) ACPI table definition from Intel(R)
   3   Virtualization Technology for Directed I/O (VT-D) Architecture Specification.
   4
   5   Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8   @par Revision Reference:
   9     - Intel(R) Virtualization Technology for Directed I/O (VT-D) Architecture
  10       Specification v3.2, Dated October 2020.
  11       https://software.intel.com/content/dam/develop/external/us/en/documents/vt-directed-io-spec.pdf
  12
  13   @par Glossary:
  14     - HPET - High Precision Event Timer
  15     - NUMA - Non-uniform Memory Access
  16 **/
  17
  18 #ifndef _DMA_REMAPPING_REPORTING_TABLE_H_
  19 #define _DMA_REMAPPING_REPORTING_TABLE_H_
  20
  21 #include <IndustryStandard/Acpi.h>
  22
  23 #pragma pack(1)
  24
  25 ///
  26 /// DMA-Remapping Reporting Structure definitions from section 8.1
  27 ///@{
  28 #define EFI_ACPI_DMAR_REVISION  0x01
  29
  30 #define EFI_ACPI_DMAR_FLAGS_INTR_REMAP                     BIT0
  31 #define EFI_ACPI_DMAR_FLAGS_X2APIC_OPT_OUT                 BIT1
  32 #define EFI_ACPI_DMAR_FLAGS_DMA_CTRL_PLATFORM_OPT_IN_FLAG  BIT2
  33 ///@}
  34
  35 ///
  36 /// Remapping Structure Types definitions from section 8.2
  37 ///@{
  38 #define EFI_ACPI_DMAR_TYPE_DRHD  0x00
  39 #define EFI_ACPI_DMAR_TYPE_RMRR  0x01
  40 #define EFI_ACPI_DMAR_TYPE_ATSR  0x02
  41 #define EFI_ACPI_DMAR_TYPE_RHSA  0x03
  42 #define EFI_ACPI_DMAR_TYPE_ANDD  0x04
  43 #define EFI_ACPI_DMAR_TYPE_SATC  0x05
  44 ///@}
  45
  46 ///
  47 /// DMA-Remapping Hardware Unit definitions from section 8.3
  48 ///
  49 #define EFI_ACPI_DMAR_DRHD_FLAGS_INCLUDE_PCI_ALL  BIT0
  50
  51 ///
  52 /// DMA-Remapping Device Scope Entry Structure definitions from section 8.3.1
  53 ///@{
  54 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_ENDPOINT           0x01
  55 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_PCI_BRIDGE             0x02
  56 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_IOAPIC                 0x03
  57 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_MSI_CAPABLE_HPET       0x04
  58 #define EFI_ACPI_DEVICE_SCOPE_ENTRY_TYPE_ACPI_NAMESPACE_DEVICE  0x05
  59 ///@}
  60
  61 ///
  62 /// Root Port ATS Capability Reporting Structure definitions from section 8.5
  63 ///
  64 #define EFI_ACPI_DMAR_ATSR_FLAGS_ALL_PORTS  BIT0
  65
  66 ///
  67 /// Definition for DMA Remapping Structure Header
  68 ///
  69 typedef struct {
  70   UINT16    Type;
  71   UINT16    Length;
  72 } EFI_ACPI_DMAR_STRUCTURE_HEADER;
  73
  74 ///
  75 /// Definition for DMA-Remapping PCI Path
  76 ///
  77 typedef struct {
  78   UINT8    Device;
  79   UINT8    Function;
  80 } EFI_ACPI_DMAR_PCI_PATH;
  81
  82 ///
  83 /// Device Scope Structure is defined in section 8.3.1
  84 ///
  85 typedef struct {
  86   UINT8     Type;
  87   UINT8     Length;
  88   UINT16    Reserved2;
  89   UINT8     EnumerationId;
  90   UINT8     StartBusNumber;
  91 } EFI_ACPI_DMAR_DEVICE_SCOPE_STRUCTURE_HEADER;
  92
  93 /**
  94   DMA-remapping hardware unit definition (DRHD) structure is defined in
  95   section 8.3. This uniquely represents a remapping hardware unit present
  96   in the platform. There must be at least one instance of this structure
  97   for each PCI segment in the platform.
  98 **/
  99 typedef struct {
 100   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 101
 102   /**
 103     - Bit[0]: INCLUDE_PCI_ALL
 104               - If Set, this remapping hardware unit has under its scope all
 105                 PCI compatible devices in the specified Segment, except devices
 106                 reported under the scope of other remapping hardware units for
 107                 the same Segment.
 108               - If Clear, this remapping hardware unit has under its scope only
 109                 devices in the specified Segment that are explicitly identified
 110                 through the DeviceScope field.
 111     - Bits[7:1] Reserved.
 112   **/
 113   UINT8     Flags;
 114   UINT8     Reserved;
 115   ///
 116   /// The PCI Segment associated with this unit.
 117   ///
 118   UINT16    SegmentNumber;
 119   ///
 120   /// Base address of remapping hardware register-set for this unit.
 121   ///
 122   UINT64    RegisterBaseAddress;
 123 } EFI_ACPI_DMAR_DRHD_HEADER;
 124
 125 /**
 126   Reserved Memory Region Reporting Structure (RMRR) is described in section 8.4
 127   Reserved memory ranges that may be DMA targets may be reported through the
 128   RMRR structures, along with the devices that requires access to the specified
 129   reserved memory region.
 130 **/
 131 typedef struct {
 132   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 133   UINT8                             Reserved[2];
 134   ///
 135   /// PCI Segment Number associated with devices identified through
 136   /// the Device Scope field.
 137   ///
 138   UINT16                            SegmentNumber;
 139   ///
 140   /// Base address of 4KB-aligned reserved memory region
 141   ///
 142   UINT64                            ReservedMemoryRegionBaseAddress;
 143
 144   /**
 145     Last address of the reserved memory region. Value in this field must be
 146     greater than the value in Reserved Memory Region Base Address field.
 147     The reserved memory region size (Limit - Base + 1) must be an integer
 148     multiple of 4KB.
 149   **/
 150   UINT64                            ReservedMemoryRegionLimitAddress;
 151 } EFI_ACPI_DMAR_RMRR_HEADER;
 152
 153 /**
 154   Root Port ATS Capability Reporting (ATSR) structure is defined in section 8.5.
 155   This structure is applicable only for platforms supporting Device-TLBs as
 156   reported through the Extended Capability Register. For each PCI Segment in
 157   the platform that supports Device-TLBs, BIOS provides an ATSR structure. The
 158   ATSR structures identifies PCI-Express Root-Ports supporting Address
 159   Translation Services (ATS) transactions. Software must enable ATS on endpoint
 160   devices behind a Root Port only if the Root Port is reported as supporting
 161   ATS transactions.
 162 **/
 163 typedef struct {
 164   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 165
 166   /**
 167     - Bit[0]: ALL_PORTS:
 168               - If Set, indicates all PCI Express Root Ports in the specified
 169                 PCI Segment supports ATS transactions.
 170               - If Clear, indicates ATS transactions are supported only on
 171                 Root Ports identified through the Device Scope field.
 172     - Bits[7:1] Reserved.
 173   **/
 174   UINT8     Flags;
 175   UINT8     Reserved;
 176   ///
 177   /// The PCI Segment associated with this ATSR structure
 178   ///
 179   UINT16    SegmentNumber;
 180 } EFI_ACPI_DMAR_ATSR_HEADER;
 181
 182 /**
 183   Remapping Hardware Static Affinity (RHSA) is an optional structure defined
 184   in section 8.6. This is intended to be used only on NUMA platforms with
 185   Remapping hardware units and memory spanned across multiple nodes.
 186   When used, there must be a RHSA structure for each Remapping hardware unit
 187   reported through DRHD structure.
 188 **/
 189 typedef struct {
 190   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 191   UINT8                             Reserved[4];
 192   ///
 193   /// Register Base Address of this Remap hardware unit reported in the
 194   /// corresponding DRHD structure.
 195   ///
 196   UINT64                            RegisterBaseAddress;
 197   ///
 198   /// Proximity Domain to which the Remap hardware unit identified by the
 199   /// Register Base Address field belongs.
 200   ///
 201   UINT32                            ProximityDomain;
 202 } EFI_ACPI_DMAR_RHSA_HEADER;
 203
 204 /**
 205   An ACPI Name-space Device Declaration (ANDD) structure is defined in section
 206   8.7 and uniquely represents an ACPI name-space enumerated device capable of
 207   issuing DMA requests in the platform. ANDD structures are used in conjunction
 208   with Device-Scope entries of type ACPI_NAMESPACE_DEVICE.
 209 **/
 210 typedef struct {
 211   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 212   UINT8                             Reserved[3];
 213
 214   /**
 215     Each ACPI device enumerated through an ANDD structure must have a unique
 216     value for this field. To report an ACPI device with ACPI Device Number
 217     value of X, under the scope of a DRHD unit, a Device-Scope entry of type
 218     ACPI_NAMESPACE_DEVICE is used with value of X in the Enumeration ID field.
 219     The Start Bus Number and Path fields in the Device-Scope together
 220     provides the 16-bit source-id allocated by platform for the ACPI device.
 221   **/
 222   UINT8    AcpiDeviceNumber;
 223 } EFI_ACPI_DMAR_ANDD_HEADER;
 224
 225 /**
 226   An SoC Integrated Address Translation Cache (SATC) reporting structure is
 227   defined in section 8.8.
 228 **/
 229 typedef struct {
 230   EFI_ACPI_DMAR_STRUCTURE_HEADER    Header;
 231
 232   /**
 233     - Bit[0]: ATC_REQUIRED:
 234               - If Set, indicates that every SoC integrated device enumerated
 235                 in this table has a functional requirement to enable its ATC
 236                 (via the ATS capability) for device operation.
 237               - If Clear, any device enumerated in this table can operate when
 238                 its respective ATC is not enabled (albeit with reduced
 239                 performance or functionality).
 240     - Bits[7:1] Reserved.
 241   **/
 242   UINT8     Flags;
 243   UINT8     Reserved;
 244   ///
 245   /// The PCI Segment associated with this SATC structure. All SoC integrated
 246   /// devices within a PCI segment with same value for Flags field must be
 247   /// enumerated in the same SATC structure.
 248   ///
 249   UINT16    SegmentNumber;
 250 } EFI_ACPI_DMAR_SATC_HEADER;
 251
 252 /**
 253   DMA Remapping Reporting Structure Header as defined in section 8.1
 254   This header will be followed by list of Remapping Structures listed below
 255     - DMA Remapping Hardware Unit Definition (DRHD)
 256     - Reserved Memory Region Reporting (RMRR)
 257     - Root Port ATS Capability Reporting (ATSR)
 258     - Remapping Hardware Static Affinity (RHSA)
 259     - ACPI Name-space Device Declaration (ANDD)
 260     - SoC Integrated Address Translation Cache reporting (SATC)
 261   These structure types must by reported in numerical order.
 262   i.e., All remapping structures of type 0 (DRHD) enumerated before remapping
 263   structures of type 1 (RMRR), and so forth.
 264 **/
 265 typedef struct {
 266   EFI_ACPI_DESCRIPTION_HEADER    Header;
 267
 268   /**
 269     This field indicates the maximum DMA physical addressability supported by
 270     this platform. The system address map reported by the BIOS indicates what
 271     portions of this addresses are populated. The Host Address Width (HAW) of
 272     the platform is computed as (N+1), where N is the value reported in this
 273     field.
 274     For example, for a platform supporting 40 bits of physical addressability,
 275     the value of 100111b is reported in this field.
 276   **/
 277   UINT8    HostAddressWidth;
 278
 279   /**
 280     - Bit[0]:   INTR_REMAP - If Clear, the platform does not support interrupt
 281                 remapping. If Set, the platform supports interrupt remapping.
 282     - Bit[1]:   X2APIC_OPT_OUT - For firmware compatibility reasons, platform
 283                 firmware may Set this field to request system software to opt
 284                 out of enabling Extended xAPIC (X2APIC) mode. This field is
 285                 valid only when the INTR_REMAP field (bit 0) is Set.
 286     - Bit[2]:   DMA_CTRL_PLATFORM_OPT_IN_FLAG - Platform firmware is
 287                 recommended to Set this field to report any platform initiated
 288                 DMA is restricted to only reserved memory regions (reported in
 289                 RMRR structures) when transferring control to system software
 290                 such as on ExitBootServices().
 291     - Bits[7:3] Reserved.
 292   **/
 293   UINT8    Flags;
 294   UINT8    Reserved[10];
 295 } EFI_ACPI_DMAR_HEADER;
 296
 297 #pragma pack()
 298
 299 #endif