MdePkg/Include/IndustryStandard/IoRemappingTable.h

   1 /** @file
   2   ACPI IO Remapping Table (IORT) definitions.
   3
   4   Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>
   5   Copyright (c) 2018 - 2022, Arm Limited. All rights reserved.<BR>
   6
   7   SPDX-License-Identifier: BSD-2-Clause-Patent
   8
   9   @par Reference(s):
  10   - IO Remapping Table, Platform Design Document, Revision E.d, Feb 2022
  11     (https://developer.arm.com/documentation/den0049/)
  12   - IO Remapping Table, Platform Design Document, Revision E.e, Sept 2022
  13       (https://developer.arm.com/documentation/den0049/)
  14
  15   @par Glossary:
  16   - Ref  : Reference
  17   - Mem  : Memory
  18   - Desc : Descriptor
  19 **/
  20
  21 #ifndef __IO_REMAPPING_TABLE_H__
  22 #define __IO_REMAPPING_TABLE_H__
  23
  24 #include <IndustryStandard/Acpi.h>
  25
  26 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00  0x0
  27 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_04  0x4   // Deprecated
  28 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_05  0x5
  29 #define EFI_ACPI_IO_REMAPPING_TABLE_REVISION_06  0x6
  30
  31 #define EFI_ACPI_IORT_TYPE_ITS_GROUP     0x0
  32 #define EFI_ACPI_IORT_TYPE_NAMED_COMP    0x1
  33 #define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX  0x2
  34 #define EFI_ACPI_IORT_TYPE_SMMUv1v2      0x3
  35 #define EFI_ACPI_IORT_TYPE_SMMUv3        0x4
  36 #define EFI_ACPI_IORT_TYPE_PMCG          0x5
  37 #define EFI_ACPI_IORT_TYPE_RMR           0x6
  38
  39 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA  BIT0
  40
  41 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR   BIT0
  42 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA   BIT1
  43 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA   BIT2
  44 #define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO  BIT3
  45
  46 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM   BIT0
  47 #define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS  BIT1
  48
  49 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1             0x0
  50 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2             0x1
  51 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400         0x2
  52 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500         0x3
  53 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401         0x4
  54 #define EFI_ACPI_IORT_SMMUv1v2_MODEL_CAVIUM_THX_v2  0x5
  55
  56 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM       BIT0
  57 #define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK  BIT1
  58
  59 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL  0x0
  60 #define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE   0x1
  61
  62 #define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE    BIT0
  63 #define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE     BIT1
  64 #define EFI_ACPI_IORT_SMMUv3_FLAG_PROXIMITY_DOMAIN  BIT3
  65 #define EFI_ACPI_IORT_SMMUv3_FLAG_DEVICEID_VALID    BIT4
  66
  67 #define EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC           0x0
  68 #define EFI_ACPI_IORT_SMMUv3_MODEL_HISILICON_HI161X  0x1
  69 #define EFI_ACPI_IORT_SMMUv3_MODEL_CAVIUM_CN99XX     0x2
  70
  71 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED  0x0
  72 #define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED    BIT0
  73
  74 #define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_UNSUPPORTED  0x0
  75 #define EFI_ACPI_IORT_ROOT_COMPLEX_PRI_SUPPORTED    BIT1
  76
  77 #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_UNSUPPORTED  0x0
  78 #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_FWD_SUPPORTED    BIT2
  79
  80 #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_UNSUPPORTED  0x0
  81 #define EFI_ACPI_IORT_ROOT_COMPLEX_PASID_SUPPORTED    BIT1
  82
  83 #define EFI_ACPI_IORT_RMR_REMAP_NOT_PERMITTED  0x0
  84 #define EFI_ACPI_IORT_RMR_REMAP_PERMITTED      BIT0
  85
  86 #define EFI_ACPI_IORT_RMR_ACCESS_REQ_NOT_PRIVILEGED  0x0
  87 #define EFI_ACPI_IORT_RMR_ACCESS_REQ_PRIVILEGED      BIT1
  88
  89 #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_NGNRNE             0x0
  90 #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_NGNRE              0x1
  91 #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_NGRE               0x2
  92 #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_DEV_GRE                0x3
  93 #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_NORM_IN_NC_OUT_NC      0x4
  94 #define EFI_ACPI_IORT_RMR_ACCESS_ATTRIB_NORM_IN_WB_OUT_WB_ISH  0x5
  95
  96 #define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE  BIT0
  97
  98 #define EFI_ACPI_IORT_RMR_NODE_REVISION_02  0x2    // Deprecated
  99
 100 #pragma pack(1)
 101
 102 ///
 103 /// Table header
 104 ///
 105 typedef struct {
 106   EFI_ACPI_DESCRIPTION_HEADER    Header;
 107   UINT32                         NumNodes;
 108   UINT32                         NodeOffset;
 109   UINT32                         Reserved;
 110 } EFI_ACPI_6_0_IO_REMAPPING_TABLE;
 111
 112 ///
 113 /// Definition for ID mapping table shared by all node types
 114 ///
 115 typedef struct {
 116   UINT32    InputBase;
 117   UINT32    NumIds;
 118   UINT32    OutputBase;
 119   UINT32    OutputReference;
 120   UINT32    Flags;
 121 } EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;
 122
 123 ///
 124 /// Node header definition shared by all node types
 125 ///
 126 typedef struct {
 127   UINT8     Type;
 128   UINT16    Length;
 129   UINT8     Revision;
 130   UINT32    Identifier;
 131   UINT32    NumIdMappings;
 132   UINT32    IdReference;
 133 } EFI_ACPI_6_0_IO_REMAPPING_NODE;
 134
 135 ///
 136 /// Node type 0: ITS node
 137 ///
 138 typedef struct {
 139   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 140
 141   UINT32                            NumItsIdentifiers;
 142   // UINT32                                  ItsIdentifiers[NumItsIdentifiers];
 143 } EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;
 144
 145 ///
 146 /// Node type 1: root complex node
 147 ///
 148 typedef struct {
 149   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 150
 151   UINT32                            CacheCoherent;
 152   UINT8                             AllocationHints;
 153   UINT16                            Reserved;
 154   UINT8                             MemoryAccessFlags;
 155
 156   UINT32                            AtsAttribute;
 157   UINT32                            PciSegmentNumber;
 158   UINT8                             MemoryAddressSize;
 159   UINT16                            PasidCapabilities;
 160   UINT8                             Reserved1[1];
 161   UINT32                            Flags;
 162 } EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;
 163
 164 ///
 165 /// Node type 2: named component node
 166 ///
 167 typedef struct {
 168   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 169
 170   UINT32                            Flags;
 171   UINT32                            CacheCoherent;
 172   UINT8                             AllocationHints;
 173   UINT16                            Reserved;
 174   UINT8                             MemoryAccessFlags;
 175   UINT8                             AddressSizeLimit;
 176   // UINT8                                   ObjectName[];
 177 } EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;
 178
 179 ///
 180 /// Node type 3: SMMUv1 or SMMUv2 node
 181 ///
 182 typedef struct {
 183   UINT32    Interrupt;
 184   UINT32    InterruptFlags;
 185 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;
 186
 187 typedef struct {
 188   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 189
 190   UINT64                            Base;
 191   UINT64                            Span;
 192   UINT32                            Model;
 193   UINT32                            Flags;
 194   UINT32                            GlobalInterruptArrayRef;
 195   UINT32                            NumContextInterrupts;
 196   UINT32                            ContextInterruptArrayRef;
 197   UINT32                            NumPmuInterrupts;
 198   UINT32                            PmuInterruptArrayRef;
 199
 200   UINT32                            SMMU_NSgIrpt;
 201   UINT32                            SMMU_NSgIrptFlags;
 202   UINT32                            SMMU_NSgCfgIrpt;
 203   UINT32                            SMMU_NSgCfgIrptFlags;
 204
 205   // EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT  ContextInterrupt[NumContextInterrupts];
 206   // EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT  PmuInterrupt[NumPmuInterrupts];
 207 } EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;
 208
 209 ///
 210 /// Node type 4: SMMUv3 node
 211 ///
 212 typedef struct {
 213   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 214
 215   UINT64                            Base;
 216   UINT32                            Flags;
 217   UINT32                            Reserved;
 218   UINT64                            VatosAddress;
 219   UINT32                            Model;
 220   UINT32                            Event;
 221   UINT32                            Pri;
 222   UINT32                            Gerr;
 223   UINT32                            Sync;
 224   UINT32                            ProximityDomain;
 225   UINT32                            DeviceIdMappingIndex;
 226 } EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;
 227
 228 ///
 229 /// Node type 5: PMCG node
 230 ///
 231 typedef struct {
 232   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 233
 234   UINT64                            Base;
 235   UINT32                            OverflowInterruptGsiv;
 236   UINT32                            NodeReference;
 237   UINT64                            Page1Base;
 238   // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE      OverflowInterruptMsiMapping[1];
 239 } EFI_ACPI_6_0_IO_REMAPPING_PMCG_NODE;
 240
 241 ///
 242 /// Memory Range Descriptor.
 243 ///
 244 typedef struct {
 245   /// Base address of Reserved Memory Range,
 246   /// aligned to a page size of 64K.
 247   UINT64    Base;
 248
 249   /// Length of the Reserved Memory range.
 250   /// Must be a multiple of the page size of 64K.
 251   UINT64    Length;
 252
 253   /// Reserved, must be zero.
 254   UINT32    Reserved;
 255 } EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC;
 256
 257 ///
 258 /// Node type 6: Reserved Memory Range (RMR) node
 259 ///
 260 typedef struct {
 261   EFI_ACPI_6_0_IO_REMAPPING_NODE    Node;
 262
 263   /// RMR flags
 264   UINT32                            Flags;
 265
 266   /// Memory range descriptor count.
 267   UINT32                            NumMemRangeDesc;
 268
 269   /// Offset of the memory range descriptor array.
 270   UINT32                            MemRangeDescRef;
 271   // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE         IdMapping[1];
 272   // EFI_ACPI_6_0_IO_REMAPPING_MEM_RANGE_DESC   MemRangeDesc[1];
 273 } EFI_ACPI_6_0_IO_REMAPPING_RMR_NODE;
 274
 275 #pragma pack()
 276
 277 #endif