MdePkg/Include/Ppi/SecPlatformInformation.h

   1 /** @file
   2   This file declares Sec Platform Information PPI.
   3
   4   This service is the primary handoff state into the PEI Foundation.
   5   The Security (SEC) component creates the early, transitory memory
   6   environment and also encapsulates knowledge of at least the
   7   location of the Boot Firmware Volume (BFV).
   8
   9 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
  10 SPDX-License-Identifier: BSD-2-Clause-Patent
  11
  12   @par Revision Reference:
  13   This PPI is introduced in PI Version 1.0.
  14
  15 **/
  16
  17 #ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
  18 #define __SEC_PLATFORM_INFORMATION_PPI_H__
  19
  20 #include <Pi/PiPeiCis.h>
  21
  22 #define EFI_SEC_PLATFORM_INFORMATION_GUID \
  23   { \
  24     0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
  25   }
  26
  27 typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
  28
  29
  30 ///
  31 /// EFI_HEALTH_FLAGS
  32 /// Contains information generated by microcode, hardware, and/or the Itanium
  33 /// processor PAL code about the state of the processor upon reset.
  34 ///
  35 typedef union {
  36   struct {
  37     ///
  38     /// A 2-bit field indicating self-test state after reset.
  39     ///
  40     UINT32   Status                   : 2;
  41     ///
  42     /// A 1-bit field indicating whether testing has occurred.
  43     /// If this field is zero, the processor has not been tested,
  44     /// and no further fields in the self-test State parameter are valid.
  45     ///
  46     UINT32   Tested                   : 1;
  47     ///
  48     /// Reserved 13 bits.
  49     ///
  50     UINT32   Reserved1                :13;
  51     ///
  52     /// A 1-bit field. If set to 1, this indicates that virtual
  53     /// memory features are not available.
  54     ///
  55     UINT32   VirtualMemoryUnavailable : 1;
  56     ///
  57     /// A 1-bit field. If set to 1, this indicates that IA-32 execution
  58     /// is not available.
  59     ///
  60     UINT32   Ia32ExecutionUnavailable : 1;
  61     ///
  62     /// A 1-bit field. If set to 1, this indicates that the floating
  63     /// point unit is not available.
  64     ///
  65     UINT32   FloatingPointUnavailable : 1;
  66     ///
  67     /// A 1-bit field. If set to 1, this indicates miscellaneous
  68     /// functional failure other than vm, ia, or fp.
  69     /// The test status field provides additional information on
  70     /// test failures when the State field returns a value of
  71     /// performance restricted or functionally restricted.
  72     /// The value returned is implementation dependent.
  73     ///
  74     UINT32   MiscFeaturesUnavailable  : 1;
  75     ///
  76     /// Reserved 12 bits.
  77     ///
  78     UINT32   Reserved2                :12;
  79   } Bits;
  80   UINT32     Uint32;
  81 } EFI_HEALTH_FLAGS;
  82
  83 #define NORMAL_BOOT_CALL    0x0
  84 #define RECOVERY_CHECK_CALL 0x3
  85
  86 typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;
  87 typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;
  88 ///
  89 /// The hand-off status structure for Itanium architecture.
  90 ///
  91 typedef struct {
  92   ///
  93   /// SALE_ENTRY state : 3 = Recovery_Check
  94   /// and 0 = RESET or Normal_Boot phase.
  95   ///
  96   UINT8 BootPhase;
  97   ///
  98   /// Firmware status on entry to SALE.
  99   ///
 100   UINT8 FWStatus;
 101   UINT16 Reserved1;
 102   UINT32 Reserved2;
 103   ///
 104   /// Geographically significant unique processor ID assigned by PAL.
 105   ///
 106   UINT16 ProcId;
 107   UINT16 Reserved3;
 108   UINT8  IdMask;
 109   UINT8  EidMask;
 110   UINT16 Reserved4;
 111   ///
 112   /// Address to make PAL calls.
 113   ///
 114   UINT64 PalCallAddress;
 115   ///
 116   /// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET
 117   /// return address, and if entry state is RESET, this contains
 118   /// address for PAL_authentication call.
 119   ///
 120   UINT64 PalSpecialAddress;
 121   ///
 122   /// GR35 from PALE_EXIT state.
 123   ///
 124   UINT64 SelfTestStatus;
 125   ///
 126   /// GR37 from PALE_EXIT state.
 127   ///
 128   UINT64 SelfTestControl;
 129   UINT64 MemoryBufferRequired;
 130 } ITANIUM_HANDOFF_STATUS;
 131
 132 ///
 133 /// EFI_SEC_PLATFORM_INFORMATION_RECORD.
 134 ///
 135 typedef union {
 136   IA32_HANDOFF_STATUS    IA32HealthFlags;
 137   X64_HANDOFF_STATUS     x64HealthFlags;
 138   ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;
 139 } EFI_SEC_PLATFORM_INFORMATION_RECORD;
 140
 141 /**
 142   This interface conveys state information out of the Security (SEC) phase into PEI.
 143
 144   This service is published by the SEC phase. The SEC phase handoff has an optional
 145   EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
 146   PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel
 147   architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated
 148   into the data structure abstracted by this service. This information is collected for the boot-strap
 149   processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute
 150   the PEI Foundation.
 151
 152   @param  PeiServices               The pointer to the PEI Services Table.
 153   @param  StructureSize             The pointer to the variable describing size of the input buffer.
 154   @param  PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
 155
 156   @retval EFI_SUCCESS               The data was successfully returned.
 157   @retval EFI_BUFFER_TOO_SMALL      The buffer was too small. The current buffer size needed to
 158                                     hold the record is returned in StructureSize.
 159
 160 **/
 161 typedef
 162 EFI_STATUS
 163 (EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(
 164   IN CONST  EFI_PEI_SERVICES                    **PeiServices,
 165   IN OUT    UINT64                              *StructureSize,
 166   OUT       EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
 167 );
 168
 169
 170 ///
 171 /// This service abstracts platform-specific information. It is necessary
 172 /// to convey this information to the PEI Foundation so that it can
 173 /// discover where to begin dispatching PEIMs.
 174 ///
 175 struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
 176   EFI_SEC_PLATFORM_INFORMATION  PlatformInformation;
 177 };
 178
 179
 180 extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
 181
 182 #endif