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1 /** @file
2 This file declares Sec Platform Information PPI.
3
4 This service is the primary handoff state into the PEI Foundation.
5 The Security (SEC) component creates the early, transitory memory
6 environment and also encapsulates knowledge of at least the
7 location of the Boot Firmware Volume (BFV).
8
9 Copyright (c) 2006 - 2008, Intel Corporation
10 All rights reserved. This program and the accompanying materials
11 are licensed and made available under the terms and conditions of the BSD License
12 which accompanies this distribution. The full text of the license may be found at
13 http://opensource.org/licenses/bsd-license.php
14
15 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
16 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17
18 @par Revision Reference:
19 This PPI is defined in PI.
20 Version 1.00.
21
22 **/
23
24 #ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
25 #define __SEC_PLATFORM_INFORMATION_PPI_H__
26
27 #define EFI_SEC_PLATFORM_INFORMATION_GUID \
28 { \
29 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
30 }
31
32 typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
33
34
35 ///
36 /// EFI_HEALTH_FLAGS
37 /// Contains information generated by microcode, hardware, and/or the Itanium
38 /// processor PAL code about the state of the processor upon reset.
39 ///
40 typedef union {
41 struct {
42 ///
43 /// A 2-bit field indicating self-test state after reset.
44 ///
45 UINT32 Status : 2;
46 ///
47 /// A 1-bit field indicating whether testing has occurred.
48 /// If this field is zero, the processor has not been tested,
49 /// and no further fields in the self-test State parameter are valid.
50 ///
51 UINT32 Tested : 1;
52 ///
53 /// Reserved 13 bits.
54 ///
55 UINT32 Reserved1 :13;
56 ///
57 /// A 1-bit field. If set to 1, indicates that virtual
58 /// memory features are not available.
59 ///
60 UINT32 VirtualMemoryUnavailable : 1;
61 ///
62 /// A 1-bit field. If set to 1, indicates that IA-32 execution
63 /// is not available.
64 ///
65 UINT32 Ia32ExecutionUnavailable : 1;
66 ///
67 /// A 1-bit field. If set to 1, indicates that the floating
68 /// point unit is not available.
69 ///
70 UINT32 FloatingPointUnavailable : 1;
71 ///
72 /// A 1-bit field. If set to 1, indicates miscellaneous
73 /// functional failure other than vm, ia, or fp.
74 /// The test status field provides additional information on
75 /// test failures when the State field returns a value of
76 /// performance restricted or functionally restricted.
77 /// The value returned is implementation dependent.
78 ///
79 UINT32 MiscFeaturesUnavailable : 1;
80 ///
81 /// Reserved 12 bits.
82 ///
83 UINT32 Reserved2 :12;
84 } Bits;
85 UINT32 Uint32;
86 } EFI_HEALTH_FLAGS;
87
88 #define NORMAL_BOOT_CALL 0x0
89 #define RECOVERY_CHECK_CALL 0x3
90
91 typedef struct {
92 UINT8 BootPhase;
93 UINT8 FWStatus;
94 UINT16 Reserved1;
95 UINT32 Reserved2;
96
97 UINT16 ProcId;
98 UINT16 Reserved3;
99 UINT8 IdMask;
100 UINT8 EidMask;
101 UINT16 Reserved4;
102
103 UINT64 PalCallAddress;
104 UINT64 PalSpecialAddress;
105 UINT64 SelfTestStatus;
106 UINT64 SelfTestControl;
107 UINT64 MemoryBufferRequired;
108
109 } IPF_HANDOFF_STATUS;
110
111 ///
112 /// EFI_SEC_PLATFORM_INFORMATION_RECORD
113 ///
114 typedef struct {
115 ///
116 /// Contains information generated by microcode, hardware,
117 /// and/or the Itanium processor PAL code about the state
118 /// of the processor upon reset.
119 ///
120 EFI_HEALTH_FLAGS HealthFlags;
121 } EFI_SEC_PLATFORM_INFORMATION_RECORD;
122
123
124
125 /**
126 This interface conveys state information out of the Security (SEC) phase into PEI.
127
128 This service is published by the SEC phase. The SEC phase handoff has an optional
129 EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
130 PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel
131 architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated
132 into the data structure abstracted by this service. This information is collected for the boot-strap
133 processor (BSP) on IA-32, and for Itanium architecture, it is available on all processors that execute
134 the PEI Foundation.
135
136 @param PeiServices Pointer to the PEI Services Table.
137 @param StructureSize Pointer to the variable describing size of the input buffer.
138 @param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
139
140 @retval EFI_SUCCESS The data was successfully returned.
141 @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
142
143 **/
144 typedef
145 EFI_STATUS
146 (EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(
147 IN CONST EFI_PEI_SERVICES **PeiServices,
148 IN OUT UINT64 *StructureSize,
149 OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
150 );
151
152
153 ///
154 /// This service abstracts platform-specific information. It is necessary
155 /// to convey this information to the PEI Foundation so that it can
156 /// discover where to begin dispatching PEIMs.
157 ///
158 struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
159 ///
160 /// Conveys state information out of the SEC phase into PEI.
161 ///
162 EFI_SEC_PLATFORM_INFORMATION PlatformInformation;
163 };
164
165
166 extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
167
168 #endif