OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for BaseRom instance of ACPI Timer Library
   3
   4   Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   This program and the accompanying materials are licensed and made
   8   available under the terms and conditions of the BSD License which
   9   accompanies this distribution.   The full text of the license may
  10   be found at http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 **/
  15
  16 #include <Library/DebugLib.h>
  17 #include <Library/IoLib.h>
  18 #include <Library/PciLib.h>
  19 #include <Library/PcdLib.h>
  20 #include <OvmfPlatforms.h>
  21
  22 //
  23 // Power Management PCI Configuration Register fields
  24 //
  25 #define PMBA_RTE      BIT0
  26
  27 //
  28 // Offset in the Power Management Base Address to the ACPI Timer
  29 //
  30 #define ACPI_TIMER_OFFSET      0x8
  31
  32 /**
  33   The constructor function enables ACPI IO space.
  34
  35   If ACPI I/O space not enabled, this function will enable it.
  36   It will always return RETURN_SUCCESS.
  37
  38   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  39
  40 **/
  41 RETURN_STATUS
  42 EFIAPI
  43 AcpiTimerLibConstructor (
  44   VOID
  45   )
  46 {
  47   UINT16 HostBridgeDevId;
  48   UINTN Pmba;
  49   UINTN AcpiCtlReg;
  50   UINT8 AcpiEnBit;
  51
  52   //
  53   // Query Host Bridge DID to determine platform type
  54   //
  55   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  56   switch (HostBridgeDevId) {
  57     case INTEL_82441_DEVICE_ID:
  58       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
  59       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
  60       AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
  61       break;
  62     case INTEL_Q35_MCH_DEVICE_ID:
  63       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
  64       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
  65       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
  66       break;
  67     default:
  68       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  69         __FUNCTION__, HostBridgeDevId));
  70       ASSERT (FALSE);
  71       return RETURN_UNSUPPORTED;
  72   }
  73
  74   //
  75   // Check to see if the Power Management Base Address is already enabled
  76   //
  77   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
  78     //
  79     // If the Power Management Base Address is not programmed,
  80     // then program the Power Management Base Address from a PCD.
  81     //
  82     PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
  83
  84     //
  85     // Enable PMBA I/O port decodes
  86     //
  87     PciOr8 (AcpiCtlReg, AcpiEnBit);
  88   }
  89
  90   return RETURN_SUCCESS;
  91 }
  92
  93 /**
  94   Internal function to read the current tick counter of ACPI.
  95
  96   Dynamically compute the address of the ACPI tick counter based on the
  97   properties of the underlying platform, to avoid relying on global variables.
  98
  99   @return The tick counter read.
 100
 101 **/
 102 UINT32
 103 InternalAcpiGetTimerTick (
 104   VOID
 105   )
 106 {
 107   UINT16 HostBridgeDevId;
 108   UINTN Pmba;
 109
 110   //
 111   // Query Host Bridge DID to determine platform type
 112   //
 113   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
 114   switch (HostBridgeDevId) {
 115     case INTEL_82441_DEVICE_ID:
 116       Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
 117       break;
 118     case INTEL_Q35_MCH_DEVICE_ID:
 119       Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
 120       break;
 121     default:
 122       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
 123         __FUNCTION__, HostBridgeDevId));
 124       ASSERT (FALSE);
 125       return 0;
 126   }
 127
 128   //
 129   //   Read PMBA to read and return the current ACPI timer value.
 130   //
 131   return IoRead32 ((PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
 132 }