OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for BaseRom instance of ACPI Timer Library
   3
   4   Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   SPDX-License-Identifier: BSD-2-Clause-Patent
   8 **/
   9
  10 #include <Library/DebugLib.h>
  11 #include <Library/IoLib.h>
  12 #include <Library/PciLib.h>
  13 #include <OvmfPlatforms.h>
  14
  15 /**
  16   The constructor function enables ACPI IO space.
  17
  18   If ACPI I/O space not enabled, this function will enable it.
  19   It will always return RETURN_SUCCESS.
  20
  21   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  22
  23 **/
  24 RETURN_STATUS
  25 EFIAPI
  26 AcpiTimerLibConstructor (
  27   VOID
  28   )
  29 {
  30   UINT16 HostBridgeDevId;
  31   UINTN Pmba;
  32   UINT32 PmbaAndVal;
  33   UINT32 PmbaOrVal;
  34   UINTN AcpiCtlReg;
  35   UINT8 AcpiEnBit;
  36
  37   //
  38   // Query Host Bridge DID to determine platform type
  39   //
  40   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  41   switch (HostBridgeDevId) {
  42     case INTEL_82441_DEVICE_ID:
  43       Pmba       = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
  44       PmbaAndVal = ~(UINT32)PIIX4_PMBA_MASK;
  45       PmbaOrVal  = PIIX4_PMBA_VALUE;
  46       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMREGMISC);
  47       AcpiEnBit  = PIIX4_PMREGMISC_PMIOSE;
  48       break;
  49     case INTEL_Q35_MCH_DEVICE_ID:
  50       Pmba       = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
  51       PmbaAndVal = ~(UINT32)ICH9_PMBASE_MASK;
  52       PmbaOrVal  = ICH9_PMBASE_VALUE;
  53       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (ICH9_ACPI_CNTL);
  54       AcpiEnBit  = ICH9_ACPI_CNTL_ACPI_EN;
  55       break;
  56     default:
  57       DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  58         __FUNCTION__, HostBridgeDevId));
  59       ASSERT (FALSE);
  60       return RETURN_UNSUPPORTED;
  61   }
  62
  63   //
  64   // Check to see if the Power Management Base Address is already enabled
  65   //
  66   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
  67     //
  68     // If the Power Management Base Address is not programmed,
  69     // then program it now.
  70     //
  71     PciAndThenOr32 (Pmba, PmbaAndVal, PmbaOrVal);
  72
  73     //
  74     // Enable PMBA I/O port decodes
  75     //
  76     PciOr8 (AcpiCtlReg, AcpiEnBit);
  77   }
  78
  79   return RETURN_SUCCESS;
  80 }
  81
  82 /**
  83   Internal function to read the current tick counter of ACPI.
  84
  85   Dynamically compute the address of the ACPI tick counter based on the
  86   properties of the underlying platform, to avoid relying on global variables.
  87
  88   @return The tick counter read.
  89
  90 **/
  91 UINT32
  92 InternalAcpiGetTimerTick (
  93   VOID
  94   )
  95 {
  96   UINT16 HostBridgeDevId;
  97   UINTN Pmba;
  98
  99   //
 100   // Query Host Bridge DID to determine platform type
 101   //
 102   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
 103   switch (HostBridgeDevId) {
 104     case INTEL_82441_DEVICE_ID:
 105       Pmba = POWER_MGMT_REGISTER_PIIX4 (PIIX4_PMBA);
 106       break;
 107     case INTEL_Q35_MCH_DEVICE_ID:
 108       Pmba = POWER_MGMT_REGISTER_Q35 (ICH9_PMBASE);
 109       break;
 110     default:
 111       DEBUG ((DEBUG_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
 112         __FUNCTION__, HostBridgeDevId));
 113       ASSERT (FALSE);
 114       return 0;
 115   }
 116
 117   //
 118   //   Read PMBA to read and return the current ACPI timer value.
 119   //
 120   return IoRead32 ((PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
 121 }