OvmfPkg/Library/AcpiTimerLib/BaseRomAcpiTimerLib.c

   1 /** @file
   2   Provide constructor and GetTick for BaseRom instance of ACPI Timer Library
   3
   4   Copyright (c) 2008 - 2012, Intel Corporation. All rights reserved.
   5   Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>
   6
   7   This program and the accompanying materials are licensed and made
   8   available under the terms and conditions of the BSD License which
   9   accompanies this distribution.   The full text of the license may
  10   be found at http://opensource.org/licenses/bsd-license.php
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 **/
  15
  16 #include <Library/DebugLib.h>
  17 #include <Library/IoLib.h>
  18 #include <Library/PciLib.h>
  19 #include <Library/PcdLib.h>
  20 #include <OvmfPlatforms.h>
  21
  22 //
  23 // Power Management PCI Configuration Register fields
  24 //
  25 #define PMBA_RTE      BIT0
  26 #define PIIX4_PMIOSE  BIT0
  27 #define Q35_ACPI_EN   BIT7
  28
  29 //
  30 // Offset in the Power Management Base Address to the ACPI Timer
  31 //
  32 #define ACPI_TIMER_OFFSET      0x8
  33
  34 /**
  35   The constructor function enables ACPI IO space.
  36
  37   If ACPI I/O space not enabled, this function will enable it.
  38   It will always return RETURN_SUCCESS.
  39
  40   @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.
  41
  42 **/
  43 RETURN_STATUS
  44 EFIAPI
  45 AcpiTimerLibConstructor (
  46   VOID
  47   )
  48 {
  49   UINT16 HostBridgeDevId;
  50   UINTN Pmba;
  51   UINTN AcpiCtlReg;
  52   UINT8 AcpiEnBit;
  53
  54   //
  55   // Query Host Bridge DID to determine platform type
  56   //
  57   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
  58   switch (HostBridgeDevId) {
  59     case INTEL_82441_DEVICE_ID:
  60       Pmba       = POWER_MGMT_REGISTER_PIIX4 (0x40);
  61       AcpiCtlReg = POWER_MGMT_REGISTER_PIIX4 (0x80); // PMREGMISC
  62       AcpiEnBit  = PIIX4_PMIOSE;
  63       break;
  64     case INTEL_Q35_MCH_DEVICE_ID:
  65       Pmba       = POWER_MGMT_REGISTER_Q35 (0x40);
  66       AcpiCtlReg = POWER_MGMT_REGISTER_Q35 (0x44); // ACPI_CNTL
  67       AcpiEnBit  = Q35_ACPI_EN;
  68       break;
  69     default:
  70       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
  71         __FUNCTION__, HostBridgeDevId));
  72       ASSERT (FALSE);
  73       return RETURN_UNSUPPORTED;
  74   }
  75
  76   //
  77   // Check to see if the Power Management Base Address is already enabled
  78   //
  79   if ((PciRead8 (AcpiCtlReg) & AcpiEnBit) == 0) {
  80     //
  81     // If the Power Management Base Address is not programmed,
  82     // then program the Power Management Base Address from a PCD.
  83     //
  84     PciAndThenOr32 (Pmba, (UINT32) ~0xFFC0, PcdGet16 (PcdAcpiPmBaseAddress));
  85
  86     //
  87     // Enable PMBA I/O port decodes
  88     //
  89     PciOr8 (AcpiCtlReg, AcpiEnBit);
  90   }
  91
  92   return RETURN_SUCCESS;
  93 }
  94
  95 /**
  96   Internal function to read the current tick counter of ACPI.
  97
  98   Dynamically compute the address of the ACPI tick counter based on the
  99   properties of the underlying platform, to avoid relying on global variables.
 100
 101   @return The tick counter read.
 102
 103 **/
 104 UINT32
 105 InternalAcpiGetTimerTick (
 106   VOID
 107   )
 108 {
 109   UINT16 HostBridgeDevId;
 110   UINTN Pmba;
 111
 112   //
 113   // Query Host Bridge DID to determine platform type
 114   //
 115   HostBridgeDevId = PciRead16 (OVMF_HOSTBRIDGE_DID);
 116   switch (HostBridgeDevId) {
 117     case INTEL_82441_DEVICE_ID:
 118       Pmba = POWER_MGMT_REGISTER_PIIX4 (0x40);
 119       break;
 120     case INTEL_Q35_MCH_DEVICE_ID:
 121       Pmba = POWER_MGMT_REGISTER_Q35 (0x40);
 122       break;
 123     default:
 124       DEBUG ((EFI_D_ERROR, "%a: Unknown Host Bridge Device ID: 0x%04x\n",
 125         __FUNCTION__, HostBridgeDevId));
 126       ASSERT (FALSE);
 127       return 0;
 128   }
 129
 130   //
 131   //   Read PMBA to read and return the current ACPI timer value.
 132   //
 133   return IoRead32 ((PciRead32 (Pmba) & ~PMBA_RTE) + ACPI_TIMER_OFFSET);
 134 }