OvmfPkg/QemuVideoDxe/Initialize.c

   1 /** @file
   2   Graphics Output Protocol functions for the QEMU video controller.
   3
   4   Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
   5
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution. The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #include "Qemu.h"
  17
  18
  19 ///
  20 /// Generic Attribute Controller Register Settings
  21 ///
  22 UINT8  AttributeController[21] = {
  23   0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
  24   0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
  25   0x41, 0x00, 0x0F, 0x00, 0x00
  26 };
  27
  28 ///
  29 /// Generic Graphics Controller Register Settings
  30 ///
  31 UINT8 GraphicsController[9] = {
  32   0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0F, 0xFF
  33 };
  34
  35 //
  36 // 640 x 480 x 256 color @ 60 Hertz
  37 //
  38 UINT8 Crtc_640_480_256_60[28] = {
  39   0x5d, 0x4f, 0x50, 0x82, 0x53, 0x9f, 0x00, 0x3e,
  40   0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  41   0xe1, 0x83, 0xdf, 0x50, 0x00, 0xe7, 0x04, 0xe3,
  42   0xff, 0x00, 0x00, 0x22
  43 };
  44
  45 UINT8 Crtc_640_480_32bpp_60[28] = {
  46   0x5d, 0x4f, 0x50, 0x82, 0x53, 0x9f, 0x00, 0x3e,
  47   0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  48   0xe1, 0x83, 0xdf, 0x40, 0x00, 0xe7, 0x04, 0xe3,
  49   0xff, 0x00, 0x00, 0x32
  50 };
  51
  52 UINT16 Seq_640_480_256_60[15] = {
  53   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,
  54   0x5b0c, 0x450d, 0x7e0e, 0x2b1b, 0x2f1c, 0x301d, 0x331e
  55 };
  56
  57 UINT16 Seq_640_480_32bpp_60[15] = {
  58   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,
  59   0x5b0c, 0x450d, 0x7e0e, 0x2b1b, 0x2f1c, 0x301d, 0x331e
  60 };
  61
  62 //
  63 // 800 x 600 x 256 color @ 60 Hertz
  64 //
  65 UINT8 Crtc_800_600_256_60[28] = {
  66   0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,
  67   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  68   0x58, 0x8C, 0x57, 0x64, 0x00, 0x5F, 0x91, 0xE3,
  69   0xFF, 0x00, 0x00, 0x22
  70 };
  71
  72 UINT8 Crtc_800_600_32bpp_60[28] = {
  73   0x7F, 0x63, 0x64, 0x80, 0x6B, 0x1B, 0x72, 0xF0,
  74   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  75   0x58, 0x8C, 0x57, 0x90, 0x00, 0x5F, 0x91, 0xE3,
  76   0xFF, 0x00, 0x00, 0x32
  77 };
  78
  79 UINT16 Seq_800_600_256_60[15] = {
  80   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,
  81   0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e
  82 };
  83
  84 UINT16 Seq_800_600_32bpp_60[15] = {
  85   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,
  86   0x5b0c, 0x450d, 0x510e, 0x2b1b, 0x2f1c, 0x301d, 0x3a1e
  87 };
  88
  89 UINT8 Crtc_960_720_32bpp_60[28] = {
  90   0xA3, 0x77, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,
  91   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  92   0x02, 0x88, 0xCF, 0xe0, 0x00, 0x00, 0x64, 0xE3,
  93   0xFF, 0x4A, 0x00, 0x32
  94 };
  95
  96 UINT16 Seq_960_720_32bpp_60[15] = {
  97   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,
  98   0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e
  99 };
 100
 101 //
 102 // 1024 x 768 x 256 color @ 60 Hertz
 103 //
 104 UINT8 Crtc_1024_768_256_60[28] = {
 105   0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,
 106   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 107   0x02, 0x88, 0xFF, 0x80, 0x00, 0x00, 0x24, 0xE3,
 108   0xFF, 0x4A, 0x00, 0x22
 109 };
 110
 111 UINT16 Seq_1024_768_256_60[15] = {
 112   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1107, 0x0008, 0x4a0b,
 113   0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e
 114 };
 115
 116 //
 117 // 1024 x 768 x 24-bit color @ 60 Hertz
 118 //
 119 UINT8 Crtc_1024_768_24bpp_60[28] = {
 120   0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,
 121   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 122   0x02, 0x88, 0xFF, 0x80, 0x00, 0x00, 0x24, 0xE3,
 123   0xFF, 0x4A, 0x00, 0x32
 124 };
 125
 126 UINT16 Seq_1024_768_24bpp_60[15] = {
 127   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1507, 0x0008, 0x4a0b,
 128   0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e
 129 };
 130
 131 UINT8 Crtc_1024_768_32bpp_60[28] = {
 132   0xA3, 0x7F, 0x80, 0x86, 0x85, 0x96, 0x24, 0xFD,
 133   0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 134   0x02, 0x88, 0xFF, 0xe0, 0x00, 0x00, 0x64, 0xE3,
 135   0xFF, 0x4A, 0x00, 0x32
 136 };
 137
 138 UINT16 Seq_1024_768_32bpp_60[15] = {
 139   0x0100, 0x0101, 0x0f02, 0x0003, 0x0e04, 0x1907, 0x0008, 0x4a0b,
 140   0x5b0c, 0x450d, 0x760e, 0x2b1b, 0x2f1c, 0x301d, 0x341e
 141 };
 142
 143 ///
 144 /// Table of supported video modes
 145 ///
 146 QEMU_VIDEO_CIRRUS_MODES  QemuVideoCirrusModes[] = {
 147 //  {  640, 480, 8, 60, Crtc_640_480_256_60,  Seq_640_480_256_60,  0xe3 },
 148 //  {  800, 600, 8, 60, Crtc_800_600_256_60,  Seq_800_600_256_60,  0xef },
 149   {  640, 480, 32, 60, Crtc_640_480_32bpp_60,  Seq_640_480_32bpp_60,  0xef },
 150   {  800, 600, 32, 60, Crtc_800_600_32bpp_60,  Seq_800_600_32bpp_60,  0xef },
 151 //  { 1024, 768, 8, 60, Crtc_1024_768_256_60, Seq_1024_768_256_60, 0xef }
 152   { 1024, 768, 24, 60, Crtc_1024_768_24bpp_60, Seq_1024_768_24bpp_60, 0xef }
 153 //  { 1024, 768, 32, 60, Crtc_1024_768_32bpp_60, Seq_1024_768_32bpp_60, 0xef }
 154 //  { 960, 720, 32, 60, Crtc_960_720_32bpp_60, Seq_1024_768_32bpp_60, 0xef }
 155 };
 156
 157 #define QEMU_VIDEO_CIRRUS_MODE_COUNT \
 158   (sizeof (QemuVideoCirrusModes) / sizeof (QemuVideoCirrusModes[0]))
 159
 160 /**
 161   Construct the valid video modes for QemuVideo.
 162
 163 **/
 164 EFI_STATUS
 165 QemuVideoCirrusModeSetup (
 166   QEMU_VIDEO_PRIVATE_DATA  *Private
 167   )
 168 {
 169   UINT32                                 Index;
 170   QEMU_VIDEO_MODE_DATA                   *ModeData;
 171   QEMU_VIDEO_CIRRUS_MODES                *VideoMode;
 172
 173   //
 174   // Setup Video Modes
 175   //
 176   Private->ModeData = AllocatePool (
 177                         sizeof (Private->ModeData[0]) * QEMU_VIDEO_CIRRUS_MODE_COUNT
 178                         );
 179   ModeData = Private->ModeData;
 180   VideoMode = &QemuVideoCirrusModes[0];
 181   for (Index = 0; Index < QEMU_VIDEO_CIRRUS_MODE_COUNT; Index ++) {
 182     ModeData->ModeNumber = Index;
 183     ModeData->HorizontalResolution          = VideoMode->Width;
 184     ModeData->VerticalResolution            = VideoMode->Height;
 185     ModeData->ColorDepth                    = VideoMode->ColorDepth;
 186     ModeData->RefreshRate                   = VideoMode->RefreshRate;
 187     DEBUG ((EFI_D_INFO,
 188       "Adding Cirrus Video Mode %d: %dx%d, %d-bit, %d Hz\n",
 189       ModeData->ModeNumber,
 190       ModeData->HorizontalResolution,
 191       ModeData->VerticalResolution,
 192       ModeData->ColorDepth,
 193       ModeData->RefreshRate
 194       ));
 195
 196     ModeData ++ ;
 197     VideoMode ++;
 198   }
 199   Private->MaxMode = QEMU_VIDEO_CIRRUS_MODE_COUNT;
 200
 201   return EFI_SUCCESS;
 202 }
 203
 204 ///
 205 /// Table of supported video modes
 206 ///
 207 QEMU_VIDEO_BOCHS_MODES  QemuVideoBochsModes[] = {
 208   {  640, 480, 32 },
 209   {  800, 600, 32 },
 210   { 1024, 768, 24 },
 211 };
 212
 213 #define QEMU_VIDEO_BOCHS_MODE_COUNT \
 214   (sizeof (QemuVideoBochsModes) / sizeof (QemuVideoBochsModes[0]))
 215
 216 EFI_STATUS
 217 QemuVideoBochsModeSetup (
 218   QEMU_VIDEO_PRIVATE_DATA  *Private
 219   )
 220 {
 221   UINT32                                 Index;
 222   QEMU_VIDEO_MODE_DATA                   *ModeData;
 223   QEMU_VIDEO_BOCHS_MODES                 *VideoMode;
 224
 225   //
 226   // Setup Video Modes
 227   //
 228   Private->ModeData = AllocatePool (
 229                         sizeof (Private->ModeData[0]) * QEMU_VIDEO_BOCHS_MODE_COUNT
 230                         );
 231   ModeData = Private->ModeData;
 232   VideoMode = &QemuVideoBochsModes[0];
 233   for (Index = 0; Index < QEMU_VIDEO_BOCHS_MODE_COUNT; Index ++) {
 234     ModeData->ModeNumber = Index;
 235     ModeData->HorizontalResolution          = VideoMode->Width;
 236     ModeData->VerticalResolution            = VideoMode->Height;
 237     ModeData->ColorDepth                    = VideoMode->ColorDepth;
 238     ModeData->RefreshRate                   = 60;
 239     DEBUG ((EFI_D_INFO,
 240       "Adding Bochs Video Mode %d: %dx%d, %d-bit, %d Hz\n",
 241       ModeData->ModeNumber,
 242       ModeData->HorizontalResolution,
 243       ModeData->VerticalResolution,
 244       ModeData->ColorDepth,
 245       ModeData->RefreshRate
 246       ));
 247
 248     ModeData ++ ;
 249     VideoMode ++;
 250   }
 251   Private->MaxMode = QEMU_VIDEO_BOCHS_MODE_COUNT;
 252
 253   return EFI_SUCCESS;
 254 }
 255