QuarkPlatformPkg/Quark.fdf

   1 ## @file
   2 # FDF file of Clanton Peak CRB platform with 32-bit DXE
   3 #
   4 # This package provides QuarkNcSocId platform specific modules.
   5 # Copyright (c) 2013 - 2018 Intel Corporation.
   6 #
   7 # SPDX-License-Identifier: BSD-2-Clause-Patent
   8 #
   9 ##
  10
  11 ################################################################################
  12 #
  13 # Defines Section - statements that will be processed to create a Makefile.
  14 #
  15 ################################################################################
  16 [Defines]
  17 #                  Address 0x100000000 (4 GB reset address)
  18 #                                 Base                               Size
  19 #                                      +---------------------------+
  20 #                           FLASH_BASE | FD.Quark:                 | 0x800000 (8 MB)
  21 #                           0xFF800000 | BaseAddress               |
  22 #                                      +---------------------------+
  23 #
  24 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.
  25 # 0xFF800000 + 0x400000 = 0xFFC00000.
  26 #
  27 #                          Address 0x0 (0xFF800000 for 8 MB SPI part)
  28 #                                      +---------------------------+
  29 #                FLASH_FV_PAYLOAD_BASE | Payload Image             | FLASH_FV_PAYLOAD_SIZE
  30 #                           0x00400000 |                           | 0x00100000
  31 #                                      +---------------------------+
  32 #                   FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE
  33 #                           0x00500000 |                           | 0x001E0000
  34 #                                      +---------------------------+
  35 #                      NVRAM_AREA_BASE | NVRAM Area=               | NVRAM_AREA_SIZE
  36 #                           0x006E0000 | Variable + FTW Working +  |
  37 #                                      | FTW Spare                 |
  38 #                                      +---+-------------------+---+
  39 #                 NVRAM_AREA_VARIABLE_BASE |                   | NVRAM_AREA_VARIABLE_SIZE
  40 #                                          |                   |
  41 #                                          +-------------------+
  42 #                         FTW_WORKING_BASE |                   | FTW_WORKING_SIZE
  43 #                                          |                   |
  44 #                                          +-------------------+
  45 #                           FTW_SPARE_BASE |                   | FTW_SPARE_SIZE
  46 #                                          |                   |
  47 #                                      +---+-------------------+---+
  48 #                      RMU_BINARY_BASE | RMU Binary                | RMU_BINARY_SIZE
  49 #                           0x00700000 |                           | 0x00008000
  50 #                                      +---------------------------+
  51 #                   PLATFORM_DATA_BASE | PlatformData Binary       | PLATFORM_DATA_SIZE
  52 #                           0x00710000 |                           | 0x00001000
  53 #                                      +---------------------------+
  54 #                FVRECOVERY_IMAGE_BASE | FVRECOVERY Image          | FVRECOVERY_IMAGE_SIZE
  55 #                             0x720000 |                           | 0x000E0000
  56 #                                      +---------------------------+
  57
  58   #
  59   # Define value used to compute FLASH regions below reset vector location just below 4GB
  60   #
  61   DEFINE RESET_ADDRESS                           = 0x100000000       # 4 GB
  62
  63   #
  64   # Set size of FLASH to 8MB
  65   #
  66   DEFINE FLASH_SIZE                              = 0x800000
  67   DEFINE FLASH_BASE                              = $(RESET_ADDRESS) - $(FLASH_SIZE)                                                      # The base address of the Flash Device
  68
  69   #
  70   # Set FLASH block size to 4KB
  71   #
  72   DEFINE FLASH_BLOCKSIZE                         = 0x1000            # 4 KB
  73
  74   #
  75   # Misc settings
  76   #
  77   DEFINE FLASH_BLOCKSIZE_DATA                    = 0x00, 0x10, 0x00, 0x00                                                                # equivalent for DATA blocks
  78
  79   #
  80   # Start PAYLOAD at 4MB into 8MB FLASH
  81   #
  82   DEFINE FLASH_FV_PAYLOAD_BASE                   = 0x00400000
  83   DEFINE FLASH_FV_PAYLOAD_SIZE                   = 0x00100000
  84
  85   #
  86   # Put FVMAIN between PAYLOAD and RMU Binary
  87   #
  88   DEFINE FLASH_FV_MAIN_BASE                      = 0x00500000
  89   DEFINE FLASH_FV_MAIN_SIZE                      = 0x001E0000
  90
  91   #
  92   # Place NV Storage just above Platform Data Base
  93   #
  94   DEFINE NVRAM_AREA_VARIABLE_BASE                = 0x006E0000
  95   DEFINE NVRAM_AREA_SIZE                         = 0x00020000
  96
  97   DEFINE NVRAM_AREA_VARIABLE_SIZE                = 0x0000E000
  98   DEFINE FTW_WORKING_BASE                        = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)
  99   DEFINE FTW_WORKING_SIZE                        = 0x00002000
 100   DEFINE FTW_SPARE_BASE                          = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)
 101   DEFINE FTW_SPARE_SIZE                          = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)
 102
 103   #
 104   # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)
 105   #
 106   DEFINE RMU_BINARY_BASE                         = 0x00700000  # HW fixed address
 107   DEFINE RMU_BINARY_SIZE                         = 0x00008000  # HW fixed address, so fixed size
 108
 109   #
 110   # Platform Data Base must be 64KB above RMU
 111   #
 112   DEFINE VPD_BASE                                = 0x00708000
 113   DEFINE VPD_SIZE                                = 0x00001000
 114
 115   #
 116   # Place FV Recovery above NV Storage
 117   #
 118   DEFINE FVRECOVERY_IMAGE_SIZE                   = 0x000F0000
 119   DEFINE FVRECOVERY_IMAGE_BASE                   = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)
 120
 121 ################################################################################
 122 #
 123 # FD Section
 124 # The [FD] Section is made up of the definition statements and a
 125 # description of what goes into  the Flash Device Image.  Each FD section
 126 # defines one flash "device" image.  A flash device image may be one of
 127 # the following: Removable media bootable image (like a boot floppy
 128 # image,) an Option ROM image (that would be "flashed" into an add-in
 129 # card,) a System "Flash"  image (that would be burned into a system's
 130 # flash) or an Update ("Capsule") image that will be used to update and
 131 # existing system flash.
 132 #
 133 ################################################################################
 134 [FD.Quark]
 135 BaseAddress   = 0xFF800000                   #The base address of the Flash Device; set to same value as FLASH_BASE.
 136 Size          = 0x800000                     #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.
 137 ErasePolarity = 1
 138 BlockSize     = $(FLASH_BLOCKSIZE)
 139 NumBlocks     = 0x800                        #The number of blocks for the Flash Device.
 140
 141 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)
 142 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize        = $(FLASH_SIZE)
 143
 144 ################################################################################
 145 #
 146 # Following are lists of FD Region layout which correspond to the locations of different
 147 # images within the flash device.
 148 #
 149 # Regions must be defined in ascending order and may not overlap.
 150 #
 151 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
 152 # the pipe "|" character, followed by the size of the region, also in hex with the leading
 153 # "0x" characters. Like:
 154 # Offset|Size
 155 # PcdOffsetCName|PcdSizeCName
 156 # RegionType <FV, DATA, or FILE>
 157 #
 158 ################################################################################
 159
 160 ########################################################
 161 # Quark Payload Image
 162 ########################################################
 163 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)
 164 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize
 165 FV = PAYLOAD
 166
 167 ########################################################
 168 # Quark FVMAIN Image (Compressed)
 169 ########################################################
 170 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)
 171 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize
 172 FV = FVMAIN_COMPACT
 173
 174 #############################################################################
 175 # Quark NVRAM Area
 176 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare
 177 #############################################################################
 178 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)
 179 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
 180 #NV_VARIABLE_STORE
 181 DATA = {
 182   ## This is the EFI_FIRMWARE_VOLUME_HEADER
 183   # ZeroVector []
 184   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 185   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 186   # FileSystemGuid: gEfiSystemNvDataFvGuid         =
 187   #  { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
 188   0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
 189   0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
 190   # FvLength: 0x20000
 191   0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
 192   #Signature "_FVH"       #Attributes
 193   0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
 194   #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
 195   0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,
 196   #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block
 197   0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),
 198   #Blockmap[1]: End
 199   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 200   ## This is the VARIABLE_STORE_HEADER
 201   !if $(SECURE_BOOT_ENABLE)
 202     # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }
 203     0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
 204     0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
 205   !else
 206     #  Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
 207     0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
 208     0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
 209   !endif
 210   #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8
 211   # This can speed up the Variable Dispatch a bit.
 212   0xB8, 0xDF, 0x00, 0x00,
 213   #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
 214   0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 215 }
 216
 217 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)
 218 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
 219 #NV_FTW_WORKING
 220 DATA = {
 221   # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid         =
 222   #  { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
 223   0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,
 224   0xa0, 0xce, 0x65,  0x0, 0xfd, 0x9f, 0x1b, 0x95,
 225   # Crc:UINT32            #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
 226   0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,
 227   # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
 228   0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
 229 }
 230
 231 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)
 232 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
 233 #NV_FTW_SPARE
 234
 235 #########################################################
 236 # Quark Remote Management Unit Binary
 237 #########################################################
 238 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)
 239 INF  QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf
 240
 241 #########################################################
 242 # PlatformData Binary, default for standalone is none built-in so user selects.
 243 #########################################################
 244 $(VPD_BASE)|$(VPD_SIZE)
 245 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress
 246 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin
 247
 248 #######################
 249 # Quark FVRECOVERY Image
 250 #######################
 251 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)
 252 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize
 253 FV = FVRECOVERY
 254
 255 ################################################################################
 256 #
 257 # FV Section
 258 #
 259 # [FV] section is used to define what components or modules are placed within a flash
 260 # device file.  This section also defines order the components and modules are positioned
 261 # within the image.  The [FV] section consists of define statements, set statements and
 262 # module statements.
 263 #
 264 ################################################################################
 265 [FV.FVRECOVERY]
 266 BlockSize          = $(FLASH_BLOCKSIZE)
 267 FvAlignment        = 16         #FV alignment and FV attributes setting.
 268 ERASE_POLARITY     = 1
 269 MEMORY_MAPPED      = TRUE
 270 STICKY_WRITE       = TRUE
 271 LOCK_CAP           = TRUE
 272 LOCK_STATUS        = TRUE
 273 WRITE_DISABLED_CAP = TRUE
 274 WRITE_ENABLED_CAP  = TRUE
 275 WRITE_STATUS       = TRUE
 276 WRITE_LOCK_CAP     = TRUE
 277 WRITE_LOCK_STATUS  = TRUE
 278 READ_DISABLED_CAP  = TRUE
 279 READ_ENABLED_CAP   = TRUE
 280 READ_STATUS        = TRUE
 281 READ_LOCK_CAP      = TRUE
 282 READ_LOCK_STATUS   = TRUE
 283 FvNameGuid         = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8
 284
 285 ################################################################################
 286 #
 287 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.
 288 # Parsing tools will scan the INF file to determine the type of component or module.
 289 # The component or module type is used to reference the standard rules
 290 # defined elsewhere in the FDF file.
 291 #
 292 # The format for INF statements is:
 293 # INF $(PathAndInfFileName)
 294 #
 295 ################################################################################
 296
 297 ##
 298 #  PEI Apriori file example, more PEIM module added later.
 299 ##
 300 APRIORI PEI {
 301   INF  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 302   # PlatformConfigPei should be immediately after Pcd driver.
 303   INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
 304   INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
 305   INF  MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
 306   INF  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
 307 }
 308
 309 ##
 310 #  SEC Phase modules
 311 ##
 312 INF  UefiCpuPkg/SecCore/SecCore.inf
 313
 314 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
 315   # FMP image decriptor
 316 INF RuleOverride = FMP_IMAGE_DESC QuarkPlatformPkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
 317 !endif
 318
 319 INF  MdeModulePkg/Core/Pei/PeiMain.inf
 320
 321 ##
 322 #  PEI Phase RAW Data files.
 323 ##
 324 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {
 325   SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
 326 }
 327
 328 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/PCD/Pei/Pcd.inf
 329 INF  QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf
 330 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
 331 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf
 332 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
 333 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
 334 INF  RuleOverride = NORELOC  UefiCpuPkg/CpuMpPei/CpuMpPei.inf
 335 INF  RuleOverride = NORELOC  MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
 336 INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf
 337 INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf
 338 INF  RuleOverride = NORELOC  QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf
 339 INF  QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf
 340 INF  MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf
 341 INF  MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
 342 INF  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
 343 INF  UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
 344 !if $(MEASURED_BOOT_ENABLE)
 345 INF  SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
 346 INF  SecurityPkg/Tcg/TcgPei/TcgPei.inf
 347 !endif
 348
 349 !if $(RECOVERY_ENABLE)
 350 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
 351   SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
 352   SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID
 353     SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
 354   }
 355 }
 356 !endif
 357
 358 !if $(RECOVERY_ENABLE)
 359
 360 ################################################################################
 361 #
 362 # FV Section
 363 #
 364 # [FV] section is used to define what components or modules are placed within a flash
 365 # device file.  This section also defines order the components and modules are positioned
 366 # within the image.  The [FV] section consists of define statements, set statements and
 367 # module statements.
 368 #
 369 ################################################################################
 370 [FV.FVRECOVERY_COMPONENTS]
 371 BlockSize          = $(FLASH_BLOCKSIZE)
 372 FvAlignment        = 16         #FV alignment and FV attributes setting.
 373 ERASE_POLARITY     = 1
 374 MEMORY_MAPPED      = TRUE
 375 STICKY_WRITE       = TRUE
 376 LOCK_CAP           = TRUE
 377 LOCK_STATUS        = TRUE
 378 WRITE_DISABLED_CAP = TRUE
 379 WRITE_ENABLED_CAP  = TRUE
 380 WRITE_STATUS       = TRUE
 381 WRITE_LOCK_CAP     = TRUE
 382 WRITE_LOCK_STATUS  = TRUE
 383 READ_DISABLED_CAP  = TRUE
 384 READ_ENABLED_CAP   = TRUE
 385 READ_STATUS        = TRUE
 386 READ_LOCK_CAP      = TRUE
 387 READ_LOCK_STATUS   = TRUE
 388
 389 INF  QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf
 390 INF  MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
 391 INF  QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf
 392 INF  MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
 393 INF  MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
 394 INF  FatPkg/FatPei/FatPei.inf
 395 INF  MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
 396 INF  SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
 397
 398 !endif
 399
 400 ################################################################################
 401 #
 402 # FV Section
 403 #
 404 # [FV] section is used to define what components or modules are placed within a flash
 405 # device file.  This section also defines order the components and modules are positioned
 406 # within the image.  The [FV] section consists of define statements, set statements and
 407 # module statements.
 408 #
 409 ################################################################################
 410 [FV.FVMAIN]
 411 BlockSize          = $(FLASH_BLOCKSIZE)
 412 FvAlignment        = 16
 413 ERASE_POLARITY     = 1
 414 MEMORY_MAPPED      = TRUE
 415 STICKY_WRITE       = TRUE
 416 LOCK_CAP           = TRUE
 417 LOCK_STATUS        = TRUE
 418 WRITE_DISABLED_CAP = TRUE
 419 WRITE_ENABLED_CAP  = TRUE
 420 WRITE_STATUS       = TRUE
 421 WRITE_LOCK_CAP     = TRUE
 422 WRITE_LOCK_STATUS  = TRUE
 423 READ_DISABLED_CAP  = TRUE
 424 READ_ENABLED_CAP   = TRUE
 425 READ_STATUS        = TRUE
 426 READ_LOCK_CAP      = TRUE
 427 READ_LOCK_STATUS   = TRUE
 428 FvNameGuid         = 30D9ED01-38D2-418a-90D5-C561750BF80F
 429
 430 ##
 431 #  DXE Phase modules
 432 ##
 433 INF  MdeModulePkg/Core/Dxe/DxeMain.inf
 434 INF  MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
 435
 436 !if $(SOURCE_DEBUG_ENABLE)
 437   INF  SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf
 438 !endif
 439
 440 #
 441 # Early SoC / Platform modules
 442 #
 443 INF  QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf
 444
 445 ##
 446 #  EDK Core modules
 447 ##
 448 INF  UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
 449 INF  MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
 450 INF  MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
 451 INF  MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
 452 INF  MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf
 453 INF  MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf
 454
 455 INF  MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
 456 INF  UefiCpuPkg/CpuDxe/CpuDxe.inf
 457 INF  MdeModulePkg/Universal/Metronome/Metronome.inf
 458 INF  MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
 459 INF  MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
 460 INF  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
 461 !if $(SECURE_BOOT_ENABLE)
 462   INF  SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
 463 !endif
 464 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
 465 INF  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
 466 INF  MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
 467 INF  MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
 468 INF  MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf
 469 INF  PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
 470 INF  MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
 471 INF  MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
 472
 473 #
 474 # Platform
 475 #
 476 INF  MdeModulePkg/Universal/BdsDxe/BdsDxe.inf
 477 INF  MdeModulePkg/Application/UiApp/UiApp.inf
 478
 479 INF  QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf
 480 INF  QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf
 481 INF  QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf
 482 INF  QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf
 483 INF  PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
 484 INF  QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf
 485 INF  QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf
 486 INF  QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf
 487 INF  QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf
 488 INF  QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf
 489
 490 #
 491 # ACPI
 492 #
 493 INF  QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf
 494 INF  MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf
 495 #INF  MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
 496 INF  QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
 497 INF  MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf
 498 INF  IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
 499 INF  QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf
 500 INF  RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf
 501
 502 #
 503 # SMM
 504 #
 505 INF  MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
 506 INF  MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
 507 INF  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
 508 INF  UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
 509 INF  QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf
 510 INF  QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf
 511 INF  QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf
 512 INF  QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf
 513 INF  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
 514 INF  UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
 515
 516 #
 517 # SMBIOS
 518 #
 519 INF   MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
 520 INF  QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf
 521 INF  QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf
 522
 523 #
 524 # PCI
 525 #
 526 INF  QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf
 527 INF  MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
 528 INF  QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf
 529 !if $(SOURCE_DEBUG_ENABLE)
 530 !else
 531 INF  MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf
 532 !endif
 533
 534 #
 535 # USB
 536 #
 537 !if $(PERFORMANCE_ENABLE)
 538 !else
 539 INF  MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
 540 INF  QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf
 541 INF  MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
 542 INF  MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
 543 INF  MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
 544 INF  MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
 545 !endif
 546
 547 #
 548 # SDIO
 549 #
 550 !if $(PERFORMANCE_ENABLE)
 551 !else
 552 INF  QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf
 553 INF  QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf
 554 !endif
 555
 556 #
 557 # Console
 558 #
 559 INF  MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
 560 INF  MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
 561 INF  MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
 562
 563 INF  MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
 564 INF  MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
 565 INF  MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
 566 INF  MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
 567
 568 #
 569 # File System Modules
 570 #
 571 !if $(PERFORMANCE_ENABLE)
 572 !else
 573 INF  MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
 574 INF  MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
 575 INF  FatPkg/EnhancedFatDxe/Fat.inf
 576 !endif
 577
 578 #
 579 # Performance Application
 580 #
 581 !if $(PERFORMANCE_ENABLE)
 582 INF  ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
 583 !endif
 584
 585 #
 586 # Trusted Platform Module
 587 #
 588 !if $(MEASURED_BOOT_ENABLE)
 589 INF  SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
 590 INF  SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
 591 INF  RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
 592 !endif
 593
 594 !if $(CAPSULE_ENABLE)
 595 INF  MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
 596 INF  SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
 597 !endif
 598
 599 !if $(RECOVERY_ENABLE)
 600 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
 601      SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
 602      SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
 603      }
 604 !endif
 605
 606 !if $(CAPSULE_ENABLE)
 607 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {
 608      SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer
 609      SECTION UI = "Pkcs7TestRoot"
 610      }
 611 !endif
 612
 613 ################################################################################
 614 #
 615 # FV Section
 616 #
 617 # [FV] section is used to define what components or modules are placed within a flash
 618 # device file.  This section also defines order the components and modules are positioned
 619 # within the image.  The [FV] section consists of define statements, set statements and
 620 # module statements.
 621 #
 622 ################################################################################
 623 [FV.FVMAIN_COMPACT]
 624 FvAlignment        = 16
 625 ERASE_POLARITY     = 1
 626 MEMORY_MAPPED      = TRUE
 627 STICKY_WRITE       = TRUE
 628 LOCK_CAP           = TRUE
 629 LOCK_STATUS        = TRUE
 630 WRITE_DISABLED_CAP = TRUE
 631 WRITE_ENABLED_CAP  = TRUE
 632 WRITE_STATUS       = TRUE
 633 WRITE_LOCK_CAP     = TRUE
 634 WRITE_LOCK_STATUS  = TRUE
 635 READ_DISABLED_CAP  = TRUE
 636 READ_ENABLED_CAP   = TRUE
 637 READ_STATUS        = TRUE
 638 READ_LOCK_CAP      = TRUE
 639 READ_LOCK_STATUS   = TRUE
 640
 641 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
 642   SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 {    # TIANO COMPRESS GUID
 643     SECTION FV_IMAGE = FVMAIN
 644   }
 645 }
 646
 647 ################################################################################
 648 #
 649 # FV Section
 650 #
 651 # [FV] section is used to define what components or modules are placed within a flash
 652 # device file.  This section also defines order the components and modules are positioned
 653 # within the image.  The [FV] section consists of define statements, set statements and
 654 # module statements.
 655 #
 656 ################################################################################
 657 [FV.PAYLOAD]
 658 BlockSize          = $(FLASH_BLOCKSIZE)
 659 FvAlignment        = 16         #FV alignment and FV attributes setting.
 660 ERASE_POLARITY     = 1
 661 MEMORY_MAPPED      = TRUE
 662 STICKY_WRITE       = TRUE
 663 LOCK_CAP           = TRUE
 664 LOCK_STATUS        = TRUE
 665 WRITE_DISABLED_CAP = TRUE
 666 WRITE_ENABLED_CAP  = TRUE
 667 WRITE_STATUS       = TRUE
 668 WRITE_LOCK_CAP     = TRUE
 669 WRITE_LOCK_STATUS  = TRUE
 670 READ_DISABLED_CAP  = TRUE
 671 READ_ENABLED_CAP   = TRUE
 672 READ_STATUS        = TRUE
 673 READ_LOCK_CAP      = TRUE
 674 READ_LOCK_STATUS   = TRUE
 675
 676 #
 677 # Shell and Applications
 678 #
 679 INF  RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf
 680
 681 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
 682
 683 [FV.CapsuleDispatchFv]
 684 FvAlignment        = 16
 685 ERASE_POLARITY     = 1
 686 MEMORY_MAPPED      = TRUE
 687 STICKY_WRITE       = TRUE
 688 LOCK_CAP           = TRUE
 689 LOCK_STATUS        = TRUE
 690 WRITE_DISABLED_CAP = TRUE
 691 WRITE_ENABLED_CAP  = TRUE
 692 WRITE_STATUS       = TRUE
 693 WRITE_LOCK_CAP     = TRUE
 694 WRITE_LOCK_STATUS  = TRUE
 695 READ_DISABLED_CAP  = TRUE
 696 READ_ENABLED_CAP   = TRUE
 697 READ_STATUS        = TRUE
 698 READ_LOCK_CAP      = TRUE
 699 READ_LOCK_STATUS   = TRUE
 700
 701 !if $(CAPSULE_ENABLE)
 702 INF  SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
 703 !endif
 704
 705 [FV.SystemFirmwareUpdateCargo]
 706 FvAlignment        = 16
 707 ERASE_POLARITY     = 1
 708 MEMORY_MAPPED      = TRUE
 709 STICKY_WRITE       = TRUE
 710 LOCK_CAP           = TRUE
 711 LOCK_STATUS        = TRUE
 712 WRITE_DISABLED_CAP = TRUE
 713 WRITE_ENABLED_CAP  = TRUE
 714 WRITE_STATUS       = TRUE
 715 WRITE_LOCK_CAP     = TRUE
 716 WRITE_LOCK_STATUS  = TRUE
 717 READ_DISABLED_CAP  = TRUE
 718 READ_ENABLED_CAP   = TRUE
 719 READ_STATUS        = TRUE
 720 READ_LOCK_CAP      = TRUE
 721 READ_LOCK_STATUS   = TRUE
 722
 723 FILE RAW = 14D83A59-A810-4556-8192-1C0A593C065C { # PcdEdkiiSystemFirmwareFileGuid
 724     FD = Quark
 725   }
 726
 727 FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid
 728     FV = CapsuleDispatchFv
 729   }
 730
 731 FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid
 732     QuarkPlatformPkg/Feature/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini
 733   }
 734
 735 !endif
 736
 737 !if $(CAPSULE_ENABLE)
 738 [FmpPayload.FmpPayloadSystemFirmwarePkcs7]
 739 IMAGE_HEADER_INIT_VERSION = 0x02
 740 IMAGE_TYPE_ID             = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid
 741 IMAGE_INDEX               = 0x1
 742 HARDWARE_INSTANCE         = 0x0
 743 MONOTONIC_COUNT           = 0x2
 744 CERTIFICATE_GUID          = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7
 745
 746 FV = SystemFirmwareUpdateCargo
 747
 748 [Capsule.QuarkFirmwareUpdateCapsuleFmpPkcs7]
 749 CAPSULE_GUID                = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
 750 CAPSULE_FLAGS               = PersistAcrossReset,InitiateReset
 751 CAPSULE_HEADER_SIZE         = 0x20
 752 CAPSULE_HEADER_INIT_VERSION = 0x1
 753
 754 FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7
 755 !endif
 756
 757 !if $(RECOVERY_ENABLE)
 758 [FmpPayload.FmpPayloadSystemFirmwareRsa2048]
 759 IMAGE_HEADER_INIT_VERSION = 0x02
 760 IMAGE_TYPE_ID             = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid
 761 IMAGE_INDEX               = 0x1
 762 HARDWARE_INSTANCE         = 0x0
 763 MONOTONIC_COUNT           = 0x2
 764 CERTIFICATE_GUID          = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256
 765
 766 FV = SystemFirmwareUpdateCargo
 767
 768 [Capsule.QuarkRec]
 769 CAPSULE_GUID                = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid
 770 CAPSULE_FLAGS               = PersistAcrossReset,InitiateReset
 771 CAPSULE_HEADER_SIZE         = 0x20
 772 CAPSULE_HEADER_INIT_VERSION = 0x1
 773
 774 FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048
 775 !endif
 776
 777 ################################################################################
 778 #
 779 # Rules are use with the [FV] section's module INF type to define
 780 # how an FFS file is created for a given INF file. The following Rule are the default
 781 # rules for the different module type. User can add the customized rules to define the
 782 # content of the FFS file.
 783 #
 784 ################################################################################
 785 [Rule.Common.SEC]
 786   FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
 787     TE  TE    Align = 8       $(INF_OUTPUT)/$(MODULE_NAME).efi
 788     RAW BIN   Align = 16      |.com
 789   }
 790
 791 [Rule.Common.PEI_CORE]
 792   FILE PEI_CORE = $(NAMED_GUID)            {
 793     TE       TE               $(INF_OUTPUT)/$(MODULE_NAME).efi
 794     UI       STRING="$(MODULE_NAME)" Optional
 795     VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 796   }
 797
 798 [Rule.Common.PEIM.NORELOC]
 799   FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED  {
 800      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 801      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 802      UI        STRING="$(MODULE_NAME)" Optional
 803      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 804   }
 805
 806 [Rule.Common.PEIM]
 807   FILE PEIM = $(NAMED_GUID)               {
 808      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 809      TE        TE                        $(INF_OUTPUT)/$(MODULE_NAME).efi
 810      UI        STRING="$(MODULE_NAME)" Optional
 811      VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 812   }
 813
 814 [Rule.Common.DXE_CORE]
 815   FILE DXE_CORE = $(NAMED_GUID) {
 816     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 817     UI        STRING="$(MODULE_NAME)" Optional
 818     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 819   }
 820
 821 [Rule.Common.UEFI_DRIVER]
 822   FILE DRIVER = $(NAMED_GUID) {
 823     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 824     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 825     UI        STRING="$(MODULE_NAME)" Optional
 826     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 827   }
 828
 829 [Rule.Common.DXE_DRIVER]
 830   FILE DRIVER = $(NAMED_GUID) {
 831     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 832     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 833     UI        STRING="$(MODULE_NAME)" Optional
 834     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 835   }
 836
 837 [Rule.Common.DXE_RUNTIME_DRIVER]
 838   FILE DRIVER = $(NAMED_GUID) {
 839     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 840     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 841     UI        STRING="$(MODULE_NAME)" Optional
 842     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 843   }
 844
 845 [Rule.Common.DXE_SMM_DRIVER]
 846   FILE SMM = $(NAMED_GUID) {
 847     SMM_DEPEX SMM_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 848     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 849     UI        STRING="$(MODULE_NAME)" Optional
 850     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 851   }
 852
 853 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
 854   FILE SMM = $(NAMED_GUID) {
 855     DXE_DEPEX DXE_DEPEX Optional       $(INF_OUTPUT)/$(MODULE_NAME).depex
 856     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 857     RAW ACPI  Optional                |.acpi
 858     RAW ASL   Optional                |.aml
 859     UI        STRING="$(MODULE_NAME)" Optional
 860     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 861   }
 862
 863 [Rule.Common.SMM_CORE]
 864   FILE SMM_CORE = $(NAMED_GUID) {
 865     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 866     UI        STRING="$(MODULE_NAME)" Optional
 867     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 868   }
 869
 870 [Rule.Common.UEFI_APPLICATION]
 871   FILE APPLICATION = $(NAMED_GUID) {
 872     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 873     UI        STRING="$(MODULE_NAME)" Optional
 874     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 875   }
 876
 877 [Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED]
 878   FILE APPLICATION = $(NAMED_GUID) {
 879     UI        STRING="$(MODULE_NAME)" Optional
 880     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 881     SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {  # TIANO COMPRESS GUID
 882       PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 883     }
 884   }
 885
 886 [Rule.Common.UEFI_APPLICATION.UI]
 887   FILE APPLICATION = $(NAMED_GUID) {
 888     PE32      PE32                     $(INF_OUTPUT)/$(MODULE_NAME).efi
 889     UI        STRING="Enter Setup"
 890     VERSION   STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 891   }
 892
 893 [Rule.Common.USER_DEFINED.ACPITABLE]
 894   FILE FREEFORM = $(NAMED_GUID) {
 895     RAW ACPI               |.acpi
 896     RAW ASL                |.aml
 897   }
 898
 899 [Rule.Common.PEIM.FMP_IMAGE_DESC]
 900   FILE PEIM = $(NAMED_GUID) {
 901      RAW BIN                  |.acpi
 902      PEI_DEPEX PEI_DEPEX Optional        $(INF_OUTPUT)/$(MODULE_NAME).depex
 903      PE32      PE32    Align=4K          $(INF_OUTPUT)/$(MODULE_NAME).efi
 904      UI       STRING="$(MODULE_NAME)" Optional
 905      VERSION  STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
 906   }
 907