UefiCpuPkg/Library/CpuCommonFeaturesLib/PendingBreak.c

   1 /** @file
   2   Pending Break feature.
   3
   4   Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include "CpuCommonFeatures.h"
  16
  17 /**
  18   Detects if Pending Break feature supported on current processor.
  19
  20   @param[in]  ProcessorNumber  The index of the CPU executing this function.
  21   @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  22                                structure for the CPU executing this function.
  23   @param[in]  ConfigData       A pointer to the configuration buffer returned
  24                                by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
  25                                CPU_FEATURE_GET_CONFIG_DATA was not provided in
  26                                RegisterCpuFeature().
  27
  28   @retval TRUE     Pending Break feature is supported.
  29   @retval FALSE    Pending Break feature is not supported.
  30
  31   @note This service could be called by BSP/APs.
  32 **/
  33 BOOLEAN
  34 EFIAPI
  35 PendingBreakSupport (
  36   IN UINTN                             ProcessorNumber,
  37   IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
  38   IN VOID                              *ConfigData  OPTIONAL
  39   )
  40 {
  41   if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  42       IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  43       IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  44       IS_PENTIUM_4_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
  45       IS_PENTIUM_M_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {
  46     return (CpuInfo->CpuIdVersionInfoEdx.Bits.PBE == 1);
  47   }
  48   return FALSE;
  49 }
  50
  51 /**
  52   Initializes Pending Break feature to specific state.
  53
  54   @param[in]  ProcessorNumber  The index of the CPU executing this function.
  55   @param[in]  CpuInfo          A pointer to the REGISTER_CPU_FEATURE_INFORMATION
  56                                structure for the CPU executing this function.
  57   @param[in]  ConfigData       A pointer to the configuration buffer returned
  58                                by CPU_FEATURE_GET_CONFIG_DATA.  NULL if
  59                                CPU_FEATURE_GET_CONFIG_DATA was not provided in
  60                                RegisterCpuFeature().
  61   @param[in]  State            If TRUE, then the Pending Break feature must be enabled.
  62                                If FALSE, then the Pending Break feature must be disabled.
  63
  64   @retval RETURN_SUCCESS       Pending Break feature is initialized.
  65
  66   @note This service could be called by BSP only.
  67 **/
  68 RETURN_STATUS
  69 EFIAPI
  70 PendingBreakInitialize (
  71   IN UINTN                             ProcessorNumber,
  72   IN REGISTER_CPU_FEATURE_INFORMATION  *CpuInfo,
  73   IN VOID                              *ConfigData,  OPTIONAL
  74   IN BOOLEAN                           State
  75   )
  76 {
  77   //
  78   // The scope of the MSR_ATOM_IA32_MISC_ENABLE is core for below processor type, only program
  79   // MSR_ATOM_IA32_MISC_ENABLE for thread 0 in each core.
  80   //
  81   // Support function has check the processer type for this feature, no need to check again
  82   // here.
  83   //
  84   if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
  85     return RETURN_SUCCESS;
  86   }
  87
  88   //
  89   // ATOM, CORE2, CORE, PENTIUM_4 and IS_PENTIUM_M_PROCESSOR have the same MSR index,
  90   // Simply use MSR_ATOM_IA32_MISC_ENABLE here
  91   //
  92   CPU_REGISTER_TABLE_WRITE_FIELD (
  93     ProcessorNumber,
  94     Msr,
  95     MSR_ATOM_IA32_MISC_ENABLE,
  96     MSR_ATOM_IA32_MISC_ENABLE_REGISTER,
  97     Bits.FERR,
  98     (State) ? 1 : 0
  99     );
 100   return RETURN_SUCCESS;
 101 }