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UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO
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1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
7 ;
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
10 ;
11 ; Module Name:
12 ;
13 ; MpFuncs.nasm
14 ;
15 ; Abstract:
16 ;
17 ; This is the assembly code for MP support
18 ;
19 ;-------------------------------------------------------------------------------
20
21 %include "MpEqu.inc"
22 extern ASM_PFX(InitializeFloatingPointUnits)
23
24 SECTION .text
25
26 ;-------------------------------------------------------------------------------------
27 ;RendezvousFunnelProc procedure follows. All APs execute their procedure. This
28 ;procedure serializes all the AP processors through an Init sequence. It must be
29 ;noted that APs arrive here very raw...ie: real mode, no stack.
30 ;ALSO THIS PROCEDURE IS EXECUTED BY APs ONLY ON 16 BIT MODE. HENCE THIS PROC
31 ;IS IN MACHINE CODE.
32 ;-------------------------------------------------------------------------------------
33 global ASM_PFX(RendezvousFunnelProc)
34 ASM_PFX(RendezvousFunnelProc):
35 RendezvousFunnelProcStart:
36 ; At this point CS = 0x(vv00) and ip= 0x0.
37 BITS 16
38 mov ebp, eax ; save BIST information
39
40 mov ax, cs
41 mov ds, ax
42 mov es, ax
43 mov ss, ax
44 xor ax, ax
45 mov fs, ax
46 mov gs, ax
47
48 mov si, BufferStartLocation
49 mov ebx, [si]
50
51 mov si, ModeOffsetLocation
52 mov eax, [si]
53 mov si, CodeSegmentLocation
54 mov edx, [si]
55 mov di, ax
56 sub di, 02h
57 mov [di], dx
58 sub di, 04h
59 add eax, ebx
60 mov [di],eax
61
62 mov si, DataSegmentLocation
63 mov edx, [si]
64
65 mov si, GdtrLocation
66 o32 lgdt [cs:si]
67
68 mov si, IdtrLocation
69 o32 lidt [cs:si]
70
71 xor ax, ax
72 mov ds, ax
73
74 mov eax, cr0 ; Get control register 0
75 or eax, 000000003h ; Set PE bit (bit #0) & MP
76 mov cr0, eax
77
78 jmp 0:strict dword 0 ; far jump to protected mode
79 BITS 32
80 Flat32Start: ; protected mode entry point
81 mov ds, dx
82 mov es, dx
83 mov fs, dx
84 mov gs, dx
85 mov ss, dx
86
87 mov esi, ebx
88
89 mov edi, esi
90 add edi, EnableExecuteDisableLocation
91 cmp byte [edi], 0
92 jz SkipEnableExecuteDisable
93
94 ;
95 ; Enable IA32 PAE execute disable
96 ;
97
98 mov ecx, 0xc0000080
99 rdmsr
100 bts eax, 11
101 wrmsr
102
103 mov edi, esi
104 add edi, Cr3Location
105 mov eax, dword [edi]
106 mov cr3, eax
107
108 mov eax, cr4
109 bts eax, 5
110 mov cr4, eax
111
112 mov eax, cr0
113 bts eax, 31
114 mov cr0, eax
115
116 SkipEnableExecuteDisable:
117
118 mov edi, esi
119 add edi, LockLocation
120 mov eax, NotVacantFlag
121
122 TestLock:
123 xchg [edi], eax
124 cmp eax, NotVacantFlag
125 jz TestLock
126
127 mov edi, esi
128 add edi, NumApsExecutingLocation
129 inc dword [edi]
130 mov ebx, [edi]
131
132 ProgramStack:
133 mov edi, esi
134 add edi, StackSizeLocation
135 mov eax, [edi]
136 mov edi, esi
137 add edi, StackStartAddressLocation
138 add eax, [edi]
139 mov esp, eax
140 mov [edi], eax
141
142 Releaselock:
143 mov eax, VacantFlag
144 mov edi, esi
145 add edi, LockLocation
146 xchg [edi], eax
147
148 CProcedureInvoke:
149 push ebp ; push BIST data at top of AP stack
150 xor ebp, ebp ; clear ebp for call stack trace
151 push ebp
152 mov ebp, esp
153
154 mov eax, ASM_PFX(InitializeFloatingPointUnits)
155 call eax ; Call assembly function to initialize FPU per UEFI spec
156
157 push ebx ; Push NumApsExecuting
158 mov eax, esi
159 add eax, LockLocation
160 push eax ; push address of exchange info data buffer
161
162 mov edi, esi
163 add edi, ApProcedureLocation
164 mov eax, [edi]
165
166 call eax ; Invoke C function
167
168 jmp $ ; Never reach here
169 RendezvousFunnelProcEnd:
170
171 ;-------------------------------------------------------------------------------------
172 ; AsmGetAddressMap (&AddressMap);
173 ;-------------------------------------------------------------------------------------
174 global ASM_PFX(AsmGetAddressMap)
175 ASM_PFX(AsmGetAddressMap):
176 pushad
177 mov ebp,esp
178
179 mov ebx, [ebp + 24h]
180 mov dword [ebx], RendezvousFunnelProcStart
181 mov dword [ebx + 4h], Flat32Start - RendezvousFunnelProcStart
182 mov dword [ebx + 8h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart
183
184 popad
185 ret
186
187 ;-------------------------------------------------------------------------------------
188 ;AsmExchangeRole procedure follows. This procedure executed by current BSP, that is
189 ;about to become an AP. It switches it'stack with the current AP.
190 ;AsmExchangeRole (IN CPU_EXCHANGE_INFO *MyInfo, IN CPU_EXCHANGE_INFO *OthersInfo);
191 ;-------------------------------------------------------------------------------------
192 global ASM_PFX(AsmExchangeRole)
193 ASM_PFX(AsmExchangeRole):
194 ; DO NOT call other functions in this function, since 2 CPU may use 1 stack
195 ; at the same time. If 1 CPU try to call a function, stack will be corrupted.
196 pushad
197 mov ebp,esp
198
199 ; esi contains MyInfo pointer
200 mov esi, [ebp + 24h]
201
202 ; edi contains OthersInfo pointer
203 mov edi, [ebp + 28h]
204
205 ;Store EFLAGS, GDTR and IDTR register to stack
206 pushfd
207 mov eax, cr4
208 push eax ; push cr4 firstly
209 mov eax, cr0
210 push eax
211
212 sgdt [esi + 8]
213 sidt [esi + 14]
214
215 ; Store the its StackPointer
216 mov [esi + 4],esp
217
218 ; update its switch state to STORED
219 mov byte [esi], CPU_SWITCH_STATE_STORED
220
221 WaitForOtherStored:
222 ; wait until the other CPU finish storing its state
223 cmp byte [edi], CPU_SWITCH_STATE_STORED
224 jz OtherStored
225 pause
226 jmp WaitForOtherStored
227
228 OtherStored:
229 ; Since another CPU already stored its state, load them
230 ; load GDTR value
231 lgdt [edi + 8]
232
233 ; load IDTR value
234 lidt [edi + 14]
235
236 ; load its future StackPointer
237 mov esp, [edi + 4]
238
239 ; update the other CPU's switch state to LOADED
240 mov byte [edi], CPU_SWITCH_STATE_LOADED
241
242 WaitForOtherLoaded:
243 ; wait until the other CPU finish loading new state,
244 ; otherwise the data in stack may corrupt
245 cmp byte [esi], CPU_SWITCH_STATE_LOADED
246 jz OtherLoaded
247 pause
248 jmp WaitForOtherLoaded
249
250 OtherLoaded:
251 ; since the other CPU already get the data it want, leave this procedure
252 pop eax
253 mov cr0, eax
254 pop eax
255 mov cr4, eax
256 popfd
257
258 popad
259 ret