UefiCpuPkg/PiSmmCpuDxeSmm: patch "gSmmCr3" with PatchInstructionX86()
[mirror_edk2.git] / UefiCpuPkg / PiSmmCpuDxeSmm / Ia32 / SmmInit.nasm
1 ;------------------------------------------------------------------------------ ;
2 ; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
3 ; This program and the accompanying materials
4 ; are licensed and made available under the terms and conditions of the BSD License
5 ; which accompanies this distribution. The full text of the license may be found at
6 ; http://opensource.org/licenses/bsd-license.php.
7 ;
8 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
10 ;
11 ; Module Name:
12 ;
13 ; SmmInit.nasm
14 ;
15 ; Abstract:
16 ;
17 ; Functions for relocating SMBASE's for all processors
18 ;
19 ;-------------------------------------------------------------------------------
20
21 extern ASM_PFX(SmmInitHandler)
22 extern ASM_PFX(mRebasedFlag)
23 extern ASM_PFX(mSmmRelocationOriginalAddress)
24
25 global ASM_PFX(gPatchSmmCr3)
26 global ASM_PFX(gSmmCr4)
27 global ASM_PFX(gSmmCr0)
28 global ASM_PFX(gSmmJmpAddr)
29 global ASM_PFX(gSmmInitStack)
30 global ASM_PFX(gcSmiInitGdtr)
31 global ASM_PFX(gcSmmInitSize)
32 global ASM_PFX(gcSmmInitTemplate)
33
34 %define PROTECT_MODE_CS 0x8
35 %define PROTECT_MODE_DS 0x20
36
37 SECTION .text
38
39 ASM_PFX(gcSmiInitGdtr):
40 DW 0
41 DQ 0
42
43 global ASM_PFX(SmmStartup)
44
45 BITS 16
46 ASM_PFX(SmmStartup):
47 mov eax, 0x80000001 ; read capability
48 cpuid
49 mov ebx, edx ; rdmsr will change edx. keep it in ebx.
50 and ebx, BIT20 ; extract NX capability bit
51 shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position
52 mov eax, strict dword 0 ; source operand will be patched
53 ASM_PFX(gPatchSmmCr3):
54 mov cr3, eax
55 o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))]
56 DB 0x66, 0xb8 ; mov eax, imm32
57 ASM_PFX(gSmmCr4): DD 0
58 mov cr4, eax
59 mov ecx, 0xc0000080 ; IA32_EFER MSR
60 rdmsr
61 or eax, ebx ; set NXE bit if NX is available
62 wrmsr
63 DB 0x66, 0xb8 ; mov eax, imm32
64 ASM_PFX(gSmmCr0): DD 0
65 mov di, PROTECT_MODE_DS
66 mov cr0, eax
67 DB 0x66, 0xea ; jmp far [ptr48]
68 ASM_PFX(gSmmJmpAddr):
69 DD @32bit
70 DW PROTECT_MODE_CS
71
72 BITS 32
73 @32bit:
74 mov ds, edi
75 mov es, edi
76 mov fs, edi
77 mov gs, edi
78 mov ss, edi
79 DB 0xbc ; mov esp, imm32
80 ASM_PFX(gSmmInitStack): DD 0
81 call ASM_PFX(SmmInitHandler)
82 rsm
83
84 BITS 16
85 ASM_PFX(gcSmmInitTemplate):
86 mov ebp, ASM_PFX(SmmStartup)
87 sub ebp, 0x30000
88 jmp ebp
89
90 ASM_PFX(gcSmmInitSize): DW $ - ASM_PFX(gcSmmInitTemplate)
91
92 BITS 32
93 global ASM_PFX(SmmRelocationSemaphoreComplete)
94 ASM_PFX(SmmRelocationSemaphoreComplete):
95 push eax
96 mov eax, [ASM_PFX(mRebasedFlag)]
97 mov byte [eax], 1
98 pop eax
99 jmp [ASM_PFX(mSmmRelocationOriginalAddress)]
100
101 global ASM_PFX(PiSmmCpuSmmInitFixupAddress)
102 ASM_PFX(PiSmmCpuSmmInitFixupAddress):
103 ret