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1 /** @file
2 Header file of PciHostBridgeLib.
3
4 Copyright (C) 2016, Red Hat, Inc.
5 Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>
6
7 SPDX-License-Identifier: BSD-2-Clause-Patent
8
9 **/
10
11 #ifndef PCI_HOST_BRIDGE_H_
12 #define PCI_HOST_BRIDGE_H_
13
14 #include <UniversalPayload/PciRootBridges.h>
15
16 typedef struct {
17 ACPI_HID_DEVICE_PATH AcpiDevicePath;
18 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
19 } CB_PCI_ROOT_BRIDGE_DEVICE_PATH;
20
21 /**
22 Scan for all root bridges in platform.
23
24 @param[out] NumberOfRootBridges Number of root bridges detected
25
26 @retval Pointer to the allocated PCI_ROOT_BRIDGE structure array.
27 **/
28 PCI_ROOT_BRIDGE *
29 ScanForRootBridges (
30 OUT UINTN *NumberOfRootBridges
31 );
32
33 /**
34 Scan for all root bridges from Universal Payload PciRootBridgeInfoHob
35
36 @param[in] PciRootBridgeInfo Pointer of Universal Payload PCI Root Bridge Info Hob
37 @param[out] NumberOfRootBridges Number of root bridges detected
38
39 @retval Pointer to the allocated PCI_ROOT_BRIDGE structure array.
40
41 **/
42 PCI_ROOT_BRIDGE *
43 RetrieveRootBridgeInfoFromHob (
44 IN UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES *PciRootBridgeInfo,
45 OUT UINTN *NumberOfRootBridges
46 );
47
48 /**
49 Initialize a PCI_ROOT_BRIDGE structure.
50
51 @param[in] Supports Supported attributes.
52
53 @param[in] Attributes Initial attributes.
54
55 @param[in] AllocAttributes Allocation attributes.
56
57 @param[in] RootBusNumber The bus number to store in RootBus.
58
59 @param[in] MaxSubBusNumber The inclusive maximum bus number that can be
60 assigned to any subordinate bus found behind any
61 PCI bridge hanging off this root bus.
62
63 The caller is responsible for ensuring that
64 RootBusNumber <= MaxSubBusNumber. If
65 RootBusNumber equals MaxSubBusNumber, then the
66 root bus has no room for subordinate buses.
67
68 @param[in] Io IO aperture.
69
70 @param[in] Mem MMIO aperture.
71
72 @param[in] MemAbove4G MMIO aperture above 4G.
73
74 @param[in] PMem Prefetchable MMIO aperture.
75
76 @param[in] PMemAbove4G Prefetchable MMIO aperture above 4G.
77
78 @param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the
79 caller) that should be filled in by this
80 function.
81
82 @retval EFI_SUCCESS Initialization successful. A device path
83 consisting of an ACPI device path node, with
84 UID = RootBusNumber, has been allocated and
85 linked into RootBus.
86
87 @retval EFI_OUT_OF_RESOURCES Memory allocation failed.
88 **/
89 EFI_STATUS
90 InitRootBridge (
91 IN UINT64 Supports,
92 IN UINT64 Attributes,
93 IN UINT64 AllocAttributes,
94 IN UINT8 RootBusNumber,
95 IN UINT8 MaxSubBusNumber,
96 IN PCI_ROOT_BRIDGE_APERTURE *Io,
97 IN PCI_ROOT_BRIDGE_APERTURE *Mem,
98 IN PCI_ROOT_BRIDGE_APERTURE *MemAbove4G,
99 IN PCI_ROOT_BRIDGE_APERTURE *PMem,
100 IN PCI_ROOT_BRIDGE_APERTURE *PMemAbove4G,
101 OUT PCI_ROOT_BRIDGE *RootBus
102 );
103
104 /**
105 Initialize DevicePath for a PCI_ROOT_BRIDGE.
106 @param[in] HID HID for device path
107 @param[in] UID UID for device path
108
109 @retval A pointer to the new created device patch.
110 **/
111 EFI_DEVICE_PATH_PROTOCOL *
112 CreateRootBridgeDevicePath (
113 IN UINT32 HID,
114 IN UINT32 UID
115 );
116 #endif