Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/Include/Ppi/VlvPolicy.h

   1
   2 /*++
   3
   4 Copyright (c)  2010  - 2014, Intel Corporation. All rights reserved
   5
   6   SPDX-License-Identifier: BSD-2-Clause-Patent
   7
   8
   9 Module Name:
  10
  11   VlvPolicy.h
  12
  13 Abstract:
  14
  15   Interface definition details between ValleyView MRC and platform drivers during PEI phase.
  16
  17 --*/
  18
  19 #ifndef _VLV_POLICY_PPI_H_
  20 #define _VLV_POLICY_PPI_H_
  21
  22 //
  23 // MRC Policy provided by platform for PEI phase {7D84B2C2-22A1-4372-B12C-EBB232D3A6A3}
  24 //
  25 #define VLV_POLICY_PPI_GUID \
  26   { \
  27     0x7D84B2C2, 0x22A1, 0x4372, 0xB1, 0x2C, 0xEB, 0xB2, 0x32, 0xD3, 0xA6, 0xA3 \
  28   }
  29
  30 //
  31 // Extern the GUID for protocol users.
  32 //
  33 extern EFI_GUID gVlvPolicyPpiGuid;
  34
  35 //
  36 // PPI revision number
  37 // Any backwards compatible changes to this PPI will result in an update in the revision number
  38 // Major changes will require publication of a new PPI
  39 //
  40 #define MRC_PLATFORM_POLICY_PPI_REVISION  1
  41
  42 #ifndef MAX_SOCKETS
  43 #define MAX_SOCKETS 4
  44 #endif
  45
  46 #define S3_TIMING_DATA_LEN          9
  47 #define S3_READ_TRAINING_DATA_LEN   16
  48 #define S3_WRITE_TRAINING_DATA_LEN  12
  49
  50 #ifndef S3_RESTORE_DATA_LEN
  51 #define S3_RESTORE_DATA_LEN (S3_TIMING_DATA_LEN + S3_READ_TRAINING_DATA_LEN + S3_WRITE_TRAINING_DATA_LEN)
  52 #endif // S3_RESTORE_DATA_LEN
  53 #pragma pack(1)
  54 //
  55 // MRC Platform Data Structure
  56 //
  57 typedef struct {
  58   UINT8   SpdAddressTable[MAX_SOCKETS];
  59   UINT8   TSonDimmSmbusAddress[MAX_SOCKETS];
  60
  61   UINT16  SmbusBar;
  62   UINT32  IchRcba;
  63   UINT32  WdbBaseAddress; // Write Data Buffer area (WC caching mode)
  64   UINT32  WdbRegionSize;
  65   UINT32  SmBusAddress;
  66   UINT8   UserBd;
  67   UINT8   PlatformType;
  68   UINT8   FastBoot;
  69   UINT8   DynSR;
  70 } VLV_PLATFORM_DATA;
  71
  72
  73 typedef struct {
  74   UINT16  MmioSize;
  75   UINT16  GttSize;
  76   UINT8   IgdDvmt50PreAlloc;
  77   UINT8   PrimaryDisplay;
  78   UINT8   PAVPMode;
  79   UINT8   ApertureSize;
  80 } GT_CONFIGURATION;
  81
  82 typedef struct {
  83   UINT8   EccSupport;
  84   UINT16  DdrFreqLimit;
  85   UINT8   MaxTolud;
  86 } MEMORY_CONFIGURATION;
  87
  88
  89 //
  90 // MRC Platform Policiy PPI
  91 //
  92 typedef struct _VLV_POLICY_PPI {
  93   UINT8                 Revision;
  94   VLV_PLATFORM_DATA     PlatformData;
  95   GT_CONFIGURATION      GtConfig;
  96   MEMORY_CONFIGURATION  MemConfig;
  97   VOID                  *S3DataPtr; // was called MRC_PARAMS_SAVE_RESTORE
  98   UINT8                 ISPEn;            //ISP (IUNIT) Device Enabled
  99   UINT8                 ISPPciDevConfig;  //ISP (IUNIT) Device Config: 0->B0/D2/F0 for Window OS, 1->B0D3/F0 for Linux OS
 100 } VLV_POLICY_PPI;
 101
 102 #pragma pack()
 103
 104 #endif // _VLV_POLICY_PPI_H_