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1 /** @file
2 Multiplatform initialization.
3
4 Copyright (c) 2010 - 2014, Intel Corporation. All rights reserved.<BR>
5
6 This program and the accompanying materials are licensed and made available under
7 the terms and conditions of the BSD License that accompanies this distribution.
8 The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php.
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14
15 **/
16
17 #include <MultiPlatformLib.h>
18
19 /**
20 Platform Type detection. Because the PEI globle variable
21 is in the flash, it could not change directly.So use
22 2 PPIs to distinguish the platform type.
23
24 @param FfsHeader Pointer to Firmware File System file header.
25 @param PeiServices General purpose services available to every PEIM.
26
27 @retval EFI_SUCCESS Memory initialization completed successfully.
28 @retval Others All other error conditions encountered result in an ASSERT.
29
30 **/
31 EFI_STATUS
32 MultiPlatformInfoInit (
33 IN CONST EFI_PEI_SERVICES **PeiServices,
34 IN OUT EFI_PLATFORM_INFO_HOB *PlatformInfoHob
35 )
36 {
37 UINT32 PcieLength;
38 EFI_STATUS Status;
39
40
41 PlatformInfoHob->IohSku = MmPci16(0, MC_BUS, MC_DEV, MC_FUN, PCI_DEVICE_ID_OFFSET);
42
43 PlatformInfoHob->IohRevision = MmPci8(0, MC_BUS, MC_DEV, MC_FUN, PCI_REVISION_ID_OFFSET);
44
45 //
46 // Update ICH Type
47 //
48 //
49 // Device ID
50 //
51 PlatformInfoHob->IchSku = PchLpcPciCfg16(PCI_DEVICE_ID_OFFSET);
52
53 PlatformInfoHob->IchRevision = PchLpcPciCfg8(PCI_REVISION_ID_OFFSET);
54
55 //
56 //64MB
57 //
58 PcieLength = 0x04000000;
59
60 //
61 // Don't support BASE above 4GB currently.
62 //
63 PlatformInfoHob->PciData.PciExpressSize = PcieLength;
64 PlatformInfoHob->PciData.PciExpressBase = PcdGet64 (PcdPciExpressBaseAddress);
65
66 PlatformInfoHob->PciData.PciResourceMem32Base = (UINT32) (PlatformInfoHob->PciData.PciExpressBase - RES_MEM32_MIN_LEN);
67 PlatformInfoHob->PciData.PciResourceMem32Limit = (UINT32) (PlatformInfoHob->PciData.PciExpressBase -1);
68
69 PlatformInfoHob->PciData.PciResourceMem64Base = RES_MEM64_36_BASE;
70 PlatformInfoHob->PciData.PciResourceMem64Limit = RES_MEM64_36_LIMIT;
71 PlatformInfoHob->CpuData.CpuAddressWidth = 36;
72
73 PlatformInfoHob->MemData.MemMir0 = PlatformInfoHob->PciData.PciResourceMem64Base;
74 PlatformInfoHob->MemData.MemMir1 = PlatformInfoHob->PciData.PciResourceMem64Limit + 1;
75
76 PlatformInfoHob->PciData.PciResourceMinSecBus = 1; //can be changed by SystemConfiguration->PciMinSecondaryBus;
77
78 //
79 // Set MemMaxTolm to the lowest address between PCIe Base and PCI32 Base.
80 //
81 if (PlatformInfoHob->PciData.PciExpressBase > PlatformInfoHob->PciData.PciResourceMem32Base ) {
82 PlatformInfoHob->MemData.MemMaxTolm = (UINT32) PlatformInfoHob->PciData.PciResourceMem32Base;
83 } else {
84 PlatformInfoHob->MemData.MemMaxTolm = (UINT32) PlatformInfoHob->PciData.PciExpressBase;
85 }
86 PlatformInfoHob->MemData.MemTolm = PlatformInfoHob->MemData.MemMaxTolm;
87
88 //
89 // Platform PCI MMIO Size in unit of 1MB.
90 //
91 PlatformInfoHob->MemData.MmioSize = 0x1000 - (UINT16)(PlatformInfoHob->MemData.MemMaxTolm >> 20);
92
93 //
94 // Enable ICH IOAPIC
95 //
96 PlatformInfoHob->SysData.SysIoApicEnable = ICH_IOAPIC;
97
98 DEBUG ((EFI_D_ERROR, "PlatformFlavor is %x (%x=tablet,%x=mobile,%x=desktop)\n", PlatformInfoHob->PlatformFlavor,FlavorTablet,FlavorMobile,FlavorDesktop));
99
100 //
101 // Get Platform Info and fill the Hob.
102 //
103 PlatformInfoHob->RevisonId = PLATFORM_INFO_HOB_REVISION;
104
105 //
106 // Get GPIO table
107 //
108 Status = MultiPlatformGpioTableInit (PeiServices, PlatformInfoHob);
109
110 //
111 // Program GPIO
112 //
113 Status = MultiPlatformGpioProgram (PeiServices, PlatformInfoHob);
114
115 //
116 // Update OemId
117 //
118 Status = InitializeBoardOemId (PeiServices, PlatformInfoHob);
119 Status = InitializeBoardSsidSvid (PeiServices, PlatformInfoHob);
120
121 return EFI_SUCCESS;
122 }