Vlv2TbltDevicePkg:Add PiSmmCommunication&PiSmmCpuDxeSmm of UefiCpuPkg.
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkg.fdf
1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000
52
53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000
54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000
55
56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
58
59 ################################################################################
60 #
61 # FD Section
62 # The [FD] Section is made up of the definition statements and a
63 # description of what goes into the Flash Device Image. Each FD section
64 # defines one flash "device" image. A flash device image may be one of
65 # the following: Removable media bootable image (like a boot floppy
66 # image,) an Option ROM image (that would be "flashed" into an add-in
67 # card,) a System "Flash" image (that would be burned into a system's
68 # flash) or an Update ("Capsule") image that will be used to update and
69 # existing system flash.
70 #
71 ################################################################################
72 [FD.Vlv]
73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75 ErasePolarity = 1
76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79 #
80 #Flash location override based on actual flash map
81 #
82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85 !if $(MINNOW2_FSP_BUILD) == TRUE
86 # put below PCD value setting into dsc file
87 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
88 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
89 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
91 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
94
95 !endif
96 ################################################################################
97 #
98 # Following are lists of FD Region layout which correspond to the locations of different
99 # images within the flash device.
100 #
101 # Regions must be defined in ascending order and may not overlap.
102 #
103 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
104 # the pipe "|" character, followed by the size of the region, also in hex with the leading
105 # "0x" characters. Like:
106 # Offset|Size
107 # PcdOffsetCName|PcdSizeCName
108 # RegionType <FV, DATA, or FILE>
109 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
110 #
111 ################################################################################
112 #
113 # CPU Microcodes
114 #
115
116 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
117 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
118 FV = MICROCODE_FV
119 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
120 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
121 #NV_VARIABLE_STORE
122 DATA = {
123 ## This is the EFI_FIRMWARE_VOLUME_HEADER
124 # ZeroVector []
125 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
126 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 # FileSystemGuid: gEfiSystemNvDataFvGuid =
128 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
129 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
130 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
131 # FvLength: 0x80000
132 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
133 #Signature "_FVH" #Attributes
134 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
135 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
136 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
137 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
138 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
139 #Blockmap[1]: End
140 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
141 ## This is the VARIABLE_STORE_HEADER
142 !if $(SECURE_BOOT_ENABLE) == TRUE
143 #Signature: gEfiAuthenticatedVariableGuid =
144 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
145 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
146 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
147 !else
148 #Signature: gEfiVariableGuid =
149 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
150 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
151 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
152 !endif
153 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
154 # This can speed up the Variable Dispatch a bit.
155 0xB8, 0xDF, 0x03, 0x00,
156 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
157 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
158 }
159
160
161 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
162 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
163 #NV_FTW_WORKING
164 DATA = {
165 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
166 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
167 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
168 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
169
170 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
171 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
172 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
173 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
174 }
175
176 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
177 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
178
179 !if $(MINNOW2_FSP_BUILD) == TRUE
180
181 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
182 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
183 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
184
185
186 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
187 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
188
189 !endif
190
191 #
192 # Main Block
193 #
194 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
195 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
196 FV = FVMAIN_COMPACT
197
198 #
199 # FV Recovery#2
200 #
201 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
202 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
203 FV = FVRECOVERY2
204
205 #
206 # FV Recovery
207 #
208 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
209 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
210 FV = FVRECOVERY
211
212 ################################################################################
213 #
214 # FV Section
215 #
216 # [FV] section is used to define what components or modules are placed within a flash
217 # device file. This section also defines order the components and modules are positioned
218 # within the image. The [FV] section consists of define statements, set statements and
219 # module statements.
220 #
221 ################################################################################
222 [FV.MICROCODE_FV]
223 BlockSize = $(FLASH_BLOCK_SIZE)
224 FvAlignment = 16
225 ERASE_POLARITY = 1
226 MEMORY_MAPPED = TRUE
227 STICKY_WRITE = TRUE
228 LOCK_CAP = TRUE
229 LOCK_STATUS = FALSE
230 WRITE_DISABLED_CAP = TRUE
231 WRITE_ENABLED_CAP = TRUE
232 WRITE_STATUS = TRUE
233 WRITE_LOCK_CAP = TRUE
234 WRITE_LOCK_STATUS = TRUE
235 READ_DISABLED_CAP = TRUE
236 READ_ENABLED_CAP = TRUE
237 READ_STATUS = TRUE
238 READ_LOCK_CAP = TRUE
239 READ_LOCK_STATUS = TRUE
240
241 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
242 $(OUTPUT_DIRECTORY)\$(TARGET)_$(TOOL_CHAIN_TAG)\$(DXE_ARCHITECTURE)\MicrocodeUpdates.bin
243 }
244
245 ################################################################################
246 #
247 # FV Section
248 #
249 # [FV] section is used to define what components or modules are placed within a flash
250 # device file. This section also defines order the components and modules are positioned
251 # within the image. The [FV] section consists of define statements, set statements and
252 # module statements.
253 #
254 ################################################################################
255 [FV.FVRECOVERY2]
256 BlockSize = $(FLASH_BLOCK_SIZE)
257 FvAlignment = 16 #FV alignment and FV attributes setting.
258 ERASE_POLARITY = 1
259 MEMORY_MAPPED = TRUE
260 STICKY_WRITE = TRUE
261 LOCK_CAP = TRUE
262 LOCK_STATUS = TRUE
263 WRITE_DISABLED_CAP = TRUE
264 WRITE_ENABLED_CAP = TRUE
265 WRITE_STATUS = TRUE
266 WRITE_LOCK_CAP = TRUE
267 WRITE_LOCK_STATUS = TRUE
268 READ_DISABLED_CAP = TRUE
269 READ_ENABLED_CAP = TRUE
270 READ_STATUS = TRUE
271 READ_LOCK_CAP = TRUE
272 READ_LOCK_STATUS = TRUE
273 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
274
275
276
277 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
278
279 !if $(MINNOW2_FSP_BUILD) == FALSE
280 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
281 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
282 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
283 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
284 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
285 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
286 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
287 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
288 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
289 !endif
290
291 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
292 !if $(TPM_ENABLED) == TRUE
293 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf
294 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
295 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
296 !endif
297 !if $(FTPM_ENABLE) == TRUE
298 INF SecurityPkg/Tcg/TrEEPei/TrEEPei.inf #use PCD config
299 !endif
300 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
301
302 !if $(ACPI50_ENABLE) == TRUE
303 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
304 !endif
305 !if $(PERFORMANCE_ENABLE) == TRUE
306 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
307 !endif
308
309 [FV.FVRECOVERY]
310 BlockSize = $(FLASH_BLOCK_SIZE)
311 FvAlignment = 16 #FV alignment and FV attributes setting.
312 ERASE_POLARITY = 1
313 MEMORY_MAPPED = TRUE
314 STICKY_WRITE = TRUE
315 LOCK_CAP = TRUE
316 LOCK_STATUS = TRUE
317 WRITE_DISABLED_CAP = TRUE
318 WRITE_ENABLED_CAP = TRUE
319 WRITE_STATUS = TRUE
320 WRITE_LOCK_CAP = TRUE
321 WRITE_LOCK_STATUS = TRUE
322 READ_DISABLED_CAP = TRUE
323 READ_ENABLED_CAP = TRUE
324 READ_STATUS = TRUE
325 READ_LOCK_CAP = TRUE
326 READ_LOCK_STATUS = TRUE
327 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
328
329
330 !if $(MINNOW2_FSP_BUILD) == TRUE
331 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
332 !else
333 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
334 !endif
335
336 INF MdeModulePkg/Core/Pei/PeiMain.inf
337 !if $(MINNOW2_FSP_BUILD) == TRUE
338 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
339 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
340 !endif
341 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
342 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
343 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
344
345 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
346
347 !if $(MINNOW2_FSP_BUILD) == FALSE
348 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
349 !endif
350
351 !if $(FTPM_ENABLE) == TRUE
352 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
353 !endif
354
355 !if $(SOURCE_DEBUG_ENABLE) == TRUE
356 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
357 !endif
358
359
360 !if $(CAPSULE_ENABLE) == TRUE
361 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
362 !if $(DXE_ARCHITECTURE) == "X64"
363 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
364 !endif
365 !endif
366
367 !if $(MINNOW2_FSP_BUILD) == FALSE
368 !if $(PCIESC_ENABLE) == TRUE
369 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
370 !endif
371 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
372 !endif
373
374 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
375
376 [FV.FVMAIN]
377 BlockSize = $(FLASH_BLOCK_SIZE)
378 FvAlignment = 16
379 ERASE_POLARITY = 1
380 MEMORY_MAPPED = TRUE
381 STICKY_WRITE = TRUE
382 LOCK_CAP = TRUE
383 LOCK_STATUS = TRUE
384 WRITE_DISABLED_CAP = TRUE
385 WRITE_ENABLED_CAP = TRUE
386 WRITE_STATUS = TRUE
387 WRITE_LOCK_CAP = TRUE
388 WRITE_LOCK_STATUS = TRUE
389 READ_DISABLED_CAP = TRUE
390 READ_ENABLED_CAP = TRUE
391 READ_STATUS = TRUE
392 READ_LOCK_CAP = TRUE
393 READ_LOCK_STATUS = TRUE
394 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
395
396 APRIORI DXE {
397 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
398 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
399 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
400 }
401
402 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
403 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
404 }
405
406 #
407 # EDK II Related Platform codes
408 #
409
410 !if $(MINNOW2_FSP_BUILD) == TRUE
411 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
412 !endif
413
414 INF MdeModulePkg/Core/Dxe/DxeMain.inf
415 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
416 !if $(ACPI50_ENABLE) == TRUE
417 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
418 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
419 !endif
420
421
422 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
423 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
424 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
425 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
426 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
427 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
428 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
429 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
430 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
431 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
432 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
433 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
434 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
435
436 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
437 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
438 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
439 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
440 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
441 !if $(SECURE_BOOT_ENABLE)
442 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
443 !endif
444
445 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
446
447 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
448 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
449 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
450 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
451
452
453 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
454
455 !if $(DATAHUB_ENABLE) == TRUE
456 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
457 !endif
458 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
459 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
460
461 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
462
463 #
464 # EDK II Related Silicon codes
465 #
466 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
467
468 !if $(USE_HPET_TIMER) == TRUE
469 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
470 !else
471 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
472 !endif
473 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
474
475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
476
477 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
479
480 !if $(MINNOW2_FSP_BUILD) == FALSE
481 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
482 !endif
483 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
484 !if $(PCIESC_ENABLE) == TRUE
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
486 !endif
487
488 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
489 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
490 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
492 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
493 !if $(MINNOW2_FSP_BUILD) == FALSE
494 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
495 !else
496 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
497 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
498 !endif
499 !if $(MINNOW2_FSP_BUILD) == FALSE
500 !if $(SEC_ENABLE) == TRUE
501 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
502 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
503 !endif
504 !endif
505 !if $(TPM_ENABLED) == TRUE
506 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
507 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
508 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
509 !endif
510 !if $(FTPM_ENABLE) == TRUE
511 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
512 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
513 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
514 INF SecurityPkg/Tcg/TrEEDxe/TrEEDxe.inf
515 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
516 !endif
517
518 #
519 # EDK II Related Platform codes
520 #
521 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
522 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
523 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
524 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
525 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
526 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
527 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
528 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
529 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
530 !if $(GOP_DRIVER_ENABLE) == TRUE
531 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
532 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
533 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
534 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
535 SECTION UI = "IntelGopDriver"
536 }
537 !endif
538
539 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
540 #
541 # SMM
542 #
543 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
544 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
545 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
546
547 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
548 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
549 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
550 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
551 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
552 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
553 #
554 # ACPI
555 #
556 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
557 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
558 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
559 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
560
561 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
562
563 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
564
565 #
566 # PCI
567 #
568 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
569
570 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
571
572
573 #
574 # ISA
575 #
576 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
577 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
578 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
579 !if $(SOURCE_DEBUG_ENABLE) != TRUE
580 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
581 !endif
582 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
583 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
584
585 #
586 # SDIO
587 #
588 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
589 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
590 #
591 # IDE/SCSI/AHCI
592 #
593 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
594
595 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
596
597 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
598 !if $(SATA_ENABLE) == TRUE
599 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
600 #
601
602 #
603 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
604 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
605 !if $(SCSI_ENABLE) == TRUE
606 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
607 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
608 !endif
609 #
610 !endif
611 # Console
612 #
613 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
614 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
615 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
616 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
617 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
618 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
619 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
620 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
621 #
622 # USB
623 #
624 !if $(USB_ENABLE) == TRUE
625 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
626 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
627 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
628 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
629 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
630 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
631 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
632 !endif
633
634 #
635 # ECP
636 #
637 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
638 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
639 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
640 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
641 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
642 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
643 #
644 # SMBIOS
645 #
646 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
647 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
648
649 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
650
651 #
652 # Legacy Modules
653 #
654 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
655
656 #
657 # FAT file system
658 #
659 INF FatPkg/EnhancedFatDxe/Fat.inf
660
661 #
662 # UEFI Shell
663 #
664 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
665 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
666 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
667 }
668
669
670
671 !if $(GOP_DRIVER_ENABLE) == TRUE
672 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
673 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
674 SECTION UI = "IntelGopVbt"
675 }
676 !endif
677
678 #
679 # Network Modules
680 #
681 !if $(NETWORK_ENABLE) == TRUE
682 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
683 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
684 SECTION UI = "UNDI"
685 }
686 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
687 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
688 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
689 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
690 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
691 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
692 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
693 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
694 !if $(NETWORK_IP6_ENABLE) == TRUE
695 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
696 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
697 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
698 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
699 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
700 !endif
701 !if $(NETWORK_IP6_ENABLE) == TRUE
702 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
703 INF NetworkPkg/TcpDxe/TcpDxe.inf
704 !else
705 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
706 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
707 !endif
708 !if $(NETWORK_VLAN_ENABLE) == TRUE
709 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
710 !endif
711 !if $(NETWORK_ISCSI_ENABLE) == TRUE
712 !if $(NETWORK_IP6_ENABLE) == TRUE
713 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
714 !else
715 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
716 !endif
717 !endif
718 !endif
719
720 [FV.FVMAIN_COMPACT]
721 BlockSize = $(FLASH_BLOCK_SIZE)
722 FvAlignment = 16
723 ERASE_POLARITY = 1
724 MEMORY_MAPPED = TRUE
725 STICKY_WRITE = TRUE
726 LOCK_CAP = TRUE
727 LOCK_STATUS = TRUE
728 WRITE_DISABLED_CAP = TRUE
729 WRITE_ENABLED_CAP = TRUE
730 WRITE_STATUS = TRUE
731 WRITE_LOCK_CAP = TRUE
732 WRITE_LOCK_STATUS = TRUE
733 READ_DISABLED_CAP = TRUE
734 READ_ENABLED_CAP = TRUE
735 READ_STATUS = TRUE
736 READ_LOCK_CAP = TRUE
737 READ_LOCK_STATUS = TRUE
738
739
740
741 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
742 !if $(LZMA_ENABLE) == TRUE
743 # LZMA Compress
744 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
745 SECTION FV_IMAGE = FVMAIN
746 }
747 !else
748 !if $(DXE_COMPRESS_ENABLE) == TRUE
749 # Tiano Compress
750 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
751 SECTION FV_IMAGE = FVMAIN
752 }
753 !else
754 # No Compress
755 SECTION COMPRESS PI_NONE {
756 SECTION FV_IMAGE = FVMAIN
757 }
758 !endif
759 !endif
760 }
761
762 [FV.SETUP_DATA]
763 BlockSize = $(FLASH_BLOCK_SIZE)
764 #NumBlocks = 0x10
765 FvAlignment = 16
766 ERASE_POLARITY = 1
767 MEMORY_MAPPED = TRUE
768 STICKY_WRITE = TRUE
769 LOCK_CAP = TRUE
770 LOCK_STATUS = TRUE
771 WRITE_DISABLED_CAP = TRUE
772 WRITE_ENABLED_CAP = TRUE
773 WRITE_STATUS = TRUE
774 WRITE_LOCK_CAP = TRUE
775 WRITE_LOCK_STATUS = TRUE
776 READ_DISABLED_CAP = TRUE
777 READ_ENABLED_CAP = TRUE
778 READ_STATUS = TRUE
779 READ_LOCK_CAP = TRUE
780 READ_LOCK_STATUS = TRUE
781
782
783 [FV.Update_Data]
784 BlockSize = $(FLASH_BLOCK_SIZE)
785 FvAlignment = 16
786 ERASE_POLARITY = 1
787 MEMORY_MAPPED = TRUE
788 STICKY_WRITE = TRUE
789 LOCK_CAP = TRUE
790 LOCK_STATUS = TRUE
791 WRITE_DISABLED_CAP = TRUE
792 WRITE_ENABLED_CAP = TRUE
793 WRITE_STATUS = TRUE
794 WRITE_LOCK_CAP = TRUE
795 WRITE_LOCK_STATUS = TRUE
796 READ_DISABLED_CAP = TRUE
797 READ_ENABLED_CAP = TRUE
798 READ_STATUS = TRUE
799 READ_LOCK_CAP = TRUE
800 READ_LOCK_STATUS = TRUE
801
802 FILE RAW = 88888888-8888-8888-8888-888888888888 {
803 FD = Vlv
804 }
805
806 [FV.BiosUpdateCargo]
807 BlockSize = $(FLASH_BLOCK_SIZE)
808 FvAlignment = 16
809 ERASE_POLARITY = 1
810 MEMORY_MAPPED = TRUE
811 STICKY_WRITE = TRUE
812 LOCK_CAP = TRUE
813 LOCK_STATUS = TRUE
814 WRITE_DISABLED_CAP = TRUE
815 WRITE_ENABLED_CAP = TRUE
816 WRITE_STATUS = TRUE
817 WRITE_LOCK_CAP = TRUE
818 WRITE_LOCK_STATUS = TRUE
819 READ_DISABLED_CAP = TRUE
820 READ_ENABLED_CAP = TRUE
821 READ_STATUS = TRUE
822 READ_LOCK_CAP = TRUE
823 READ_LOCK_STATUS = TRUE
824
825
826
827 [FV.BiosUpdate]
828 BlockSize = $(FLASH_BLOCK_SIZE)
829 FvAlignment = 16
830 ERASE_POLARITY = 1
831 MEMORY_MAPPED = TRUE
832 STICKY_WRITE = TRUE
833 LOCK_CAP = TRUE
834 LOCK_STATUS = TRUE
835 WRITE_DISABLED_CAP = TRUE
836 WRITE_ENABLED_CAP = TRUE
837 WRITE_STATUS = TRUE
838 WRITE_LOCK_CAP = TRUE
839 WRITE_LOCK_STATUS = TRUE
840 READ_DISABLED_CAP = TRUE
841 READ_ENABLED_CAP = TRUE
842 READ_STATUS = TRUE
843 READ_LOCK_CAP = TRUE
844 READ_LOCK_STATUS = TRUE
845
846 [Capsule.Capsule_Boot]
847 #
848 # gEfiCapsuleGuid supported by platform
849 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
850 #
851 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
852 CAPSULE_FLAGS = PersistAcrossReset
853 CAPSULE_HEADER_SIZE = 0x20
854
855 FV = BiosUpdate
856
857 [Capsule.Capsule_Reset]
858 #
859 # gEfiCapsuleGuid supported by platform
860 # { 0x3B6686BD, 0x0D76, 0x4030, { 0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 }}
861 #
862 CAPSULE_GUID = 3B6686BD-0D76-4030-B70E-B5519E2FC5A0
863 CAPSULE_FLAGS = PersistAcrossReset
864 CAPSULE_HEADER_SIZE = 0x20
865
866 FV = BiosUpdate
867
868 ################################################################################
869 #
870 # Rules are use with the [FV] section's module INF type to define
871 # how an FFS file is created for a given INF file. The following Rule are the default
872 # rules for the different module type. User can add the customized rules to define the
873 # content of the FFS file.
874 #
875 ################################################################################
876 [Rule.Common.SEC]
877 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
878 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
879 RAW BIN Align = 16 |.com
880 }
881
882 [Rule.Common.SEC.BINARY]
883 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
884 PE32 PE32 Align = 8 |.efi
885 RAW BIN Align = 16 |.com
886 }
887
888 [Rule.Common.PEI_CORE]
889 FILE PEI_CORE = $(NAMED_GUID) {
890 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
891 UI STRING="$(MODULE_NAME)" Optional
892 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
893 }
894
895 [Rule.Common.PEIM]
896 FILE PEIM = $(NAMED_GUID) {
897 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
898 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
899 UI STRING="$(MODULE_NAME)" Optional
900 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
901 }
902
903 [Rule.Common.PEIM.BINARY]
904 FILE PEIM = $(NAMED_GUID) {
905 PEI_DEPEX PEI_DEPEX Optional |.depex
906 PE32 PE32 Align = Auto |.efi
907 UI STRING="$(MODULE_NAME)" Optional
908 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
909 }
910
911 [Rule.Common.PEIM.BIOSID]
912 FILE PEIM = $(NAMED_GUID) {
913 RAW BIN BiosId.bin
914 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
915 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
916 UI STRING="$(MODULE_NAME)" Optional
917 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
918 }
919
920 [Rule.Common.USER_DEFINED.APINIT]
921 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
922 RAW SEC_BIN |.com
923 }
924 #cjia 2011-07-21
925 [Rule.Common.USER_DEFINED.LEGACY16]
926 FILE FREEFORM = $(NAMED_GUID) {
927 UI STRING="$(MODULE_NAME)" Optional
928 RAW BIN |.bin
929 }
930 #cjia
931
932 [Rule.Common.USER_DEFINED.ASM16]
933 FILE FREEFORM = $(NAMED_GUID) {
934 UI STRING="$(MODULE_NAME)" Optional
935 RAW BIN |.com
936 }
937
938 [Rule.Common.DXE_CORE]
939 FILE DXE_CORE = $(NAMED_GUID) {
940 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
941 UI STRING="$(MODULE_NAME)" Optional
942 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
943 }
944
945 [Rule.Common.UEFI_DRIVER]
946 FILE DRIVER = $(NAMED_GUID) {
947 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
948 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
949 UI STRING="$(MODULE_NAME)" Optional
950 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
951 }
952
953 [Rule.Common.UEFI_DRIVER.BINARY]
954 FILE DRIVER = $(NAMED_GUID) {
955 DXE_DEPEX DXE_DEPEX Optional |.depex
956 PE32 PE32 |.efi
957 UI STRING="$(MODULE_NAME)" Optional
958 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
959 }
960
961 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
962 FILE DRIVER = $(NAMED_GUID) {
963 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
964 PE32 PE32 |.efi
965 UI STRING="$(MODULE_NAME)" Optional
966 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
967 }
968
969 [Rule.Common.DXE_DRIVER]
970 FILE DRIVER = $(NAMED_GUID) {
971 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
972 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
973 UI STRING="$(MODULE_NAME)" Optional
974 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
975 }
976
977 [Rule.Common.DXE_DRIVER.BINARY]
978 FILE DRIVER = $(NAMED_GUID) {
979 DXE_DEPEX DXE_DEPEX Optional |.depex
980 PE32 PE32 |.efi
981 UI STRING="$(MODULE_NAME)" Optional
982 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
983 }
984
985 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
986 FILE DRIVER = $(NAMED_GUID) {
987 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
988 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
989 UI STRING="$(MODULE_NAME)" Optional
990 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
991 RAW ACPI Optional |.acpi
992 RAW ASL Optional |.aml
993 }
994
995 [Rule.Common.DXE_RUNTIME_DRIVER]
996 FILE DRIVER = $(NAMED_GUID) {
997 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
998 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
999 UI STRING="$(MODULE_NAME)" Optional
1000 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1001 }
1002
1003 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
1004 FILE DRIVER = $(NAMED_GUID) {
1005 DXE_DEPEX DXE_DEPEX Optional |.depex
1006 PE32 PE32 |.efi
1007 UI STRING="$(MODULE_NAME)" Optional
1008 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1009 }
1010
1011 [Rule.Common.DXE_SMM_DRIVER]
1012 FILE SMM = $(NAMED_GUID) {
1013 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1014 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1015 UI STRING="$(MODULE_NAME)" Optional
1016 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1017 }
1018
1019 [Rule.Common.DXE_SMM_DRIVER.BINARY]
1020 FILE SMM = $(NAMED_GUID) {
1021 SMM_DEPEX SMM_DEPEX |.depex
1022 PE32 PE32 |.efi
1023 RAW BIN Optional |.aml
1024 UI STRING="$(MODULE_NAME)" Optional
1025 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1026 }
1027
1028 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1029 FILE SMM = $(NAMED_GUID) {
1030 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1031 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1032 UI STRING="$(MODULE_NAME)" Optional
1033 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1034 RAW ACPI Optional |.acpi
1035 RAW ASL Optional |.aml
1036 }
1037
1038 [Rule.Common.SMM_CORE]
1039 FILE SMM_CORE = $(NAMED_GUID) {
1040 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1041 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1042 UI STRING="$(MODULE_NAME)" Optional
1043 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1044 }
1045
1046 [Rule.Common.SMM_CORE.BINARY]
1047 FILE SMM_CORE = $(NAMED_GUID) {
1048 DXE_DEPEX DXE_DEPEX Optional |.depex
1049 PE32 PE32 |.efi
1050 UI STRING="$(MODULE_NAME)" Optional
1051 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1052 }
1053
1054 [Rule.Common.UEFI_APPLICATION]
1055 FILE APPLICATION = $(NAMED_GUID) {
1056 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1057 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1058 UI STRING="$(MODULE_NAME)" Optional
1059 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1060 }
1061
1062 [Rule.Common.UEFI_APPLICATION.UI]
1063 FILE APPLICATION = $(NAMED_GUID) {
1064 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1065 UI STRING="Enter Setup"
1066 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1067 }
1068
1069 [Rule.Common.USER_DEFINED]
1070 FILE FREEFORM = $(NAMED_GUID) {
1071 UI STRING="$(MODULE_NAME)" Optional
1072 RAW BIN |.bin
1073 }
1074
1075 [Rule.Common.USER_DEFINED.ACPITABLE]
1076 FILE FREEFORM = $(NAMED_GUID) {
1077 RAW ACPI Optional |.acpi
1078 RAW ASL Optional |.aml
1079 }
1080
1081 [Rule.Common.USER_DEFINED.ACPITABLE2]
1082 FILE FREEFORM = $(NAMED_GUID) {
1083 RAW ASL Optional |.aml
1084 }
1085
1086 [Rule.Common.ACPITABLE]
1087 FILE FREEFORM = $(NAMED_GUID) {
1088 RAW ACPI Optional |.acpi
1089 RAW ASL Optional |.aml
1090 }
1091