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1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
5 #
6 # SPDX-License-Identifier: BSD-2-Clause-Patent
7 #
8 #
9 #**/
10
11 [Defines]
12 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
13 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
14 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
15 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
16 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
17 DEFINE FLASH_AREA_SIZE = 0x00800000
18
19 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
20 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
21 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
22
23 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
24 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
25
26 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
27 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
28
29
30 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
31 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
32
33 !if $(MINNOW2_FSP_BUILD) == TRUE
34 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
35 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
36 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
37
38 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
39 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
40 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
41
42 !endif
43
44 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
45 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00210000
46
47 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00320000
48 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x00070000
49
50 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
51 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
52
53 ################################################################################
54 #
55 # FD Section
56 # The [FD] Section is made up of the definition statements and a
57 # description of what goes into the Flash Device Image. Each FD section
58 # defines one flash "device" image. A flash device image may be one of
59 # the following: Removable media bootable image (like a boot floppy
60 # image,) an Option ROM image (that would be "flashed" into an add-in
61 # card,) a System "Flash" image (that would be burned into a system's
62 # flash) or an Update ("Capsule") image that will be used to update and
63 # existing system flash.
64 #
65 ################################################################################
66 [FD.Vlv]
67 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
68 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
69 ErasePolarity = 1
70 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
71 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
72
73 #
74 #Flash location override based on actual flash map
75 #
76 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
77 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
78
79 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
80 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
81
82 !if $(MINNOW2_FSP_BUILD) == TRUE
83 # put below PCD value setting into dsc file
84 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
85 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
86 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
87 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
88 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
89 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
90 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
91
92 !endif
93 ################################################################################
94 #
95 # Following are lists of FD Region layout which correspond to the locations of different
96 # images within the flash device.
97 #
98 # Regions must be defined in ascending order and may not overlap.
99 #
100 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
101 # the pipe "|" character, followed by the size of the region, also in hex with the leading
102 # "0x" characters. Like:
103 # Offset|Size
104 # PcdOffsetCName|PcdSizeCName
105 # RegionType <FV, DATA, or FILE>
106 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
107 #
108 ################################################################################
109 #
110 # CPU Microcodes
111 #
112
113 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
114 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
115 FV = MICROCODE_FV
116 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
117 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
118 #NV_VARIABLE_STORE
119 DATA = {
120 ## This is the EFI_FIRMWARE_VOLUME_HEADER
121 # ZeroVector []
122 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
123 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
124 # FileSystemGuid: gEfiSystemNvDataFvGuid =
125 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}
126 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,
127 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,
128 # FvLength: 0x80000
129 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00,
130 #Signature "_FVH" #Attributes
131 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,
132 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision
133 0x48, 0x00, 0x2A, 0x09, 0x00, 0x00, 0x00, 0x02,
134 #Blockmap[0]: 7 Blocks * 0x10000 Bytes / Block
135 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00,
136 #Blockmap[1]: End
137 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
138 ## This is the VARIABLE_STORE_HEADER
139 !if $(SECURE_BOOT_ENABLE) == TRUE
140 #Signature: gEfiAuthenticatedVariableGuid =
141 # { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 }}
142 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,
143 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,
144 !else
145 #Signature: gEfiVariableGuid =
146 # { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}
147 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,
148 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,
149 !endif
150 #Size: 0x3E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x03DFB8
151 # This can speed up the Variable Dispatch a bit.
152 0xB8, 0xDF, 0x03, 0x00,
153 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32
154 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
155 }
156
157
158 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
159 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
160 #NV_FTW_WORKING
161 DATA = {
162 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =
163 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}
164 0x2B, 0x29, 0x58, 0x9E, 0x68, 0x7C, 0x7D, 0x49,
165 0xA0, 0xCE, 0x65, 0x0, 0xFD, 0x9F, 0x1B, 0x95,
166
167 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved
168 0xE2, 0x33, 0xF2, 0x3, 0xFE, 0xFF, 0xFF, 0xFF,
169 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0
170 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
171 }
172
173 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
174 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
175
176 !if $(MINNOW2_FSP_BUILD) == TRUE
177
178 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
179 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
180 FILE = Vlv2SocBinPkg/FspBinary/FvFsp.bin
181
182
183 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
184 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
185
186 !endif
187
188 #
189 # Main Block
190 #
191 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
192 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
193 FV = FVMAIN_COMPACT
194
195 #
196 # FV Recovery#2
197 #
198 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
199 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
200 FV = FVRECOVERY2
201
202 #
203 # FV Recovery
204 #
205 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
206 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
207 FV = FVRECOVERY
208
209 ################################################################################
210 #
211 # FV Section
212 #
213 # [FV] section is used to define what components or modules are placed within a flash
214 # device file. This section also defines order the components and modules are positioned
215 # within the image. The [FV] section consists of define statements, set statements and
216 # module statements.
217 #
218 ################################################################################
219 [FV.MICROCODE_FV]
220 BlockSize = $(FLASH_BLOCK_SIZE)
221 FvAlignment = 16
222 ERASE_POLARITY = 1
223 MEMORY_MAPPED = TRUE
224 STICKY_WRITE = TRUE
225 LOCK_CAP = TRUE
226 LOCK_STATUS = FALSE
227 WRITE_DISABLED_CAP = TRUE
228 WRITE_ENABLED_CAP = TRUE
229 WRITE_STATUS = TRUE
230 WRITE_LOCK_CAP = TRUE
231 WRITE_LOCK_STATUS = TRUE
232 READ_DISABLED_CAP = TRUE
233 READ_ENABLED_CAP = TRUE
234 READ_STATUS = TRUE
235 READ_LOCK_CAP = TRUE
236 READ_LOCK_STATUS = TRUE
237
238 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
239 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
240 }
241
242 !if $(RECOVERY_ENABLE)
243 [FV.FVRECOVERY_COMPONENTS]
244 FvAlignment = 16 #FV alignment and FV attributes setting.
245 ERASE_POLARITY = 1
246 MEMORY_MAPPED = TRUE
247 STICKY_WRITE = TRUE
248 LOCK_CAP = TRUE
249 LOCK_STATUS = TRUE
250 WRITE_DISABLED_CAP = TRUE
251 WRITE_ENABLED_CAP = TRUE
252 WRITE_STATUS = TRUE
253 WRITE_LOCK_CAP = TRUE
254 WRITE_LOCK_STATUS = TRUE
255 READ_DISABLED_CAP = TRUE
256 READ_ENABLED_CAP = TRUE
257 READ_STATUS = TRUE
258 READ_LOCK_CAP = TRUE
259 READ_LOCK_STATUS = TRUE
260
261 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
262 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
263 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
264 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
265 INF FatPkg/FatPei/FatPei.inf
266 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
267 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
268 !endif
269
270 ################################################################################
271 #
272 # FV Section
273 #
274 # [FV] section is used to define what components or modules are placed within a flash
275 # device file. This section also defines order the components and modules are positioned
276 # within the image. The [FV] section consists of define statements, set statements and
277 # module statements.
278 #
279 ################################################################################
280 [FV.FVRECOVERY2]
281 BlockSize = $(FLASH_BLOCK_SIZE)
282 FvAlignment = 16 #FV alignment and FV attributes setting.
283 ERASE_POLARITY = 1
284 MEMORY_MAPPED = TRUE
285 STICKY_WRITE = TRUE
286 LOCK_CAP = TRUE
287 LOCK_STATUS = TRUE
288 WRITE_DISABLED_CAP = TRUE
289 WRITE_ENABLED_CAP = TRUE
290 WRITE_STATUS = TRUE
291 WRITE_LOCK_CAP = TRUE
292 WRITE_LOCK_STATUS = TRUE
293 READ_DISABLED_CAP = TRUE
294 READ_ENABLED_CAP = TRUE
295 READ_STATUS = TRUE
296 READ_LOCK_CAP = TRUE
297 READ_LOCK_STATUS = TRUE
298 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
299
300
301
302 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
303
304 !if $(MINNOW2_FSP_BUILD) == FALSE
305 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
306 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
307 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
308 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
309 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
310 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
311 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
312 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
313 !endif
314
315 # INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
316 !if $(TPM_ENABLED) == TRUE
317 INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
318 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
319 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
320 !endif
321 !if $(FTPM_ENABLE) == TRUE
322 INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
323 !endif
324 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
325
326 !if $(ACPI50_ENABLE) == TRUE
327 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
328 !endif
329 !if $(PERFORMANCE_ENABLE) == TRUE
330 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
331 !endif
332
333 !if $(RECOVERY_ENABLE)
334 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
335 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
336 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
337 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
338 }
339 }
340 !endif
341
342 [FV.FVRECOVERY]
343 BlockSize = $(FLASH_BLOCK_SIZE)
344 FvAlignment = 16 #FV alignment and FV attributes setting.
345 ERASE_POLARITY = 1
346 MEMORY_MAPPED = TRUE
347 STICKY_WRITE = TRUE
348 LOCK_CAP = TRUE
349 LOCK_STATUS = TRUE
350 WRITE_DISABLED_CAP = TRUE
351 WRITE_ENABLED_CAP = TRUE
352 WRITE_STATUS = TRUE
353 WRITE_LOCK_CAP = TRUE
354 WRITE_LOCK_STATUS = TRUE
355 READ_DISABLED_CAP = TRUE
356 READ_ENABLED_CAP = TRUE
357 READ_STATUS = TRUE
358 READ_LOCK_CAP = TRUE
359 READ_LOCK_STATUS = TRUE
360 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
361
362
363 !if $(MINNOW2_FSP_BUILD) == TRUE
364 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
365 !else
366 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
367 !endif
368
369 INF MdeModulePkg/Core/Pei/PeiMain.inf
370 !if $(MINNOW2_FSP_BUILD) == TRUE
371 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
372 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
373 !endif
374 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
375 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
376 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
377
378 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
379
380 !if $(MINNOW2_FSP_BUILD) == FALSE
381 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
382 !endif
383
384 !if $(FTPM_ENABLE) == TRUE
385 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
386 !endif
387
388 !if $(SOURCE_DEBUG_ENABLE) == TRUE
389 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
390 !endif
391
392
393 !if $(CAPSULE_ENABLE) == TRUE
394 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
395 !if $(DXE_ARCHITECTURE) == "X64"
396 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
397 !endif
398 !endif
399
400 !if $(MINNOW2_FSP_BUILD) == FALSE
401 !if $(PCIESC_ENABLE) == TRUE
402 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
403 !endif
404 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
405 !endif
406
407 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
408
409 [FV.FVMAIN]
410 BlockSize = $(FLASH_BLOCK_SIZE)
411 FvAlignment = 16
412 ERASE_POLARITY = 1
413 MEMORY_MAPPED = TRUE
414 STICKY_WRITE = TRUE
415 LOCK_CAP = TRUE
416 LOCK_STATUS = TRUE
417 WRITE_DISABLED_CAP = TRUE
418 WRITE_ENABLED_CAP = TRUE
419 WRITE_STATUS = TRUE
420 WRITE_LOCK_CAP = TRUE
421 WRITE_LOCK_STATUS = TRUE
422 READ_DISABLED_CAP = TRUE
423 READ_ENABLED_CAP = TRUE
424 READ_STATUS = TRUE
425 READ_LOCK_CAP = TRUE
426 READ_LOCK_STATUS = TRUE
427 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
428
429 APRIORI DXE {
430 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
431 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
432 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
433 }
434
435 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
436 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
437 }
438
439 #
440 # EDK II Related Platform codes
441 #
442
443 !if $(MINNOW2_FSP_BUILD) == TRUE
444 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
445 !endif
446
447 INF MdeModulePkg/Core/Dxe/DxeMain.inf
448 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
449 !if $(ACPI50_ENABLE) == TRUE
450 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
451 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
452 !endif
453
454
455 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
456 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
457 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
458 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
459 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
460 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
461 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
462 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
463 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
464 !if $(ARCH) == IA32
465 INF USE=IA32 MdeModulePkg/Logo/Logo.inf
466 !else
467 INF USE=X64 MdeModulePkg/Logo/Logo.inf
468 !endif
469 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
470 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
471 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
472 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
473
474 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
475 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
476 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
477 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
479 !if $(SECURE_BOOT_ENABLE)
480 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
481 !endif
482
483 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
484
485 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
486 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
487 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
488 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
489
490
491 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
492
493 !if $(DATAHUB_ENABLE) == TRUE
494 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
495 !endif
496 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
497 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
498
499 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
500
501 #
502 # EDK II Related Silicon codes
503 #
504 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
505
506 !if $(USE_HPET_TIMER) == TRUE
507 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
508 !else
509 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
510 !endif
511 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
512
513 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
514
515 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
516 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
517
518 !if $(MINNOW2_FSP_BUILD) == FALSE
519 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
520 !endif
521 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
522 !if $(PCIESC_ENABLE) == TRUE
523 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
524 !endif
525
526 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
527 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
528 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
529 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
530 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
531 !if $(MINNOW2_FSP_BUILD) == FALSE
532 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
533 !else
534 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
535 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
536 !endif
537 !if $(MINNOW2_FSP_BUILD) == FALSE
538 !if $(SEC_ENABLE) == TRUE
539 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
540 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
541 !endif
542 !endif
543 !if $(TPM_ENABLED) == TRUE
544 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
545 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
546 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
547 !endif
548 !if $(FTPM_ENABLE) == TRUE
549 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
550 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
551 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
552 INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
553 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
554 !endif
555
556 #
557 # EDK II Related Platform codes
558 #
559 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
560 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
561 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
562 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
563 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
564 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
565 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
566 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
567 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
568 !if $(GOP_DRIVER_ENABLE) == TRUE
569 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
570 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
571 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
572 SECTION PE32 = Vlv2SocBinPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
573 SECTION UI = "IntelGopDriver"
574 }
575 !endif
576
577 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
578 #
579 # SMM
580 #
581 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
582 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
583 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
584
585 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
586 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
587 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
588 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
589
590 #
591 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
592 #
593 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
594 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
595
596 #
597 # ACPI
598 #
599 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
600 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
601 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
602 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
603
604 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
605
606 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
607
608 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
609
610 #
611 # PCI
612 #
613 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
614
615 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
616
617
618 #
619 # ISA
620 #
621 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
622 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
623 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
624 !if $(SOURCE_DEBUG_ENABLE) != TRUE
625 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
626 !endif
627 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
628 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
629
630 #
631 # SDIO
632 #
633 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
634 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
635 #
636 # IDE/SCSI/AHCI
637 #
638 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
639
640 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
641
642 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
643 !if $(SATA_ENABLE) == TRUE
644 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
645 #
646
647 #
648 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
649 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
650 !if $(SCSI_ENABLE) == TRUE
651 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
652 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
653 !endif
654 #
655 !endif
656 # Console
657 #
658 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
659 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
660 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
661 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
662 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
663 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
664 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
665 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
666 #
667 # USB
668 #
669 !if $(USB_ENABLE) == TRUE
670 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
671 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
672 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
673 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
674 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
675 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
676 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
677 !endif
678
679
680 #
681 # SMBIOS
682 #
683 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
684 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
685
686 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
687
688 #
689 # Legacy Modules
690 #
691 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
692
693 #
694 # FAT file system
695 #
696 INF FatPkg/EnhancedFatDxe/Fat.inf
697
698 #
699 # UEFI Shell
700 #
701 INF ShellPkg/Application/Shell/Shell.inf
702
703 #
704 # dp command
705 #
706 !if $(PERFORMANCE_ENABLE) == TRUE
707 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
708 !endif
709
710 !if $(GOP_DRIVER_ENABLE) == TRUE
711 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
712 SECTION RAW = Vlv2SocBinPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
713 SECTION UI = "IntelGopVbt"
714 }
715 !endif
716
717 #
718 # Network Modules
719 #
720 !if $(NETWORK_ENABLE) == TRUE
721 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
722 SECTION PE32 = Vlv2SocBinPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
723 SECTION UI = "UNDI"
724 }
725 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
726 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
727 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
728 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
729 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
730 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
731 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
732 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
733 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
734 INF NetworkPkg/TcpDxe/TcpDxe.inf
735 !if $(NETWORK_IP6_ENABLE) == TRUE
736 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
737 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
738 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
739 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
740 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
741 !endif
742 !if $(NETWORK_VLAN_ENABLE) == TRUE
743 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
744 !endif
745 !if $(NETWORK_ISCSI_ENABLE) == TRUE
746 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
747 !endif
748 !endif
749
750 !if $(CAPSULE_ENABLE)
751 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
752
753 #
754 # Minnow Max System Firmware FMP
755 #
756 INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
757
758 #
759 # Sample Device FMP
760 #
761 INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
762 INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
763 INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
764
765 !endif
766
767 !if $(MICOCODE_CAPSULE_ENABLE)
768 INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
769 !endif
770
771 !if $(RECOVERY_ENABLE)
772 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
773 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
774 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
775 }
776 !endif
777
778 [FV.FVMAIN_COMPACT]
779 BlockSize = $(FLASH_BLOCK_SIZE)
780 FvAlignment = 16
781 ERASE_POLARITY = 1
782 MEMORY_MAPPED = TRUE
783 STICKY_WRITE = TRUE
784 LOCK_CAP = TRUE
785 LOCK_STATUS = TRUE
786 WRITE_DISABLED_CAP = TRUE
787 WRITE_ENABLED_CAP = TRUE
788 WRITE_STATUS = TRUE
789 WRITE_LOCK_CAP = TRUE
790 WRITE_LOCK_STATUS = TRUE
791 READ_DISABLED_CAP = TRUE
792 READ_ENABLED_CAP = TRUE
793 READ_STATUS = TRUE
794 READ_LOCK_CAP = TRUE
795 READ_LOCK_STATUS = TRUE
796
797
798
799 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
800 !if $(LZMA_ENABLE) == TRUE
801 # LZMA Compress
802 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
803 SECTION FV_IMAGE = FVMAIN
804 }
805 !else
806 !if $(DXE_COMPRESS_ENABLE) == TRUE
807 # Tiano Compress
808 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
809 SECTION FV_IMAGE = FVMAIN
810 }
811 !else
812 # No Compress
813 SECTION COMPRESS PI_NONE {
814 SECTION FV_IMAGE = FVMAIN
815 }
816 !endif
817 !endif
818 }
819
820 [FV.SETUP_DATA]
821 BlockSize = $(FLASH_BLOCK_SIZE)
822 #NumBlocks = 0x10
823 FvAlignment = 16
824 ERASE_POLARITY = 1
825 MEMORY_MAPPED = TRUE
826 STICKY_WRITE = TRUE
827 LOCK_CAP = TRUE
828 LOCK_STATUS = TRUE
829 WRITE_DISABLED_CAP = TRUE
830 WRITE_ENABLED_CAP = TRUE
831 WRITE_STATUS = TRUE
832 WRITE_LOCK_CAP = TRUE
833 WRITE_LOCK_STATUS = TRUE
834 READ_DISABLED_CAP = TRUE
835 READ_ENABLED_CAP = TRUE
836 READ_STATUS = TRUE
837 READ_LOCK_CAP = TRUE
838 READ_LOCK_STATUS = TRUE
839
840 ################################################################################
841 #
842 # Rules are use with the [FV] section's module INF type to define
843 # how an FFS file is created for a given INF file. The following Rule are the default
844 # rules for the different module type. User can add the customized rules to define the
845 # content of the FFS file.
846 #
847 ################################################################################
848 [Rule.Common.SEC]
849 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
850 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
851 RAW BIN Align = 16 |.com
852 }
853
854 [Rule.Common.SEC.BINARY]
855 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
856 PE32 PE32 Align = 8 |.efi
857 RAW BIN Align = 16 |.com
858 }
859
860 [Rule.Common.PEI_CORE]
861 FILE PEI_CORE = $(NAMED_GUID) {
862 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
863 UI STRING="$(MODULE_NAME)" Optional
864 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
865 }
866
867 [Rule.Common.PEIM]
868 FILE PEIM = $(NAMED_GUID) {
869 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
870 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
871 UI STRING="$(MODULE_NAME)" Optional
872 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
873 }
874
875 [Rule.Common.PEIM.BINARY]
876 FILE PEIM = $(NAMED_GUID) {
877 PEI_DEPEX PEI_DEPEX Optional |.depex
878 PE32 PE32 Align = Auto |.efi
879 UI STRING="$(MODULE_NAME)" Optional
880 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
881 }
882
883 [Rule.Common.PEIM.BIOSID]
884 FILE PEIM = $(NAMED_GUID) {
885 RAW BIN BiosId.bin
886 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
887 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
888 UI STRING="$(MODULE_NAME)" Optional
889 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
890 }
891
892 [Rule.Common.USER_DEFINED.APINIT]
893 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
894 RAW SEC_BIN |.com
895 }
896 #cjia 2011-07-21
897 [Rule.Common.USER_DEFINED.LEGACY16]
898 FILE FREEFORM = $(NAMED_GUID) {
899 UI STRING="$(MODULE_NAME)" Optional
900 RAW BIN |.bin
901 }
902 #cjia
903
904 [Rule.Common.USER_DEFINED.ASM16]
905 FILE FREEFORM = $(NAMED_GUID) {
906 UI STRING="$(MODULE_NAME)" Optional
907 RAW BIN |.com
908 }
909
910 [Rule.Common.DXE_CORE]
911 FILE DXE_CORE = $(NAMED_GUID) {
912 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
913 UI STRING="$(MODULE_NAME)" Optional
914 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
915 }
916
917 [Rule.Common.UEFI_DRIVER]
918 FILE DRIVER = $(NAMED_GUID) {
919 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
920 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
921 UI STRING="$(MODULE_NAME)" Optional
922 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
923 }
924
925 [Rule.Common.UEFI_DRIVER.BINARY]
926 FILE DRIVER = $(NAMED_GUID) {
927 DXE_DEPEX DXE_DEPEX Optional |.depex
928 PE32 PE32 |.efi
929 UI STRING="$(MODULE_NAME)" Optional
930 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
931 }
932
933 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
934 FILE DRIVER = $(NAMED_GUID) {
935 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
936 PE32 PE32 |.efi
937 UI STRING="$(MODULE_NAME)" Optional
938 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
939 }
940
941 [Rule.Common.DXE_DRIVER]
942 FILE DRIVER = $(NAMED_GUID) {
943 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
944 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
945 UI STRING="$(MODULE_NAME)" Optional
946 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
947 }
948
949 [Rule.Common.DXE_DRIVER.BINARY]
950 FILE DRIVER = $(NAMED_GUID) {
951 DXE_DEPEX DXE_DEPEX Optional |.depex
952 PE32 PE32 |.efi
953 UI STRING="$(MODULE_NAME)" Optional
954 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
955 }
956
957 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
958 FILE DRIVER = $(NAMED_GUID) {
959 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
960 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
961 UI STRING="$(MODULE_NAME)" Optional
962 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
963 RAW ACPI Optional |.acpi
964 RAW ASL Optional |.aml
965 }
966
967 [Rule.Common.DXE_RUNTIME_DRIVER]
968 FILE DRIVER = $(NAMED_GUID) {
969 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
970 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
971 UI STRING="$(MODULE_NAME)" Optional
972 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
973 }
974
975 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
976 FILE DRIVER = $(NAMED_GUID) {
977 DXE_DEPEX DXE_DEPEX Optional |.depex
978 PE32 PE32 |.efi
979 UI STRING="$(MODULE_NAME)" Optional
980 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
981 }
982
983 [Rule.Common.DXE_SMM_DRIVER]
984 FILE SMM = $(NAMED_GUID) {
985 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
986 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
987 UI STRING="$(MODULE_NAME)" Optional
988 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
989 }
990
991 [Rule.Common.DXE_SMM_DRIVER.BINARY]
992 FILE SMM = $(NAMED_GUID) {
993 SMM_DEPEX SMM_DEPEX |.depex
994 PE32 PE32 |.efi
995 RAW BIN Optional |.aml
996 UI STRING="$(MODULE_NAME)" Optional
997 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
998 }
999
1000 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1001 FILE SMM = $(NAMED_GUID) {
1002 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1003 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1004 UI STRING="$(MODULE_NAME)" Optional
1005 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1006 RAW ACPI Optional |.acpi
1007 RAW ASL Optional |.aml
1008 }
1009
1010 [Rule.Common.SMM_CORE]
1011 FILE SMM_CORE = $(NAMED_GUID) {
1012 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1013 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1014 UI STRING="$(MODULE_NAME)" Optional
1015 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1016 }
1017
1018 [Rule.Common.SMM_CORE.BINARY]
1019 FILE SMM_CORE = $(NAMED_GUID) {
1020 DXE_DEPEX DXE_DEPEX Optional |.depex
1021 PE32 PE32 |.efi
1022 UI STRING="$(MODULE_NAME)" Optional
1023 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1024 }
1025
1026 [Rule.Common.UEFI_APPLICATION]
1027 FILE APPLICATION = $(NAMED_GUID) {
1028 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1029 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1030 UI STRING="$(MODULE_NAME)" Optional
1031 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1032 }
1033
1034 [Rule.Common.UEFI_APPLICATION.UI]
1035 FILE APPLICATION = $(NAMED_GUID) {
1036 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1037 UI STRING="Enter Setup"
1038 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1039 }
1040
1041 [Rule.Common.USER_DEFINED]
1042 FILE FREEFORM = $(NAMED_GUID) {
1043 UI STRING="$(MODULE_NAME)" Optional
1044 RAW BIN |.bin
1045 }
1046
1047 [Rule.Common.USER_DEFINED.BINARY]
1048 FILE FREEFORM = $(NAMED_GUID) {
1049 UI STRING="$(MODULE_NAME)" Optional
1050 RAW BIN |.bin
1051 }
1052
1053 [Rule.Common.USER_DEFINED.ACPITABLE]
1054 FILE FREEFORM = $(NAMED_GUID) {
1055 RAW ACPI Optional |.acpi
1056 RAW ASL Optional |.aml
1057 }
1058
1059 [Rule.Common.USER_DEFINED.ACPITABLE2]
1060 FILE FREEFORM = $(NAMED_GUID) {
1061 RAW ASL Optional |.aml
1062 }
1063
1064 [Rule.Common.ACPITABLE]
1065 FILE FREEFORM = $(NAMED_GUID) {
1066 RAW ACPI Optional |.acpi
1067 RAW ASL Optional |.aml
1068 }
1069
1070 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1071 FILE PEIM = $(NAMED_GUID) {
1072 RAW BIN |.acpi
1073 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1074 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1075 UI STRING="$(MODULE_NAME)" Optional
1076 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1077 }