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1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
52
53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
55
56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
58
59 ################################################################################
60 #
61 # FD Section
62 # The [FD] Section is made up of the definition statements and a
63 # description of what goes into the Flash Device Image. Each FD section
64 # defines one flash "device" image. A flash device image may be one of
65 # the following: Removable media bootable image (like a boot floppy
66 # image,) an Option ROM image (that would be "flashed" into an add-in
67 # card,) a System "Flash" image (that would be burned into a system's
68 # flash) or an Update ("Capsule") image that will be used to update and
69 # existing system flash.
70 #
71 ################################################################################
72 [FD.Vlv]
73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75 ErasePolarity = 1
76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79 #
80 #Flash location override based on actual flash map
81 #
82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
86 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
87
88 !if $(MINNOW2_FSP_BUILD) == TRUE
89 # put below PCD value setting into dsc file
90 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
91 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
95 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
96 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
97
98 !endif
99 ################################################################################
100 #
101 # Following are lists of FD Region layout which correspond to the locations of different
102 # images within the flash device.
103 #
104 # Regions must be defined in ascending order and may not overlap.
105 #
106 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
107 # the pipe "|" character, followed by the size of the region, also in hex with the leading
108 # "0x" characters. Like:
109 # Offset|Size
110 # PcdOffsetCName|PcdSizeCName
111 # RegionType <FV, DATA, or FILE>
112 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
113 #
114 ################################################################################
115 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
116 # so we hardcode the default value of variable here.
117 # Please note that we MUST update the binary once the default value is changed.
118
119 #
120 # CPU Microcodes
121 #
122
123 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
124 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
125 FV = MICROCODE_FV
126 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
127 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
128 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
129
130 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
131 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
132 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
133
134 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
135 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
136 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
137
138 !if $(MINNOW2_FSP_BUILD) == TRUE
139
140 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
141 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
142 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
143
144
145 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
146 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
147
148 !endif
149
150 #
151 # Main Block
152 #
153 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
154 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
155 FV = FVMAIN_COMPACT
156
157 #
158 # FV Recovery#2
159 #
160 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
161 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
162 FV = FVRECOVERY2
163
164 #
165 # FV Recovery
166 #
167 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
168 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
169 FV = FVRECOVERY
170
171 ################################################################################
172 #
173 # FV Section
174 #
175 # [FV] section is used to define what components or modules are placed within a flash
176 # device file. This section also defines order the components and modules are positioned
177 # within the image. The [FV] section consists of define statements, set statements and
178 # module statements.
179 #
180 ################################################################################
181 [FV.MICROCODE_FV]
182 BlockSize = $(FLASH_BLOCK_SIZE)
183 FvAlignment = 16
184 ERASE_POLARITY = 1
185 MEMORY_MAPPED = TRUE
186 STICKY_WRITE = TRUE
187 LOCK_CAP = TRUE
188 LOCK_STATUS = FALSE
189 WRITE_DISABLED_CAP = TRUE
190 WRITE_ENABLED_CAP = TRUE
191 WRITE_STATUS = TRUE
192 WRITE_LOCK_CAP = TRUE
193 WRITE_LOCK_STATUS = TRUE
194 READ_DISABLED_CAP = TRUE
195 READ_ENABLED_CAP = TRUE
196 READ_STATUS = TRUE
197 READ_LOCK_CAP = TRUE
198 READ_LOCK_STATUS = TRUE
199
200 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
201 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
202 }
203
204 !if $(RECOVERY_ENABLE)
205 [FV.FVRECOVERY_COMPONENTS]
206 FvAlignment = 16 #FV alignment and FV attributes setting.
207 ERASE_POLARITY = 1
208 MEMORY_MAPPED = TRUE
209 STICKY_WRITE = TRUE
210 LOCK_CAP = TRUE
211 LOCK_STATUS = TRUE
212 WRITE_DISABLED_CAP = TRUE
213 WRITE_ENABLED_CAP = TRUE
214 WRITE_STATUS = TRUE
215 WRITE_LOCK_CAP = TRUE
216 WRITE_LOCK_STATUS = TRUE
217 READ_DISABLED_CAP = TRUE
218 READ_ENABLED_CAP = TRUE
219 READ_STATUS = TRUE
220 READ_LOCK_CAP = TRUE
221 READ_LOCK_STATUS = TRUE
222
223 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
224 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
225 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
226 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
227 INF FatPkg/FatPei/FatPei.inf
228 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
229 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
230 !endif
231
232 ################################################################################
233 #
234 # FV Section
235 #
236 # [FV] section is used to define what components or modules are placed within a flash
237 # device file. This section also defines order the components and modules are positioned
238 # within the image. The [FV] section consists of define statements, set statements and
239 # module statements.
240 #
241 ################################################################################
242 [FV.FVRECOVERY2]
243 BlockSize = $(FLASH_BLOCK_SIZE)
244 FvAlignment = 16 #FV alignment and FV attributes setting.
245 ERASE_POLARITY = 1
246 MEMORY_MAPPED = TRUE
247 STICKY_WRITE = TRUE
248 LOCK_CAP = TRUE
249 LOCK_STATUS = TRUE
250 WRITE_DISABLED_CAP = TRUE
251 WRITE_ENABLED_CAP = TRUE
252 WRITE_STATUS = TRUE
253 WRITE_LOCK_CAP = TRUE
254 WRITE_LOCK_STATUS = TRUE
255 READ_DISABLED_CAP = TRUE
256 READ_ENABLED_CAP = TRUE
257 READ_STATUS = TRUE
258 READ_LOCK_CAP = TRUE
259 READ_LOCK_STATUS = TRUE
260 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
261
262
263
264 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
265
266 !if $(MINNOW2_FSP_BUILD) == FALSE
267 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
268 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
269 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
270 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
271 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
272 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
273 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
274 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
275 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
276 !endif
277
278 # INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
279 !if $(TPM_ENABLED) == TRUE
280 INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
281 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
282 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
283 !endif
284 !if $(FTPM_ENABLE) == TRUE
285 INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
286 !endif
287 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
288
289 !if $(ACPI50_ENABLE) == TRUE
290 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
291 !endif
292 !if $(PERFORMANCE_ENABLE) == TRUE
293 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
294 !endif
295
296 !if $(RECOVERY_ENABLE)
297 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
298 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
299 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
300 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
301 }
302 }
303 !endif
304
305 [FV.FVRECOVERY]
306 BlockSize = $(FLASH_BLOCK_SIZE)
307 FvAlignment = 16 #FV alignment and FV attributes setting.
308 ERASE_POLARITY = 1
309 MEMORY_MAPPED = TRUE
310 STICKY_WRITE = TRUE
311 LOCK_CAP = TRUE
312 LOCK_STATUS = TRUE
313 WRITE_DISABLED_CAP = TRUE
314 WRITE_ENABLED_CAP = TRUE
315 WRITE_STATUS = TRUE
316 WRITE_LOCK_CAP = TRUE
317 WRITE_LOCK_STATUS = TRUE
318 READ_DISABLED_CAP = TRUE
319 READ_ENABLED_CAP = TRUE
320 READ_STATUS = TRUE
321 READ_LOCK_CAP = TRUE
322 READ_LOCK_STATUS = TRUE
323 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
324
325
326 !if $(MINNOW2_FSP_BUILD) == TRUE
327 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
328 !else
329 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
330 !endif
331
332 INF MdeModulePkg/Core/Pei/PeiMain.inf
333 !if $(MINNOW2_FSP_BUILD) == TRUE
334 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
335 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
336 !endif
337 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
338 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
339 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
340
341 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
342
343 !if $(MINNOW2_FSP_BUILD) == FALSE
344 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
345 !endif
346
347 !if $(FTPM_ENABLE) == TRUE
348 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
349 !endif
350
351 !if $(SOURCE_DEBUG_ENABLE) == TRUE
352 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
353 !endif
354
355
356 !if $(CAPSULE_ENABLE) == TRUE
357 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
358 !if $(DXE_ARCHITECTURE) == "X64"
359 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
360 !endif
361 !endif
362
363 !if $(MINNOW2_FSP_BUILD) == FALSE
364 !if $(PCIESC_ENABLE) == TRUE
365 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
366 !endif
367 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
368 !endif
369
370 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
371
372 [FV.FVMAIN]
373 BlockSize = $(FLASH_BLOCK_SIZE)
374 FvAlignment = 16
375 ERASE_POLARITY = 1
376 MEMORY_MAPPED = TRUE
377 STICKY_WRITE = TRUE
378 LOCK_CAP = TRUE
379 LOCK_STATUS = TRUE
380 WRITE_DISABLED_CAP = TRUE
381 WRITE_ENABLED_CAP = TRUE
382 WRITE_STATUS = TRUE
383 WRITE_LOCK_CAP = TRUE
384 WRITE_LOCK_STATUS = TRUE
385 READ_DISABLED_CAP = TRUE
386 READ_ENABLED_CAP = TRUE
387 READ_STATUS = TRUE
388 READ_LOCK_CAP = TRUE
389 READ_LOCK_STATUS = TRUE
390 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
391
392 APRIORI DXE {
393 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
394 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
395 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
396 }
397
398 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
399 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
400 }
401
402 #
403 # EDK II Related Platform codes
404 #
405
406 !if $(MINNOW2_FSP_BUILD) == TRUE
407 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
408 !endif
409
410 INF MdeModulePkg/Core/Dxe/DxeMain.inf
411 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
412 !if $(ACPI50_ENABLE) == TRUE
413 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
414 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
415 !endif
416
417
418 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
419 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
420 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
421 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
422 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
423 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
424 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
425 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
426 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
427 INF USE=X64 MdeModulePkg/Logo/Logo.inf
428 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
429 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
430 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
431 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
432
433 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
434 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
435 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
436 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
437 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
438 !if $(SECURE_BOOT_ENABLE)
439 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
440 !endif
441
442 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
443
444 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
445 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
446 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
447 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
448
449
450 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
451
452 !if $(DATAHUB_ENABLE) == TRUE
453 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
454 !endif
455 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
456 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
457
458 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
459
460 #
461 # EDK II Related Silicon codes
462 #
463 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
464
465 !if $(USE_HPET_TIMER) == TRUE
466 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
467 !else
468 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
469 !endif
470 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
471
472 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
473
474 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
475 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
476
477 !if $(MINNOW2_FSP_BUILD) == FALSE
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
479 !endif
480 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
481 !if $(PCIESC_ENABLE) == TRUE
482 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
483 !endif
484
485 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
486 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
487 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
488 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
489 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
490 !if $(MINNOW2_FSP_BUILD) == FALSE
491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
492 !else
493 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
494 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
495 !endif
496 !if $(MINNOW2_FSP_BUILD) == FALSE
497 !if $(SEC_ENABLE) == TRUE
498 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
499 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
500 !endif
501 !endif
502 !if $(TPM_ENABLED) == TRUE
503 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
504 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
505 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
506 !endif
507 !if $(FTPM_ENABLE) == TRUE
508 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
509 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
510 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
511 INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
512 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
513 !endif
514
515 #
516 # EDK II Related Platform codes
517 #
518 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
519 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
520 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
521 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
522 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
523 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
524 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
525 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
526 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
527 !if $(GOP_DRIVER_ENABLE) == TRUE
528 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
529 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
530 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
531 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
532 SECTION UI = "IntelGopDriver"
533 }
534 !endif
535
536 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
537 #
538 # SMM
539 #
540 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
541 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
542 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
543
544 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
545 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
546 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
547 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
548
549 #
550 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
551 #
552 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
553 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
554
555 #
556 # ACPI
557 #
558 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
559 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
560 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
561 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
562
563 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
564
565 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
566
567 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
568
569 #
570 # PCI
571 #
572 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
573
574 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
575
576
577 #
578 # ISA
579 #
580 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
581 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
582 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
583 !if $(SOURCE_DEBUG_ENABLE) != TRUE
584 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
585 !endif
586 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
587 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
588
589 #
590 # SDIO
591 #
592 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
593 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
594 #
595 # IDE/SCSI/AHCI
596 #
597 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
598
599 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
600
601 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
602 !if $(SATA_ENABLE) == TRUE
603 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
604 #
605
606 #
607 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
608 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
609 !if $(SCSI_ENABLE) == TRUE
610 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
611 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
612 !endif
613 #
614 !endif
615 # Console
616 #
617 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
618 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
619 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
620 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
621 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
622 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
623 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
624 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
625 #
626 # USB
627 #
628 !if $(USB_ENABLE) == TRUE
629 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
630 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
631 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
632 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
633 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
634 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
635 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
636 !endif
637
638 #
639 # ECP
640 #
641 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
642 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
643 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
644 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
645 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
646 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
647 #
648 # SMBIOS
649 #
650 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
651 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
652
653 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
654
655 #
656 # Legacy Modules
657 #
658 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
659
660 #
661 # FAT file system
662 #
663 INF FatPkg/EnhancedFatDxe/Fat.inf
664
665 #
666 # UEFI Shell
667 #
668 INF ShellPkg/Application/Shell/Shell.inf
669
670 #
671 # dp command
672 #
673 !if $(PERFORMANCE_ENABLE) == TRUE
674 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
675 !endif
676
677 !if $(GOP_DRIVER_ENABLE) == TRUE
678 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
679 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
680 SECTION UI = "IntelGopVbt"
681 }
682 !endif
683
684 #
685 # Network Modules
686 #
687 !if $(NETWORK_ENABLE) == TRUE
688 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
689 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
690 SECTION UI = "UNDI"
691 }
692 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
693 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
694 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
695 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
696 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
697 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
698 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
699 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
700 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
701 INF NetworkPkg/TcpDxe/TcpDxe.inf
702 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
703 !if $(NETWORK_IP6_ENABLE) == TRUE
704 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
705 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
706 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
707 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
708 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
709 !endif
710 !if $(NETWORK_VLAN_ENABLE) == TRUE
711 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
712 !endif
713 !if $(NETWORK_ISCSI_ENABLE) == TRUE
714 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
715 !endif
716 !endif
717
718 !if $(CAPSULE_ENABLE)
719 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
720
721 #
722 # Minnow Max System Firmware FMP
723 #
724 INF FILE_GUID = $(FMP_MINNOW_MAX_SYSTEM) FmpDevicePkg/FmpDxe/FmpDxe.inf
725
726 #
727 # Sample Device FMP
728 #
729 INF FILE_GUID = $(FMP_GREEN_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
730 INF FILE_GUID = $(FMP_BLUE_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
731 INF FILE_GUID = $(FMP_RED_SAMPLE_DEVICE) FmpDevicePkg/FmpDxe/FmpDxe.inf
732
733 !endif
734
735 !if $(MICOCODE_CAPSULE_ENABLE)
736 INF IntelSiliconPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
737 !endif
738
739 !if $(RECOVERY_ENABLE)
740 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
741 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
742 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
743 }
744 !endif
745
746 [FV.FVMAIN_COMPACT]
747 BlockSize = $(FLASH_BLOCK_SIZE)
748 FvAlignment = 16
749 ERASE_POLARITY = 1
750 MEMORY_MAPPED = TRUE
751 STICKY_WRITE = TRUE
752 LOCK_CAP = TRUE
753 LOCK_STATUS = TRUE
754 WRITE_DISABLED_CAP = TRUE
755 WRITE_ENABLED_CAP = TRUE
756 WRITE_STATUS = TRUE
757 WRITE_LOCK_CAP = TRUE
758 WRITE_LOCK_STATUS = TRUE
759 READ_DISABLED_CAP = TRUE
760 READ_ENABLED_CAP = TRUE
761 READ_STATUS = TRUE
762 READ_LOCK_CAP = TRUE
763 READ_LOCK_STATUS = TRUE
764
765
766
767 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
768 !if $(LZMA_ENABLE) == TRUE
769 # LZMA Compress
770 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
771 SECTION FV_IMAGE = FVMAIN
772 }
773 !else
774 !if $(DXE_COMPRESS_ENABLE) == TRUE
775 # Tiano Compress
776 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
777 SECTION FV_IMAGE = FVMAIN
778 }
779 !else
780 # No Compress
781 SECTION COMPRESS PI_NONE {
782 SECTION FV_IMAGE = FVMAIN
783 }
784 !endif
785 !endif
786 }
787
788 [FV.SETUP_DATA]
789 BlockSize = $(FLASH_BLOCK_SIZE)
790 #NumBlocks = 0x10
791 FvAlignment = 16
792 ERASE_POLARITY = 1
793 MEMORY_MAPPED = TRUE
794 STICKY_WRITE = TRUE
795 LOCK_CAP = TRUE
796 LOCK_STATUS = TRUE
797 WRITE_DISABLED_CAP = TRUE
798 WRITE_ENABLED_CAP = TRUE
799 WRITE_STATUS = TRUE
800 WRITE_LOCK_CAP = TRUE
801 WRITE_LOCK_STATUS = TRUE
802 READ_DISABLED_CAP = TRUE
803 READ_ENABLED_CAP = TRUE
804 READ_STATUS = TRUE
805 READ_LOCK_CAP = TRUE
806 READ_LOCK_STATUS = TRUE
807
808 ################################################################################
809 #
810 # Rules are use with the [FV] section's module INF type to define
811 # how an FFS file is created for a given INF file. The following Rule are the default
812 # rules for the different module type. User can add the customized rules to define the
813 # content of the FFS file.
814 #
815 ################################################################################
816 [Rule.Common.SEC]
817 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
818 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
819 RAW BIN Align = 16 |.com
820 }
821
822 [Rule.Common.SEC.BINARY]
823 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
824 PE32 PE32 Align = 8 |.efi
825 !if $(MINNOW2_FSP_BUILD) == TRUE
826 RAW RAW |.raw
827 !else
828 RAW BIN Align = 16 |.com
829 !endif
830 }
831
832 [Rule.Common.PEI_CORE]
833 FILE PEI_CORE = $(NAMED_GUID) {
834 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
835 UI STRING="$(MODULE_NAME)" Optional
836 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
837 }
838
839 [Rule.Common.PEIM]
840 FILE PEIM = $(NAMED_GUID) {
841 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
842 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
843 UI STRING="$(MODULE_NAME)" Optional
844 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
845 }
846
847 [Rule.Common.PEIM.BINARY]
848 FILE PEIM = $(NAMED_GUID) {
849 PEI_DEPEX PEI_DEPEX Optional |.depex
850 PE32 PE32 Align = Auto |.efi
851 UI STRING="$(MODULE_NAME)" Optional
852 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
853 }
854
855 [Rule.Common.PEIM.BIOSID]
856 FILE PEIM = $(NAMED_GUID) {
857 RAW BIN BiosId.bin
858 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
859 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
860 UI STRING="$(MODULE_NAME)" Optional
861 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
862 }
863
864 [Rule.Common.USER_DEFINED.APINIT]
865 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
866 RAW SEC_BIN |.com
867 }
868 #cjia 2011-07-21
869 [Rule.Common.USER_DEFINED.LEGACY16]
870 FILE FREEFORM = $(NAMED_GUID) {
871 UI STRING="$(MODULE_NAME)" Optional
872 RAW BIN |.bin
873 }
874 #cjia
875
876 [Rule.Common.USER_DEFINED.ASM16]
877 FILE FREEFORM = $(NAMED_GUID) {
878 UI STRING="$(MODULE_NAME)" Optional
879 RAW BIN |.com
880 }
881
882 [Rule.Common.DXE_CORE]
883 FILE DXE_CORE = $(NAMED_GUID) {
884 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
885 UI STRING="$(MODULE_NAME)" Optional
886 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
887 }
888
889 [Rule.Common.UEFI_DRIVER]
890 FILE DRIVER = $(NAMED_GUID) {
891 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
892 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
893 UI STRING="$(MODULE_NAME)" Optional
894 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
895 }
896
897 [Rule.Common.UEFI_DRIVER.BINARY]
898 FILE DRIVER = $(NAMED_GUID) {
899 DXE_DEPEX DXE_DEPEX Optional |.depex
900 PE32 PE32 |.efi
901 UI STRING="$(MODULE_NAME)" Optional
902 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
903 }
904
905 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
906 FILE DRIVER = $(NAMED_GUID) {
907 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
908 PE32 PE32 |.efi
909 UI STRING="$(MODULE_NAME)" Optional
910 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
911 }
912
913 [Rule.Common.DXE_DRIVER]
914 FILE DRIVER = $(NAMED_GUID) {
915 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
916 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
917 UI STRING="$(MODULE_NAME)" Optional
918 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
919 }
920
921 [Rule.Common.DXE_DRIVER.BINARY]
922 FILE DRIVER = $(NAMED_GUID) {
923 DXE_DEPEX DXE_DEPEX Optional |.depex
924 PE32 PE32 |.efi
925 UI STRING="$(MODULE_NAME)" Optional
926 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
927 }
928
929 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
930 FILE DRIVER = $(NAMED_GUID) {
931 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
932 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
933 UI STRING="$(MODULE_NAME)" Optional
934 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
935 RAW ACPI Optional |.acpi
936 RAW ASL Optional |.aml
937 }
938
939 [Rule.Common.DXE_RUNTIME_DRIVER]
940 FILE DRIVER = $(NAMED_GUID) {
941 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
942 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
943 UI STRING="$(MODULE_NAME)" Optional
944 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
945 }
946
947 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
948 FILE DRIVER = $(NAMED_GUID) {
949 DXE_DEPEX DXE_DEPEX Optional |.depex
950 PE32 PE32 |.efi
951 UI STRING="$(MODULE_NAME)" Optional
952 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
953 }
954
955 [Rule.Common.DXE_SMM_DRIVER]
956 FILE SMM = $(NAMED_GUID) {
957 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
958 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
959 UI STRING="$(MODULE_NAME)" Optional
960 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
961 }
962
963 [Rule.Common.DXE_SMM_DRIVER.BINARY]
964 FILE SMM = $(NAMED_GUID) {
965 SMM_DEPEX SMM_DEPEX |.depex
966 PE32 PE32 |.efi
967 RAW BIN Optional |.aml
968 UI STRING="$(MODULE_NAME)" Optional
969 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
970 }
971
972 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
973 FILE SMM = $(NAMED_GUID) {
974 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
975 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
976 UI STRING="$(MODULE_NAME)" Optional
977 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
978 RAW ACPI Optional |.acpi
979 RAW ASL Optional |.aml
980 }
981
982 [Rule.Common.SMM_CORE]
983 FILE SMM_CORE = $(NAMED_GUID) {
984 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
985 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
986 UI STRING="$(MODULE_NAME)" Optional
987 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
988 }
989
990 [Rule.Common.SMM_CORE.BINARY]
991 FILE SMM_CORE = $(NAMED_GUID) {
992 DXE_DEPEX DXE_DEPEX Optional |.depex
993 PE32 PE32 |.efi
994 UI STRING="$(MODULE_NAME)" Optional
995 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
996 }
997
998 [Rule.Common.UEFI_APPLICATION]
999 FILE APPLICATION = $(NAMED_GUID) {
1000 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1001 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1002 UI STRING="$(MODULE_NAME)" Optional
1003 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1004 }
1005
1006 [Rule.Common.UEFI_APPLICATION.UI]
1007 FILE APPLICATION = $(NAMED_GUID) {
1008 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1009 UI STRING="Enter Setup"
1010 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1011 }
1012
1013 [Rule.Common.USER_DEFINED]
1014 FILE FREEFORM = $(NAMED_GUID) {
1015 UI STRING="$(MODULE_NAME)" Optional
1016 RAW BIN |.bin
1017 }
1018
1019 [Rule.Common.USER_DEFINED.BINARY]
1020 FILE FREEFORM = $(NAMED_GUID) {
1021 UI STRING="$(MODULE_NAME)" Optional
1022 RAW BIN |.bin
1023 }
1024
1025 [Rule.Common.USER_DEFINED.ACPITABLE]
1026 FILE FREEFORM = $(NAMED_GUID) {
1027 RAW ACPI Optional |.acpi
1028 RAW ASL Optional |.aml
1029 }
1030
1031 [Rule.Common.USER_DEFINED.ACPITABLE2]
1032 FILE FREEFORM = $(NAMED_GUID) {
1033 RAW ASL Optional |.aml
1034 }
1035
1036 [Rule.Common.ACPITABLE]
1037 FILE FREEFORM = $(NAMED_GUID) {
1038 RAW ACPI Optional |.acpi
1039 RAW ASL Optional |.aml
1040 }
1041
1042 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1043 FILE PEIM = $(NAMED_GUID) {
1044 RAW BIN |.acpi
1045 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1046 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1047 UI STRING="$(MODULE_NAME)" Optional
1048 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1049 }