Vlv2TbltDevicePkg: Fix build issues in DSC/FDF
[mirror_edk2.git] / Vlv2TbltDevicePkg / PlatformPkgGcc.fdf
1 #/** @file
2 # FDF file of Platform.
3 #
4 # Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.<BR>
5 #
6 # This program and the accompanying materials are licensed and made available under
7 # the terms and conditions of the BSD License that accompanies this distribution.
8 # The full text of the license may be found at
9 # http://opensource.org/licenses/bsd-license.php.
10 #
11 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13 #
14 #
15 #**/
16
17 [Defines]
18 DEFINE FLASH_BASE = 0xFFC00000 #The base address of the 4Mb FLASH Device.
19 DEFINE FLASH_SIZE = 0x00400000 #The flash size in bytes of the 4Mb FLASH Device.
20 DEFINE FLASH_BLOCK_SIZE = 0x1000 #The block size in bytes of the 4Mb FLASH Device.
21 DEFINE FLASH_NUM_BLOCKS = 0x400 #The number of blocks in 4Mb FLASH Device.
22 DEFINE FLASH_AREA_BASE_ADDRESS = 0xFF800000
23 DEFINE FLASH_AREA_SIZE = 0x00800000
24
25 DEFINE FLASH_REGION_VLVMICROCODE_OFFSET = 0x00000000
26 DEFINE FLASH_REGION_VLVMICROCODE_SIZE = 0x00040000
27 DEFINE FLASH_REGION_VLVMICROCODE_BASE = 0xFFC00000
28
29 DEFINE FLASH_REGION_VPD_OFFSET = 0x00040000
30 DEFINE FLASH_REGION_VPD_SIZE = 0x0003E000
31
32 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET = 0x0007E000
33 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE = 0x00002000
34
35
36 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET = 0x00080000
37 DEFINE FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE = 0x00040000
38
39 !if $(MINNOW2_FSP_BUILD) == TRUE
40 DEFINE FLASH_REGION_FSPBIN_OFFSET = 0x000C0000
41 DEFINE FLASH_REGION_FSPBIN_SIZE = 0x00048000
42 DEFINE FLASH_REGION_FSPBIN_BASE = 0xFFCC0000
43
44 DEFINE FLASH_REGION_AZALIABIN_OFFSET = 0x00108000
45 DEFINE FLASH_REGION_AZALIABIN_SIZE = 0x00008000
46 DEFINE FLASH_REGION_AZALIABIN_BASE = 0xFFD08000
47
48 !endif
49
50 DEFINE FLASH_REGION_FVMAIN_OFFSET = 0x00110000
51 DEFINE FLASH_REGION_FVMAIN_SIZE = 0x00215000
52
53 DEFINE FLASH_REGION_FV_RECOVERY2_OFFSET = 0x00325000
54 DEFINE FLASH_REGION_FV_RECOVERY2_SIZE = 0x0006B000
55
56 DEFINE FLASH_REGION_FV_RECOVERY_OFFSET = 0x00390000
57 DEFINE FLASH_REGION_FV_RECOVERY_SIZE = 0x00070000
58
59 ################################################################################
60 #
61 # FD Section
62 # The [FD] Section is made up of the definition statements and a
63 # description of what goes into the Flash Device Image. Each FD section
64 # defines one flash "device" image. A flash device image may be one of
65 # the following: Removable media bootable image (like a boot floppy
66 # image,) an Option ROM image (that would be "flashed" into an add-in
67 # card,) a System "Flash" image (that would be burned into a system's
68 # flash) or an Update ("Capsule") image that will be used to update and
69 # existing system flash.
70 #
71 ################################################################################
72 [FD.Vlv]
73 BaseAddress = $(FLASH_BASE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress #The base address of the 3Mb FLASH Device.
74 Size = $(FLASH_SIZE)|gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize #The flash size in bytes of the 3Mb FLASH Device.
75 ErasePolarity = 1
76 BlockSize = $(FLASH_BLOCK_SIZE) #The block size in bytes of the 3Mb FLASH Device.
77 NumBlocks = $(FLASH_NUM_BLOCKS) #The number of blocks in 3Mb FLASH Device.
78
79 #
80 #Flash location override based on actual flash map
81 #
82 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_AREA_BASE_ADDRESS)
83 SET gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_AREA_SIZE)
84
85 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE) + 0x60
86 SET gUefiCpuPkgTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE) - 0x60
87
88 !if $(MINNOW2_FSP_BUILD) == TRUE
89 # put below PCD value setting into dsc file
90 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress = $(FLASH_REGION_VLVMICROCODE_BASE)
91 #SET gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize = $(FLASH_REGION_VLVMICROCODE_SIZE)
92 #SET gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset = 0x60
93 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress = $(FLASH_AREA_BASE_ADDRESS)
94 #SET gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize = $(FLASH_AREA_SIZE)
95 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase = $(FLASH_REGION_FSPBIN_BASE)
96 #SET gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize = $(FLASH_REGION_FSPBIN_SIZE)
97
98 !endif
99 ################################################################################
100 #
101 # Following are lists of FD Region layout which correspond to the locations of different
102 # images within the flash device.
103 #
104 # Regions must be defined in ascending order and may not overlap.
105 #
106 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
107 # the pipe "|" character, followed by the size of the region, also in hex with the leading
108 # "0x" characters. Like:
109 # Offset|Size
110 # PcdOffsetCName|PcdSizeCName
111 # RegionType <FV, DATA, or FILE>
112 # Fv Size can be adjusted; FVMAIN_COMPACT can be reduced to 0x120000, and FV_RECOVERY can be enlarged to 0x80000
113 #
114 ################################################################################
115 # Since the Fce tool don't have gcc version, we can't handle default variable in Linux,
116 # so we hardcode the default value of variable here.
117 # Please note that we MUST update the binary once the default value is changed.
118
119 #
120 # CPU Microcodes
121 #
122
123 $(FLASH_REGION_VLVMICROCODE_OFFSET)|$(FLASH_REGION_VLVMICROCODE_SIZE)
124 gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeAddress|gPlatformModuleTokenSpaceGuid.PcdFlashMicroCodeSize
125 FV = MICROCODE_FV
126
127 $(FLASH_REGION_VPD_OFFSET)|$(FLASH_REGION_VPD_SIZE)
128 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
129 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageVariable.bin
130
131 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_WORKING_SIZE)
132 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize
133 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwWorking.bin
134
135 $(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_OFFSET)|$(FLASH_REGION_NVSTORAGE_SUBREGION_NV_FTW_SPARE_SIZE)
136 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
137 FILE = $(WORKSPACE)/Vlv2TbltDevicePkg/Stitch/Gcc/NvStorageFtwSpare.bin
138
139 !if $(MINNOW2_FSP_BUILD) == TRUE
140
141 $(FLASH_REGION_FSPBIN_OFFSET)|$(FLASH_REGION_FSPBIN_SIZE)
142 gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize
143 FILE = Vlv2MiscBinariesPkg/FspBinary/FvFsp.bin
144
145
146 $(FLASH_REGION_AZALIABIN_OFFSET)|$(FLASH_REGION_AZALIABIN_SIZE)
147 FILE = Vlv2TbltDevicePkg/FspAzaliaConfigData/AzaliaConfig.bin
148
149 !endif
150
151 #
152 # Main Block
153 #
154 $(FLASH_REGION_FVMAIN_OFFSET)|$(FLASH_REGION_FVMAIN_SIZE)
155 gPlatformModuleTokenSpaceGuid.PcdFlashFvMainBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvMainSize
156 FV = FVMAIN_COMPACT
157
158 #
159 # FV Recovery#2
160 #
161 $(FLASH_REGION_FV_RECOVERY2_OFFSET)|$(FLASH_REGION_FV_RECOVERY2_SIZE)
162 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Base|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecovery2Size
163 FV = FVRECOVERY2
164
165 #
166 # FV Recovery
167 #
168 $(FLASH_REGION_FV_RECOVERY_OFFSET)|$(FLASH_REGION_FV_RECOVERY_SIZE)
169 gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoveryBase|gPlatformModuleTokenSpaceGuid.PcdFlashFvRecoverySize
170 FV = FVRECOVERY
171
172 ################################################################################
173 #
174 # FV Section
175 #
176 # [FV] section is used to define what components or modules are placed within a flash
177 # device file. This section also defines order the components and modules are positioned
178 # within the image. The [FV] section consists of define statements, set statements and
179 # module statements.
180 #
181 ################################################################################
182 [FV.MICROCODE_FV]
183 BlockSize = $(FLASH_BLOCK_SIZE)
184 FvAlignment = 16
185 ERASE_POLARITY = 1
186 MEMORY_MAPPED = TRUE
187 STICKY_WRITE = TRUE
188 LOCK_CAP = TRUE
189 LOCK_STATUS = FALSE
190 WRITE_DISABLED_CAP = TRUE
191 WRITE_ENABLED_CAP = TRUE
192 WRITE_STATUS = TRUE
193 WRITE_LOCK_CAP = TRUE
194 WRITE_LOCK_STATUS = TRUE
195 READ_DISABLED_CAP = TRUE
196 READ_ENABLED_CAP = TRUE
197 READ_STATUS = TRUE
198 READ_LOCK_CAP = TRUE
199 READ_LOCK_STATUS = TRUE
200
201 FILE RAW = 197DB236-F856-4924-90F8-CDF12FB875F3 {
202 $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/MicrocodeUpdates.bin
203 }
204
205 !if $(RECOVERY_ENABLE)
206 [FV.FVRECOVERY_COMPONENTS]
207 FvAlignment = 16 #FV alignment and FV attributes setting.
208 ERASE_POLARITY = 1
209 MEMORY_MAPPED = TRUE
210 STICKY_WRITE = TRUE
211 LOCK_CAP = TRUE
212 LOCK_STATUS = TRUE
213 WRITE_DISABLED_CAP = TRUE
214 WRITE_ENABLED_CAP = TRUE
215 WRITE_STATUS = TRUE
216 WRITE_LOCK_CAP = TRUE
217 WRITE_LOCK_STATUS = TRUE
218 READ_DISABLED_CAP = TRUE
219 READ_ENABLED_CAP = TRUE
220 READ_STATUS = TRUE
221 READ_LOCK_CAP = TRUE
222 READ_LOCK_STATUS = TRUE
223
224 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchUsb.inf
225 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf
226 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf
227 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf
228 INF FatPkg/FatPei/FatPei.inf
229 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf
230 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf
231 !endif
232
233 ################################################################################
234 #
235 # FV Section
236 #
237 # [FV] section is used to define what components or modules are placed within a flash
238 # device file. This section also defines order the components and modules are positioned
239 # within the image. The [FV] section consists of define statements, set statements and
240 # module statements.
241 #
242 ################################################################################
243 [FV.FVRECOVERY2]
244 BlockSize = $(FLASH_BLOCK_SIZE)
245 FvAlignment = 16 #FV alignment and FV attributes setting.
246 ERASE_POLARITY = 1
247 MEMORY_MAPPED = TRUE
248 STICKY_WRITE = TRUE
249 LOCK_CAP = TRUE
250 LOCK_STATUS = TRUE
251 WRITE_DISABLED_CAP = TRUE
252 WRITE_ENABLED_CAP = TRUE
253 WRITE_STATUS = TRUE
254 WRITE_LOCK_CAP = TRUE
255 WRITE_LOCK_STATUS = TRUE
256 READ_DISABLED_CAP = TRUE
257 READ_ENABLED_CAP = TRUE
258 READ_STATUS = TRUE
259 READ_LOCK_CAP = TRUE
260 READ_LOCK_STATUS = TRUE
261 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270092
262
263
264
265 INF $(PLATFORM_PACKAGE)/PlatformInitPei/PlatformInitPei.inf
266
267 !if $(MINNOW2_FSP_BUILD) == FALSE
268 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSmbusArpDisabled.inf
269 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/VlvInitPeim.inf
270 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchInitPeim.inf
271 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchSpiPeim.inf
272 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmAccess.inf
273 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PeiSmmControl.inf
274 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
275 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MpS3.inf
276 INF EdkCompatibilityPkg/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
277 !endif
278
279 # INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PiSmmCommunicationPei.inf
280 !if $(TPM_ENABLED) == TRUE
281 INF SecurityPkg/Tcg/Tcg2Config/Tcg2ConfigPei.inf
282 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf
283 INF SecurityPkg/Tcg/PhysicalPresencePei/PhysicalPresencePei.inf
284 !endif
285 !if $(FTPM_ENABLE) == TRUE
286 INF SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf #use PCD config
287 !endif
288 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
289
290 !if $(ACPI50_ENABLE) == TRUE
291 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf
292 !endif
293 !if $(PERFORMANCE_ENABLE) == TRUE
294 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
295 !endif
296
297 !if $(RECOVERY_ENABLE)
298 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {
299 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}
300 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF { # LZMA COMPRESS GUID
301 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS
302 }
303 }
304 !endif
305
306 [FV.FVRECOVERY]
307 BlockSize = $(FLASH_BLOCK_SIZE)
308 FvAlignment = 16 #FV alignment and FV attributes setting.
309 ERASE_POLARITY = 1
310 MEMORY_MAPPED = TRUE
311 STICKY_WRITE = TRUE
312 LOCK_CAP = TRUE
313 LOCK_STATUS = TRUE
314 WRITE_DISABLED_CAP = TRUE
315 WRITE_ENABLED_CAP = TRUE
316 WRITE_STATUS = TRUE
317 WRITE_LOCK_CAP = TRUE
318 WRITE_LOCK_STATUS = TRUE
319 READ_DISABLED_CAP = TRUE
320 READ_ENABLED_CAP = TRUE
321 READ_STATUS = TRUE
322 READ_LOCK_CAP = TRUE
323 READ_LOCK_STATUS = TRUE
324 FvNameGuid = B73FE497-B92E-416e-8326-45AD0D270091
325
326
327 !if $(MINNOW2_FSP_BUILD) == TRUE
328 INF IntelFspWrapperPkg/FspWrapperSecCore/FspWrapperSecCore.inf
329 !else
330 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SecCore.inf
331 !endif
332
333 INF MdeModulePkg/Core/Pei/PeiMain.inf
334 !if $(MINNOW2_FSP_BUILD) == TRUE
335 INF Vlv2TbltDevicePkg/FspSupport/BootModePei/BootModePei.inf
336 INF IntelFspWrapperPkg/FspInitPei/FspInitPei.inf
337 !endif
338 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/CpuPeim.inf
339 INF MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf
340 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
341
342 INF $(PLATFORM_PACKAGE)/PlatformPei/PlatformPei.inf
343
344 !if $(MINNOW2_FSP_BUILD) == FALSE
345 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/SeCUma.inf
346 !endif
347
348 !if $(FTPM_ENABLE) == TRUE
349 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/fTPMInitPeim.inf
350 !endif
351
352 !if $(SOURCE_DEBUG_ENABLE) == TRUE
353 INF SourceLevelDebugPkg/DebugAgentPei/DebugAgentPei.inf
354 !endif
355
356
357 !if $(CAPSULE_ENABLE) == TRUE
358 INF MdeModulePkg/Universal/CapsulePei/CapsulePei.inf
359 !if $(DXE_ARCHITECTURE) == "X64"
360 INF MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf
361 !endif
362 !endif
363
364 !if $(MINNOW2_FSP_BUILD) == FALSE
365 !if $(PCIESC_ENABLE) == TRUE
366 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/PchEarlyInitPeim.inf
367 !endif
368 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/MemoryInit.inf
369 !endif
370
371 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
372
373 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
374 # FMP image decriptor
375 INF RuleOverride = FMP_IMAGE_DESC Vlv2TbltDevicePkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf
376 !endif
377
378 [FV.FVMAIN]
379 BlockSize = $(FLASH_BLOCK_SIZE)
380 FvAlignment = 16
381 ERASE_POLARITY = 1
382 MEMORY_MAPPED = TRUE
383 STICKY_WRITE = TRUE
384 LOCK_CAP = TRUE
385 LOCK_STATUS = TRUE
386 WRITE_DISABLED_CAP = TRUE
387 WRITE_ENABLED_CAP = TRUE
388 WRITE_STATUS = TRUE
389 WRITE_LOCK_CAP = TRUE
390 WRITE_LOCK_STATUS = TRUE
391 READ_DISABLED_CAP = TRUE
392 READ_ENABLED_CAP = TRUE
393 READ_STATUS = TRUE
394 READ_LOCK_CAP = TRUE
395 READ_LOCK_STATUS = TRUE
396 FvNameGuid = A881D567-6CB0-4eee-8435-2E72D33E45B5
397
398 APRIORI DXE {
399 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
400 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
401 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
402 }
403
404 FILE FREEFORM = C3E36D09-8294-4b97-A857-D5288FE33E28 {
405 SECTION RAW = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/$(DXE_ARCHITECTURE)/BiosId.bin
406 }
407
408 #
409 # EDK II Related Platform codes
410 #
411
412 !if $(MINNOW2_FSP_BUILD) == TRUE
413 INF IntelFspWrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
414 !endif
415
416 INF MdeModulePkg/Core/Dxe/DxeMain.inf
417 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
418 !if $(ACPI50_ENABLE) == TRUE
419 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf
420 INF MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf
421 !endif
422
423
424 INF IntelFrameworkModulePkg/Universal/CpuIoDxe/CpuIoDxe.inf
425 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
426 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
427 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf
428 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
429 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
430 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MpCpu.inf
431 INF $(PLATFORM_PACKAGE)/Metronome/Metronome.inf
432 INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf
433 INF USE=X64 MdeModulePkg/Logo/Logo.inf
434 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
435 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
436 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
437 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf
438
439 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf
440 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
441 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbSmm.inf
442 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
443 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiSmm.inf
444 !if $(SECURE_BOOT_ENABLE)
445 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf
446 !endif
447
448 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
449
450 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
451 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
452 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
453 INF $(PLATFORM_PACKAGE)/FvbRuntimeDxe/FvbRuntimeDxe.inf
454
455
456 INF $(PLATFORM_PACKAGE)/PlatformSetupDxe/PlatformSetupDxe.inf
457
458 !if $(DATAHUB_ENABLE) == TRUE
459 INF IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf
460 !endif
461 INF IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
462 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
463
464 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Dptf.inf
465
466 #
467 # EDK II Related Silicon codes
468 #
469 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchS3SupportDxe.inf
470
471 !if $(USE_HPET_TIMER) == TRUE
472 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
473 !else
474 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmartTimer.inf
475 !endif
476 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmControl.inf
477
478 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmbusDxe.inf
479
480 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/IntelPchLegacyInterrupt.inf
481 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchReset.inf
482
483 !if $(MINNOW2_FSP_BUILD) == FALSE
484 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchInitDxe.inf
485 !endif
486 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSmiDispatcher.inf
487 !if $(PCIESC_ENABLE) == TRUE
488 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPcieSmm.inf
489 !endif
490
491 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchSpiRuntime.inf
492 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchPolicyInitDxe.inf
493 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PchBiosWriteProtect.inf
494 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmmAccess.inf
495 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PciHostBridge.inf
496 !if $(MINNOW2_FSP_BUILD) == FALSE
497 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/VlvInitDxe.inf
498 !else
499 INF IntelFrameworkModulePkg/Universal/LegacyRegionDxe/LegacyRegionDxe.inf
500 INF Vlv2TbltDevicePkg/VlvPlatformInitDxe/VlvPlatformInitDxe.inf
501 !endif
502 !if $(MINNOW2_FSP_BUILD) == FALSE
503 !if $(SEC_ENABLE) == TRUE
504 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/HeciDrv.inf
505 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SeCPolicyInitDxe.inf
506 !endif
507 !endif
508 !if $(TPM_ENABLED) == TRUE
509 INF SecurityPkg/Tcg/TcgConfigDxe/TcgConfigDxe.inf
510 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
511 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
512 !endif
513 !if $(FTPM_ENABLE) == TRUE
514 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/IA32/Tpm2DeviceSeCPei.inf
515 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/Tpm2DeviceSeCDxe.inf
516 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
517 INF SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf
518 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/FtpmSmm.inf
519 !endif
520
521 #
522 # EDK II Related Platform codes
523 #
524 INF $(PLATFORM_PACKAGE)/PlatformSmm/PlatformSmm.inf
525 INF $(PLATFORM_PACKAGE)/PlatformInfoDxe/PlatformInfoDxe.inf
526 INF $(PLATFORM_PACKAGE)/PlatformCpuInfoDxe/PlatformCpuInfoDxe.inf
527 INF $(PLATFORM_PACKAGE)/PlatformDxe/PlatformDxe.inf
528 INF $(PLATFORM_PACKAGE)/PciPlatform/PciPlatform.inf
529 INF $(PLATFORM_PACKAGE)/SaveMemoryConfig/SaveMemoryConfig.inf
530 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PlatformCpuPolicy.inf
531 INF $(PLATFORM_PACKAGE)/PpmPolicy/PpmPolicy.inf
532 INF $(PLATFORM_PACKAGE)/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
533 !if $(GOP_DRIVER_ENABLE) == TRUE
534 INF $(PLATFORM_PACKAGE)/PlatformGopPolicy/PlatformGopPolicy.inf
535 FILE DRIVER = FF0C8745-3270-4439-B74F-3E45F8C77064 {
536 SECTION DXE_DEPEX_EXP = {gPlatformGOPPolicyGuid}
537 SECTION PE32 = Vlv2MiscBinariesPkg/GOP/7.2.1011/RELEASE_VS2008x86/$(DXE_ARCHITECTURE)/IntelGopDriver.efi
538 SECTION UI = "IntelGopDriver"
539 }
540 !endif
541
542 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PnpDxe.inf
543 #
544 # SMM
545 #
546 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
547 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
548 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
549
550 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
551 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
552 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
553 INF $(PLATFORM_PACKAGE)/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
554
555 #
556 # Remove the following two SMM binary modules that prevent platform from booting to UEFI Shell
557 #
558 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/PowerManagement2.inf
559 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/DigitalThermalSensor.inf
560
561 #
562 # ACPI
563 #
564 INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
565 INF $(PLATFORM_PACKAGE)/BootScriptSaveDxe/BootScriptSaveDxe.inf
566 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
567 INF RuleOverride = ACPITABLE2 Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/PowerManagementAcpiTables.inf
568
569 INF RuleOverride = ACPITABLE $(PLATFORM_RC_PACKAGE)/AcpiTablesPCAT/AcpiTables.inf
570
571 INF $(PLATFORM_PACKAGE)/AcpiPlatform/AcpiPlatform.inf
572
573 INF MdeModulePkg/Universal/Acpi/BootGraphicsResourceTableDxe/BootGraphicsResourceTableDxe.inf
574
575 #
576 # PCI
577 #
578 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
579
580 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/ISPDxe.inf
581
582
583 #
584 # ISA
585 #
586 INF $(PLATFORM_PACKAGE)/Wpce791/Wpce791.inf
587 INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
588 INF IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
589 !if $(SOURCE_DEBUG_ENABLE) != TRUE
590 INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf
591 !endif
592 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2MouseDxe/Ps2MouseDxe.inf
593 #INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf
594
595 #
596 # SDIO
597 #
598 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcHost.inf
599 #INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/MmcMediaDevice.inf
600 #
601 # IDE/SCSI/AHCI
602 #
603 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
604
605 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
606
607 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
608 !if $(SATA_ENABLE) == TRUE
609 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SataController.inf
610 #
611
612 #
613 INF MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
614 INF MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
615 !if $(SCSI_ENABLE) == TRUE
616 INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf
617 INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf
618 !endif
619 #
620 !endif
621 # Console
622 #
623 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
624 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
625 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
626 INF IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
627 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
628 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
629 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
630 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf
631 #
632 # USB
633 #
634 !if $(USB_ENABLE) == TRUE
635 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
636 INF MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
637 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
638 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
639 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
640 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
641 INF MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
642 !endif
643
644 #
645 # ECP
646 #
647 INF EdkCompatibilityPkg/Compatibility/LegacyRegion2OnLegacyRegionThunk/LegacyRegion2OnLegacyRegionThunk.inf
648 INF EdkCompatibilityPkg/Compatibility/SmmBaseOnSmmBase2Thunk/SmmBaseOnSmmBase2Thunk.inf
649 INF EdkCompatibilityPkg/Compatibility/SmmBaseHelper/SmmBaseHelper.inf
650 INF EdkCompatibilityPkg/Compatibility/SmmAccess2OnSmmAccessThunk/SmmAccess2OnSmmAccessThunk.inf
651 INF EdkCompatibilityPkg/Compatibility/SmmControl2OnSmmControlThunk/SmmControl2OnSmmControlThunk.inf
652 INF EdkCompatibilityPkg/Compatibility/FvOnFv2Thunk/FvOnFv2Thunk.inf
653 #
654 # SMBIOS
655 #
656 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
657 INF $(PLATFORM_PACKAGE)/SmBiosMiscDxe/SmBiosMiscDxe.inf
658
659 INF RuleOverride = BINARY $(PLATFORM_BINARY_PACKAGE)/$(DXE_ARCHITECTURE)$(TARGET)/$(DXE_ARCHITECTURE)/SmbiosMemory.inf
660
661 #
662 # Legacy Modules
663 #
664 INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
665
666 #
667 # FAT file system
668 #
669 INF FatPkg/EnhancedFatDxe/Fat.inf
670
671 #
672 # UEFI Shell
673 #
674 FILE APPLICATION = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdShellFile) {
675 # SECTION PE32 = EdkShellBinPkg/FullShell/$(EDK_DXE_ARCHITECTURE)/Shell_Full.efi
676 SECTION PE32 = ShellBinPkg/UefiShell/$(EDK_DXE_ARCHITECTURE)/Shell.efi
677 }
678
679 #
680 # dp command
681 #
682 !if $(PERFORMANCE_ENABLE) == TRUE
683 INF ShellPkg/DynamicCommand/DpDynamicCommand/DpDynamicCommand.inf
684 !endif
685
686 !if $(GOP_DRIVER_ENABLE) == TRUE
687 FILE FREEFORM = 878AC2CC-5343-46F2-B563-51F89DAF56BA {
688 SECTION RAW = Vlv2MiscBinariesPkg/GOP/7.2.1011/VBT/MNW2/Vbt.bin
689 SECTION UI = "IntelGopVbt"
690 }
691 !endif
692
693 #
694 # Network Modules
695 #
696 !if $(NETWORK_ENABLE) == TRUE
697 FILE DRIVER = 22DE1691-D65D-456a-993E-A253DD1F308C {
698 SECTION PE32 = Vlv2MiscBinariesPkg/UNDI/RtkUndiDxe/$(DXE_ARCHITECTURE)/RtkUndiDxe.efi
699 SECTION UI = "UNDI"
700 }
701 INF MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf
702 INF MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf
703 INF MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf
704 INF MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf
705 INF MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf
706 INF MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf
707 INF MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf
708 INF MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf
709 !if $(NETWORK_IP6_ENABLE) == TRUE
710 INF NetworkPkg/Ip6Dxe/Ip6Dxe.inf
711 INF NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
712 INF NetworkPkg/IpSecDxe/IpSecDxe.inf
713 INF NetworkPkg/Udp6Dxe/Udp6Dxe.inf
714 INF NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
715 !endif
716 !if $(NETWORK_IP6_ENABLE) == TRUE
717 INF NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
718 INF NetworkPkg/TcpDxe/TcpDxe.inf
719 !else
720 INF MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf
721 INF MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf
722 !endif
723 !if $(NETWORK_VLAN_ENABLE) == TRUE
724 INF MdeModulePkg/Universal/Network/VlanConfigDxe/VlanConfigDxe.inf
725 !endif
726 !if $(NETWORK_ISCSI_ENABLE) == TRUE
727 !if $(NETWORK_IP6_ENABLE) == TRUE
728 INF NetworkPkg/IScsiDxe/IScsiDxe.inf
729 !else
730 INF MdeModulePkg/Universal/Network/IScsiDxe/IScsiDxe.inf
731 !endif
732 !endif
733 !endif
734
735 !if $(CAPSULE_ENABLE) || $(MICOCODE_CAPSULE_ENABLE)
736 INF MdeModulePkg/Universal/EsrtFmpDxe/EsrtFmpDxe.inf
737 !endif
738 !if $(CAPSULE_ENABLE)
739 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf
740 !endif
741 !if $(MICOCODE_CAPSULE_ENABLE)
742 INF UefiCpuPkg/Feature/Capsule/MicrocodeUpdateDxe/MicrocodeUpdateDxe.inf
743 !endif
744
745 !if $(RECOVERY_ENABLE)
746 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) {
747 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin
748 SECTION UI = "Rsa2048Sha256TestSigningPublicKey"
749 }
750 !endif
751
752 !if $(CAPSULE_ENABLE)
753 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) {
754 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer
755 SECTION UI = "Pkcs7TestRoot"
756 }
757 !endif
758
759 [FV.FVMAIN_COMPACT]
760 BlockSize = $(FLASH_BLOCK_SIZE)
761 FvAlignment = 16
762 ERASE_POLARITY = 1
763 MEMORY_MAPPED = TRUE
764 STICKY_WRITE = TRUE
765 LOCK_CAP = TRUE
766 LOCK_STATUS = TRUE
767 WRITE_DISABLED_CAP = TRUE
768 WRITE_ENABLED_CAP = TRUE
769 WRITE_STATUS = TRUE
770 WRITE_LOCK_CAP = TRUE
771 WRITE_LOCK_STATUS = TRUE
772 READ_DISABLED_CAP = TRUE
773 READ_ENABLED_CAP = TRUE
774 READ_STATUS = TRUE
775 READ_LOCK_CAP = TRUE
776 READ_LOCK_STATUS = TRUE
777
778
779
780 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
781 !if $(LZMA_ENABLE) == TRUE
782 # LZMA Compress
783 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
784 SECTION FV_IMAGE = FVMAIN
785 }
786 !else
787 !if $(DXE_COMPRESS_ENABLE) == TRUE
788 # Tiano Compress
789 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
790 SECTION FV_IMAGE = FVMAIN
791 }
792 !else
793 # No Compress
794 SECTION COMPRESS PI_NONE {
795 SECTION FV_IMAGE = FVMAIN
796 }
797 !endif
798 !endif
799 }
800
801 [FV.SETUP_DATA]
802 BlockSize = $(FLASH_BLOCK_SIZE)
803 #NumBlocks = 0x10
804 FvAlignment = 16
805 ERASE_POLARITY = 1
806 MEMORY_MAPPED = TRUE
807 STICKY_WRITE = TRUE
808 LOCK_CAP = TRUE
809 LOCK_STATUS = TRUE
810 WRITE_DISABLED_CAP = TRUE
811 WRITE_ENABLED_CAP = TRUE
812 WRITE_STATUS = TRUE
813 WRITE_LOCK_CAP = TRUE
814 WRITE_LOCK_STATUS = TRUE
815 READ_DISABLED_CAP = TRUE
816 READ_ENABLED_CAP = TRUE
817 READ_STATUS = TRUE
818 READ_LOCK_CAP = TRUE
819 READ_LOCK_STATUS = TRUE
820
821
822 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE)
823 [FV.CapsuleDispatchFv]
824 FvAlignment = 16
825 ERASE_POLARITY = 1
826 MEMORY_MAPPED = TRUE
827 STICKY_WRITE = TRUE
828 LOCK_CAP = TRUE
829 LOCK_STATUS = TRUE
830 WRITE_DISABLED_CAP = TRUE
831 WRITE_ENABLED_CAP = TRUE
832 WRITE_STATUS = TRUE
833 WRITE_LOCK_CAP = TRUE
834 WRITE_LOCK_STATUS = TRUE
835 READ_DISABLED_CAP = TRUE
836 READ_ENABLED_CAP = TRUE
837 READ_STATUS = TRUE
838 READ_LOCK_CAP = TRUE
839 READ_LOCK_STATUS = TRUE
840
841 !if $(CAPSULE_ENABLE)
842 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf
843 !endif
844
845 !endif
846
847 ################################################################################
848 #
849 # Rules are use with the [FV] section's module INF type to define
850 # how an FFS file is created for a given INF file. The following Rule are the default
851 # rules for the different module type. User can add the customized rules to define the
852 # content of the FFS file.
853 #
854 ################################################################################
855 [Rule.Common.SEC]
856 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
857 PE32 PE32 Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
858 RAW BIN Align = 16 |.com
859 }
860
861 [Rule.Common.SEC.BINARY]
862 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
863 PE32 PE32 Align = 8 |.efi
864 !if $(MINNOW2_FSP_BUILD) == TRUE
865 RAW RAW |.raw
866 !else
867 RAW BIN Align = 16 |.com
868 !endif
869 }
870
871 [Rule.Common.PEI_CORE]
872 FILE PEI_CORE = $(NAMED_GUID) {
873 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
874 UI STRING="$(MODULE_NAME)" Optional
875 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
876 }
877
878 [Rule.Common.PEIM]
879 FILE PEIM = $(NAMED_GUID) {
880 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
881 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
882 UI STRING="$(MODULE_NAME)" Optional
883 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
884 }
885
886 [Rule.Common.PEIM.BINARY]
887 FILE PEIM = $(NAMED_GUID) {
888 PEI_DEPEX PEI_DEPEX Optional |.depex
889 PE32 PE32 Align = Auto |.efi
890 UI STRING="$(MODULE_NAME)" Optional
891 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
892 }
893
894 [Rule.Common.PEIM.BIOSID]
895 FILE PEIM = $(NAMED_GUID) {
896 RAW BIN BiosId.bin
897 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
898 PE32 PE32 Align = Auto $(INF_OUTPUT)/$(MODULE_NAME).efi
899 UI STRING="$(MODULE_NAME)" Optional
900 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
901 }
902
903 [Rule.Common.USER_DEFINED.APINIT]
904 FILE RAW = $(NAMED_GUID) Fixed Align=4K {
905 RAW SEC_BIN |.com
906 }
907 #cjia 2011-07-21
908 [Rule.Common.USER_DEFINED.LEGACY16]
909 FILE FREEFORM = $(NAMED_GUID) {
910 UI STRING="$(MODULE_NAME)" Optional
911 RAW BIN |.bin
912 }
913 #cjia
914
915 [Rule.Common.USER_DEFINED.ASM16]
916 FILE FREEFORM = $(NAMED_GUID) {
917 UI STRING="$(MODULE_NAME)" Optional
918 RAW BIN |.com
919 }
920
921 [Rule.Common.DXE_CORE]
922 FILE DXE_CORE = $(NAMED_GUID) {
923 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
924 UI STRING="$(MODULE_NAME)" Optional
925 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
926 }
927
928 [Rule.Common.UEFI_DRIVER]
929 FILE DRIVER = $(NAMED_GUID) {
930 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
931 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
932 UI STRING="$(MODULE_NAME)" Optional
933 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
934 }
935
936 [Rule.Common.UEFI_DRIVER.BINARY]
937 FILE DRIVER = $(NAMED_GUID) {
938 DXE_DEPEX DXE_DEPEX Optional |.depex
939 PE32 PE32 |.efi
940 UI STRING="$(MODULE_NAME)" Optional
941 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
942 }
943
944 [Rule.Common.UEFI_DRIVER.NATIVE_BINARY]
945 FILE DRIVER = $(NAMED_GUID) {
946 DXE_DEPEX DXE_DEPEX Optional $(WORKSPACE)/$(PLATFORM_PACKAGE)/IntelGopDepex/IntelGopDriver.depex
947 PE32 PE32 |.efi
948 UI STRING="$(MODULE_NAME)" Optional
949 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
950 }
951
952 [Rule.Common.DXE_DRIVER]
953 FILE DRIVER = $(NAMED_GUID) {
954 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
955 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
956 UI STRING="$(MODULE_NAME)" Optional
957 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
958 }
959
960 [Rule.Common.DXE_DRIVER.BINARY]
961 FILE DRIVER = $(NAMED_GUID) {
962 DXE_DEPEX DXE_DEPEX Optional |.depex
963 PE32 PE32 |.efi
964 UI STRING="$(MODULE_NAME)" Optional
965 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
966 }
967
968 [Rule.Common.DXE_DRIVER.DRIVER_ACPITABLE]
969 FILE DRIVER = $(NAMED_GUID) {
970 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
971 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
972 UI STRING="$(MODULE_NAME)" Optional
973 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
974 RAW ACPI Optional |.acpi
975 RAW ASL Optional |.aml
976 }
977
978 [Rule.Common.DXE_RUNTIME_DRIVER]
979 FILE DRIVER = $(NAMED_GUID) {
980 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
981 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
982 UI STRING="$(MODULE_NAME)" Optional
983 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
984 }
985
986 [Rule.Common.DXE_RUNTIME_DRIVER.BINARY]
987 FILE DRIVER = $(NAMED_GUID) {
988 DXE_DEPEX DXE_DEPEX Optional |.depex
989 PE32 PE32 |.efi
990 UI STRING="$(MODULE_NAME)" Optional
991 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
992 }
993
994 [Rule.Common.DXE_SMM_DRIVER]
995 FILE SMM = $(NAMED_GUID) {
996 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
997 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
998 UI STRING="$(MODULE_NAME)" Optional
999 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1000 }
1001
1002 [Rule.Common.DXE_SMM_DRIVER.BINARY]
1003 FILE SMM = $(NAMED_GUID) {
1004 SMM_DEPEX SMM_DEPEX |.depex
1005 PE32 PE32 |.efi
1006 RAW BIN Optional |.aml
1007 UI STRING="$(MODULE_NAME)" Optional
1008 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1009 }
1010
1011 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]
1012 FILE SMM = $(NAMED_GUID) {
1013 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1014 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1015 UI STRING="$(MODULE_NAME)" Optional
1016 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1017 RAW ACPI Optional |.acpi
1018 RAW ASL Optional |.aml
1019 }
1020
1021 [Rule.Common.SMM_CORE]
1022 FILE SMM_CORE = $(NAMED_GUID) {
1023 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1024 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1025 UI STRING="$(MODULE_NAME)" Optional
1026 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1027 }
1028
1029 [Rule.Common.SMM_CORE.BINARY]
1030 FILE SMM_CORE = $(NAMED_GUID) {
1031 DXE_DEPEX DXE_DEPEX Optional |.depex
1032 PE32 PE32 |.efi
1033 UI STRING="$(MODULE_NAME)" Optional
1034 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1035 }
1036
1037 [Rule.Common.UEFI_APPLICATION]
1038 FILE APPLICATION = $(NAMED_GUID) {
1039 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1040 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1041 UI STRING="$(MODULE_NAME)" Optional
1042 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1043 }
1044
1045 [Rule.Common.UEFI_APPLICATION.UI]
1046 FILE APPLICATION = $(NAMED_GUID) {
1047 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
1048 UI STRING="Enter Setup"
1049 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1050 }
1051
1052 [Rule.Common.USER_DEFINED]
1053 FILE FREEFORM = $(NAMED_GUID) {
1054 UI STRING="$(MODULE_NAME)" Optional
1055 RAW BIN |.bin
1056 }
1057
1058 [Rule.Common.USER_DEFINED.BINARY]
1059 FILE FREEFORM = $(NAMED_GUID) {
1060 UI STRING="$(MODULE_NAME)" Optional
1061 RAW BIN |.bin
1062 }
1063
1064 [Rule.Common.USER_DEFINED.ACPITABLE]
1065 FILE FREEFORM = $(NAMED_GUID) {
1066 RAW ACPI Optional |.acpi
1067 RAW ASL Optional |.aml
1068 }
1069
1070 [Rule.Common.USER_DEFINED.ACPITABLE2]
1071 FILE FREEFORM = $(NAMED_GUID) {
1072 RAW ASL Optional |.aml
1073 }
1074
1075 [Rule.Common.ACPITABLE]
1076 FILE FREEFORM = $(NAMED_GUID) {
1077 RAW ACPI Optional |.acpi
1078 RAW ASL Optional |.aml
1079 }
1080
1081 [Rule.Common.PEIM.FMP_IMAGE_DESC]
1082 FILE PEIM = $(NAMED_GUID) {
1083 RAW BIN |.acpi
1084 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
1085 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi
1086 UI STRING="$(MODULE_NAME)" Optional
1087 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
1088 }
1089