EmulatorPkg: don't display the cpu current speed

[mirror_edk2.git] / ArmPlatformPkg / ArmPlatformPkg.dec

diff --git a/ArmPlatformPkg/ArmPlatformPkg.dec b/ArmPlatformPkg/ArmPlatformPkg.dec
index 8f32a5e2c14dece225748bd16909521d40304b02..c8ea183313e983ea0dd759cdefccf30021e8cf75 100644 (file)
--- a/ArmPlatformPkg/ArmPlatformPkg.dec
+++ b/ArmPlatformPkg/ArmPlatformPkg.dec
@@ -1,15 +1,9 @@
 #/** @file\r
 #\r
-#  Copyright (c) 2011-2017, ARM Limited. All rights reserved.\r
+#  Copyright (c) 2011-2018, ARM Limited. All rights reserved.\r
 #  Copyright (c) 2015, Intel Corporation. All rights reserved.\r
 #\r
-#  This program and the accompanying materials\r
-#  are licensed and made available under the terms and conditions of the BSD License\r
-#  which accompanies this distribution.  The full text of the license may be found at\r
-#  http://opensource.org/licenses/bsd-license.php\r
-#\r
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 #**/\r
 \r
@@ -36,6 +30,7 @@
   LcdHwLib|Include/Library/LcdHwLib.h\r
   LcdPlatformLib|Include/Library/LcdPlatformLib.h\r
   NorFlashPlatformLib|Include/Library/NorFlashPlatformLib.h\r
+  PL011UartClockLib|Include/Library/PL011UartClockLib.h\r
   PL011UartLib|Include/Library/PL011UartLib.h\r
 \r
 [Guids.common]\r
@@ -69,6 +64,7 @@
   ## SP805 Watchdog\r
   gArmPlatformTokenSpaceGuid.PcdSP805WatchdogBase|0x0|UINT32|0x00000023\r
   gArmPlatformTokenSpaceGuid.PcdSP805WatchdogClockFrequencyInHz|32000|UINT32|0x00000021\r
+  gArmPlatformTokenSpaceGuid.PcdSP805WatchdogInterrupt|0|UINT32|0x0000002E\r
 \r
   ## PL011 UART\r
   gArmPlatformTokenSpaceGuid.PL011UartClkInHz|24000000|UINT32|0x0000001F\r
@@ -89,10 +85,29 @@
   gArmPlatformTokenSpaceGuid.PcdPL111LcdBase|0x0|UINT32|0x00000026\r
   gArmPlatformTokenSpaceGuid.PcdArmHdLcdBase|0x0|UINT32|0x00000027\r
 \r
+  ## Default size for display modes upto 1920x1080 (1920 * 1080 * 4 Bytes Per Pixel)\r
+  gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferSize|0x7E9000|UINT32|0x00000043\r
+  ## If set, framebuffer memory will be reserved and mapped in the system RAM\r
+  gArmPlatformTokenSpaceGuid.PcdArmLcdDdrFrameBufferBase|0x0|UINT64|0x00000044\r
+\r
+  ## ARM Mali Display Processor DP500/DP550/DP650\r
+  gArmPlatformTokenSpaceGuid.PcdArmMaliDpBase|0x0|UINT64|0x00000050\r
+  gArmPlatformTokenSpaceGuid.PcdArmMaliDpMemoryRegionLength|0x0|UINT32|0x00000051\r
+\r
   ## PL180 MCI\r
   gArmPlatformTokenSpaceGuid.PcdPL180SysMciRegAddress|0x00000000|UINT32|0x00000028\r
   gArmPlatformTokenSpaceGuid.PcdPL180MciBaseAddress|0x00000000|UINT32|0x00000029\r
 \r
+  # Graphics Output Pixel format\r
+  # 0 : PixelRedGreenBlueReserved8BitPerColor\r
+  # 1 : PixelBlueGreenRedReserved8BitPerColor\r
+  # 2 : PixelBitMask\r
+  # Default is set to UEFI console font format PixelBlueGreenRedReserved8BitPerColor\r
+  gArmPlatformTokenSpaceGuid.PcdGopPixelFormat|0x00000001|UINT32|0x00000040\r
+\r
+  ## If set, this will swap settings for HDLCD RED_SELECT and BLUE_SELECT registers\r
+  gArmPlatformTokenSpaceGuid.PcdArmHdLcdSwapBlueRedSelect|FALSE|BOOLEAN|0x00000045\r
+\r
 [PcdsFixedAtBuild.common,PcdsDynamic.common]\r
   ## PL031 RealTimeClock\r
   gArmPlatformTokenSpaceGuid.PcdPL031RtcBase|0x0|UINT32|0x00000024\r