]> git.proxmox.com Git - mirror_edk2.git/blobdiff - IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c
Retired PciIncompatibleDeviceSupportLib from IntelFrameworkModulePkg.
[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciCommand.c
index ab9d3a0025e6012c5c265acee6d10eae600694b1..39f5271e9bc142c172692b2886567475d87e2485 100644 (file)
@@ -43,13 +43,13 @@ PciOperateRegister (
   PciIo       = &PciIoDevice->PciIo;\r
 \r
   if (Operation != EFI_SET_REGISTER) {\r
-    Status = PciIoRead (\r
-               PciIo,\r
-               EfiPciIoWidthUint16,\r
-               Offset,\r
-               1,\r
-               &OldCommand\r
-               );\r
+    Status = PciIo->Pci.Read (\r
+                          PciIo,\r
+                          EfiPciIoWidthUint16,\r
+                          Offset,\r
+                          1,\r
+                          &OldCommand\r
+                          );\r
 \r
     if (Operation == EFI_GET_REGISTER) {\r
       *PtrCommand = OldCommand;\r
@@ -65,13 +65,13 @@ PciOperateRegister (
     OldCommand = Command;\r
   }\r
 \r
-  return PciIoWrite (\r
-           PciIo,\r
-           EfiPciIoWidthUint16,\r
-           Offset,\r
-           1,\r
-           &OldCommand\r
-           );\r
+  return PciIo->Pci.Write (\r
+                      PciIo,\r
+                      EfiPciIoWidthUint16,\r
+                      Offset,\r
+                      1,\r
+                      &OldCommand\r
+                      );\r
 }\r
 \r
 /**\r
@@ -134,33 +134,33 @@ LocateCapabilityRegBlock (
     CapabilityPtr = 0;\r
     if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
 \r
-      PciIoRead (\r
-        &PciIoDevice->PciIo,\r
-        EfiPciIoWidthUint8,\r
-        EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
-        1,\r
-        &CapabilityPtr\r
-        );\r
+      PciIoDevice->PciIo.Pci.Read (\r
+                               &PciIoDevice->PciIo,\r
+                               EfiPciIoWidthUint8,\r
+                               EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,\r
+                               1,\r
+                               &CapabilityPtr\r
+                               );\r
     } else {\r
 \r
-      PciIoRead (\r
-        &PciIoDevice->PciIo,\r
-        EfiPciIoWidthUint8,\r
-        PCI_CAPBILITY_POINTER_OFFSET,\r
-        1,\r
-        &CapabilityPtr\r
-        );\r
+      PciIoDevice->PciIo.Pci.Read (\r
+                               &PciIoDevice->PciIo,\r
+                               EfiPciIoWidthUint8,\r
+                               PCI_CAPBILITY_POINTER_OFFSET,\r
+                               1,\r
+                               &CapabilityPtr\r
+                               );\r
     }\r
   }\r
 \r
   while ((CapabilityPtr >= 0x40) && ((CapabilityPtr & 0x03) == 0x00)) {\r
-    PciIoRead (\r
-      &PciIoDevice->PciIo,\r
-      EfiPciIoWidthUint16,\r
-      CapabilityPtr,\r
-      1,\r
-      &CapabilityEntry\r
-      );\r
+    PciIoDevice->PciIo.Pci.Read (\r
+                             &PciIoDevice->PciIo,\r
+                             EfiPciIoWidthUint16,\r
+                             CapabilityPtr,\r
+                             1,\r
+                             &CapabilityEntry\r
+                             );\r
 \r
     CapabilityID = (UINT8) CapabilityEntry;\r
 \r