MdeModulePkg/PciBus: Reserve Bus number for non-root and root HPBs

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / PciBusDxe / PciLib.c

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index bfb7e5bee98ac5edeaae027b32296766cf6cda71..dc1086606f1808af35a9f7d284211a750c289315 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -1,7 +1,7 @@
 /** @file\r
   Internal library implementation for PCI Bus module.\r
 \r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 (C) Copyright 2015 Hewlett Packard Enterprise Development LP<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
@@ -429,7 +429,7 @@ PciHostBridgeResourceAllocator (
       //\r
 \r
       //\r
-      // If non-stardard PCI Bridge I/O window alignment is supported,\r
+      // If non-standard PCI Bridge I/O window alignment is supported,\r
       // set I/O aligment to minimum possible alignment for root bridge.\r
       //\r
       IoBridge = CreateResourceNode (\r
@@ -522,7 +522,7 @@ PciHostBridgeResourceAllocator (
       }\r
 \r
       //\r
-      // Based on the all the resource tree, contruct ACPI resource node to\r
+      // Based on the all the resource tree, construct ACPI resource node to\r
       // submit the resource aperture to pci host bridge protocol\r
       //\r
       Status = ConstructAcpiResourceRequestor (\r
@@ -868,7 +868,7 @@ PciHostBridgeResourceAllocator (
       Resources[2] = PMem32Bridge;\r
       Resources[3] = Mem64Bridge;\r
       Resources[4] = PMem64Bridge;\r
-      DumpResourceMap (RootBridgeDev, Resources, sizeof (Resources) / sizeof (Resources[0]));\r
+      DumpResourceMap (RootBridgeDev, Resources, ARRAY_SIZE (Resources));\r
     );\r
 \r
     FreePool (AcpiConfig);\r
@@ -976,7 +976,8 @@ PciScanBus (
   UINT8                             Device;\r
   UINT8                             Func;\r
   UINT64                            Address;\r
-  UINTN                             SecondBus;\r
+  UINT8                             SecondBus;\r
+  UINT8                             PaddedSubBus;\r
   UINT16                            Register;\r
   UINTN                             HpIndex;\r
   PCI_IO_DEVICE                     *PciDevice;\r
@@ -985,6 +986,7 @@ PciScanBus (
   UINT64                            PciAddress;\r
   EFI_HPC_PADDING_ATTRIBUTES        Attributes;\r
   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *NextDescriptors;\r
   UINT16                            BusRange;\r
   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL   *PciRootBridgeIo;\r
   BOOLEAN                           BusPadding;\r
@@ -1123,14 +1125,14 @@ PciScanBus (
           BusPadding = FALSE;\r
           if (gPciHotPlugInit != NULL) {\r
 \r
-            if (IsRootPciHotPlugBus (PciDevice->DevicePath, &HpIndex)) {\r
+            if (IsPciHotPlugBus (PciDevice)) {\r
 \r
               //\r
               // If it is initialized, get the padded bus range\r
               //\r
               Status = gPciHotPlugInit->GetResourcePadding (\r
                                           gPciHotPlugInit,\r
-                                          gPciRootHpcPool[HpIndex].HpbDevicePath,\r
+                                          PciDevice->DevicePath,\r
                                           PciAddress,\r
                                           &State,\r
                                           (VOID **) &Descriptors,\r
@@ -1142,8 +1144,9 @@ PciScanBus (
               }\r
 \r
               BusRange = 0;\r
+              NextDescriptors = Descriptors;\r
               Status = PciGetBusRange (\r
-                        &Descriptors,\r
+                        &NextDescriptors,\r
                         NULL,\r
                         NULL,\r
                         &BusRange\r
@@ -1151,11 +1154,20 @@ PciScanBus (
 \r
               FreePool (Descriptors);\r
 \r
-              if (EFI_ERROR (Status)) {\r
-                return Status;\r
-              }\r
+              switch (Status) {\r
+                case EFI_SUCCESS:\r
+                  BusPadding = TRUE;\r
+                  break;\r
 \r
-              BusPadding = TRUE;\r
+                case EFI_NOT_FOUND:\r
+                  //\r
+                  // no bus number padding requested\r
+                  //\r
+                  break;\r
+\r
+                default:\r
+                  return Status;\r
+              }\r
             }\r
           }\r
         }\r
@@ -1210,7 +1222,7 @@ PciScanBus (
 \r
           Status = PciScanBus (\r
                     PciDevice,\r
-                    (UINT8) (SecondBus),\r
+                    SecondBus,\r
                     SubBusNumber,\r
                     PaddedBusRange\r
                     );\r
@@ -1226,12 +1238,16 @@ PciScanBus (
           if ((Attributes == EfiPaddingPciRootBridge) &&\r
               (State & EFI_HPC_STATE_ENABLED) != 0    &&\r
               (State & EFI_HPC_STATE_INITIALIZED) != 0) {\r
-            *PaddedBusRange = (UINT8) ((UINT8) (BusRange) +*PaddedBusRange);\r
+            *PaddedBusRange = (UINT8) ((UINT8) (BusRange) + *PaddedBusRange);\r
           } else {\r
-            Status = PciAllocateBusNumber (PciDevice, *SubBusNumber, (UINT8) (BusRange), SubBusNumber);\r
+            //\r
+            // Reserve the larger one between the actual occupied bus number and padded bus number\r
+            //\r
+            Status = PciAllocateBusNumber (PciDevice, SecondBus, (UINT8) (BusRange), &PaddedSubBus);\r
             if (EFI_ERROR (Status)) {\r
               return Status;\r
             }\r
+            *SubBusNumber = MAX (PaddedSubBus, *SubBusNumber);\r
           }\r
         }\r
 \r