+++ /dev/null
-/** @file\r
-Register initialization table for Ich.\r
-\r
-Copyright (c) 2013-2015 Intel Corporation.\r
-\r
-SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-\r
-**/\r
-\r
-\r
-#include "CommonHeader.h"\r
-\r
-VOID\r
-PlatformInitQNCRegs (\r
- VOID\r
- )\r
-{\r
- //\r
- // All devices on bus 0.\r
- // Device 0:\r
- // FNC 0: Host Bridge\r
- // Device 20:\r
- // FNC 0: IOSF2AHB Bridge\r
- // Device 21:\r
- // FNC 0: IOSF2AHB Bridge\r
- // Device 23:\r
- // FNC 0: PCIe Port 0\r
- // Device 24:\r
- // FNC 0: PCIe Port 1\r
-\r
- // Device 31:\r
- // FNC 0: PCI-LPC Bridge\r
- //\r
- S3PciWrite32 (PCI_LIB_ADDRESS (PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, R_QNC_LPC_FWH_BIOS_DEC),\r
- B_QNC_LPC_FWH_BIOS_DEC_F0 | B_QNC_LPC_FWH_BIOS_DEC_F8 |\r
- B_QNC_LPC_FWH_BIOS_DEC_E0 | B_QNC_LPC_FWH_BIOS_DEC_E8 |\r
- B_QNC_LPC_FWH_BIOS_DEC_D0 | B_QNC_LPC_FWH_BIOS_DEC_D8 |\r
- B_QNC_LPC_FWH_BIOS_DEC_C0 | B_QNC_LPC_FWH_BIOS_DEC_C8\r
- );\r
-\r
- //\r
- // Program SCI Interrupt for IRQ9\r
- //\r
- S3PciWrite8 (PCI_LIB_ADDRESS (PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, R_QNC_LPC_ACTL),\r
- V_QNC_LPC_ACTL_SCIS_IRQ9\r
- );\r
-\r
- //\r
- // Program Quark Interrupt Route Registers\r
- //\r
- S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT0IR,\r
- PcdGet16(PcdQuarkAgent0IR)\r
- );\r
- S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT1IR,\r
- PcdGet16(PcdQuarkAgent1IR)\r
- );\r
- S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT2IR,\r
- PcdGet16(PcdQuarkAgent2IR)\r
- );\r
- S3MmioWrite16 ((UINTN)PcdGet64(PcdRcbaMmioBaseAddress) + R_QNC_RCRB_AGENT3IR,\r
- PcdGet16(PcdQuarkAgent3IR)\r
- );\r
-\r
- //\r
- // Program SVID and SID for QNC PCI devices. In order to boost performance, we\r
- // combine two 16 bit PCI_WRITE into one 32 bit PCI_WRITE. The programmed LPC SVID\r
- // will reflect on all internal devices's SVID registers\r
- //\r
- S3PciWrite32 (PCI_LIB_ADDRESS (PCI_BUS_NUMBER_QNC, PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC, R_EFI_PCI_SVID),\r
- (UINT32)(V_INTEL_VENDOR_ID + (QUARK_V_LPC_DEVICE_ID_0 << 16))\r
- );\r
-\r
- //\r
- // Write once on Element Self Description Register before OS boot\r
- //\r
- QNCMmio32And (PcdGet64(PcdRcbaMmioBaseAddress), 0x04, 0xFF00FFFF);\r
-\r
- return;\r
-}\r