support hot plug CPUs. This module can be copied into a CPU specific package\r
and customized if these additional features are required.\r
\r
-Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2015 - 2020, Red Hat, Inc.\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt;\r
\r
if (OldAcpiCpuData != NULL) {\r
- AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable;\r
- AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable;\r
- AcpiCpuData->ApLocation = OldAcpiCpuData->ApLocation;\r
- CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));\r
+ CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));\r
}\r
\r
//\r
support hot plug CPUs. This module can be copied into a CPU specific package\r
and customized if these additional features are required.\r
\r
-Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2015, Red Hat, Inc.\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
AcpiCpuDataEx->IdtrProfile.Base = (UINTN)Idt;\r
\r
if (OldAcpiCpuData != NULL) {\r
- AcpiCpuData->RegisterTable = OldAcpiCpuData->RegisterTable;\r
- AcpiCpuData->PreSmmInitRegisterTable = OldAcpiCpuData->PreSmmInitRegisterTable;\r
- AcpiCpuData->ApLocation = OldAcpiCpuData->ApLocation;\r
- CopyMem (&AcpiCpuData->CpuStatus, &OldAcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));\r
+ CopyMem (&AcpiCpuData->CpuFeatureInitData, &OldAcpiCpuData->CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));\r
}\r
\r
//\r
/** @file\r
Definitions for CPU S3 data.\r
\r
-Copyright (c) 2013 - 2020, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2013 - 2021, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
#ifndef _ACPI_CPU_DATA_H_\r
#define _ACPI_CPU_DATA_H_\r
\r
+//\r
+// This macro definition is used to fix incompatibility issue caused by\r
+// ACPI_CPU_DATA structure update. It will be removed after all the platform\r
+// code uses new ACPI_CPU_DATA structure.\r
+//\r
+#define ACPI_CPU_DATA_STRUCTURE_UPDATE\r
+\r
//\r
// Register types in register table\r
//\r
EFI_PHYSICAL_ADDRESS RegisterTableEntry;\r
} CPU_REGISTER_TABLE;\r
\r
+//\r
+// Data structure that is used for CPU feature initialization during ACPI S3\r
+// resume.\r
+//\r
+typedef struct {\r
+ //\r
+ // Physical address of an array of CPU_REGISTER_TABLE structures, with\r
+ // NumberOfCpus entries. If a register table is not required, then the\r
+ // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.\r
+ // If TableLength is > 0, then elements of RegisterTableEntry are used to\r
+ // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,\r
+ // before SMBASE relocation is performed.\r
+ // If a register table is not required for any one of the CPUs, then\r
+ // PreSmmInitRegisterTable may be set to 0.\r
+ //\r
+ EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;\r
+ //\r
+ // Physical address of an array of CPU_REGISTER_TABLE structures, with\r
+ // NumberOfCpus entries. If a register table is not required, then the\r
+ // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.\r
+ // If TableLength is > 0, then elements of RegisterTableEntry are used to\r
+ // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,\r
+ // after SMBASE relocation is performed.\r
+ // If a register table is not required for any one of the CPUs, then\r
+ // RegisterTable may be set to 0.\r
+ //\r
+ EFI_PHYSICAL_ADDRESS RegisterTable;\r
+ //\r
+ // CPU information which is required when set the register table.\r
+ //\r
+ CPU_STATUS_INFORMATION CpuStatus;\r
+ //\r
+ // Location info for each AP.\r
+ // It points to an array which saves all APs location info.\r
+ // The array count is the AP count in this CPU.\r
+ //\r
+ // If the platform does not support MSR setting at S3 resume, and\r
+ // therefore it doesn't need the dependency semaphores, it should set\r
+ // this field to 0.\r
+ //\r
+ EFI_PHYSICAL_ADDRESS ApLocation;\r
+} CPU_FEATURE_INIT_DATA;\r
+\r
//\r
// Data structure that is required for ACPI S3 resume. The PCD\r
// PcdCpuS3DataAddress must be set to the physical address where this structure\r
//\r
EFI_PHYSICAL_ADDRESS MtrrTable;\r
//\r
- // Physical address of an array of CPU_REGISTER_TABLE structures, with\r
- // NumberOfCpus entries. If a register table is not required, then the\r
- // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.\r
- // If TableLength is > 0, then elements of RegisterTableEntry are used to\r
- // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,\r
- // before SMBASE relocation is performed.\r
- // If a register table is not required for any one of the CPUs, then\r
- // PreSmmInitRegisterTable may be set to 0.\r
- //\r
- EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;\r
- //\r
- // Physical address of an array of CPU_REGISTER_TABLE structures, with\r
- // NumberOfCpus entries. If a register table is not required, then the\r
- // TableLength and AllocatedSize fields of CPU_REGISTER_TABLE are set to 0.\r
- // If TableLength is > 0, then elements of RegisterTableEntry are used to\r
- // initialize the CPU that matches InitialApicId, during an ACPI S3 resume,\r
- // after SMBASE relocation is performed.\r
- // If a register table is not required for any one of the CPUs, then\r
- // RegisterTable may be set to 0.\r
- //\r
- EFI_PHYSICAL_ADDRESS RegisterTable;\r
- //\r
// Physical address of a buffer that contains the machine check handler that\r
// is used during an ACPI S3 Resume. In order for this machine check\r
// handler to be active on an AP during an ACPI S3 resume, the machine check\r
//\r
UINT32 ApMachineCheckHandlerSize;\r
//\r
- // CPU information which is required when set the register table.\r
- //\r
- CPU_STATUS_INFORMATION CpuStatus;\r
- //\r
- // Location info for each AP.\r
- // It points to an array which saves all APs location info.\r
- // The array count is the AP count in this CPU.\r
- //\r
- // If the platform does not support MSR setting at S3 resume, and\r
- // therefore it doesn't need the dependency semaphores, it should set\r
- // this field to 0.\r
+ // Data structure that is used for CPU feature initialization during ACPI S3\r
+ // resume.\r
//\r
- EFI_PHYSICAL_ADDRESS ApLocation;\r
+ CPU_FEATURE_INIT_DATA CpuFeatureInitData;\r
} ACPI_CPU_DATA;\r
\r
#endif\r
/** @file\r
CPU Features Initialize functions.\r
\r
- Copyright (c) 2017 - 2020, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
ASSERT (AcpiCpuData != NULL);\r
CpuFeaturesData->AcpiCpuData= AcpiCpuData;\r
\r
- CpuStatus = &AcpiCpuData->CpuStatus;\r
+ CpuStatus = &AcpiCpuData->CpuFeatureInitData.CpuStatus;\r
Location = AllocateZeroPool (sizeof (EFI_CPU_PHYSICAL_LOCATION) * NumberOfCpus);\r
ASSERT (Location != NULL);\r
- AcpiCpuData->ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)Location;\r
+ AcpiCpuData->CpuFeatureInitData.ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)Location;\r
\r
for (ProcessorNumber = 0; ProcessorNumber < NumberOfCpus; ProcessorNumber++) {\r
InitOrder = &CpuFeaturesData->InitOrder[ProcessorNumber];\r
CpuFeaturesData = (CPU_FEATURES_DATA *) Buffer;\r
AcpiCpuData = CpuFeaturesData->AcpiCpuData;\r
\r
- RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable;\r
+ RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->CpuFeatureInitData.RegisterTable;\r
\r
InitApicId = GetInitialApicId ();\r
RegisterTable = NULL;\r
\r
ProgramProcessorRegister (\r
RegisterTable,\r
- (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation + ProcIndex,\r
- &AcpiCpuData->CpuStatus,\r
+ (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->CpuFeatureInitData.ApLocation + ProcIndex,\r
+ &AcpiCpuData->CpuFeatureInitData.CpuStatus,\r
&CpuFeaturesData->CpuFlags\r
);\r
}\r
AcpiCpuData->NumberOfCpus = (UINT32)NumberOfCpus;\r
}\r
\r
- if (AcpiCpuData->RegisterTable == 0 ||\r
- AcpiCpuData->PreSmmInitRegisterTable == 0) {\r
+ if (AcpiCpuData->CpuFeatureInitData.RegisterTable == 0 ||\r
+ AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable == 0) {\r
//\r
// Allocate buffer for empty RegisterTable and PreSmmInitRegisterTable for all CPUs\r
//\r
RegisterTable[NumberOfCpus + Index].AllocatedSize = 0;\r
RegisterTable[NumberOfCpus + Index].RegisterTableEntry = 0;\r
}\r
- if (AcpiCpuData->RegisterTable == 0) {\r
- AcpiCpuData->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;\r
+ if (AcpiCpuData->CpuFeatureInitData.RegisterTable == 0) {\r
+ AcpiCpuData->CpuFeatureInitData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTable;\r
}\r
- if (AcpiCpuData->PreSmmInitRegisterTable == 0) {\r
- AcpiCpuData->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus);\r
+ if (AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable == 0) {\r
+ AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)(RegisterTable + NumberOfCpus);\r
}\r
}\r
\r
CpuFeaturesData = GetCpuFeaturesData ();\r
if (CpuFeaturesData->RegisterTable == NULL) {\r
AcpiCpuData = GetAcpiCpuData ();\r
- ASSERT ((AcpiCpuData != NULL) && (AcpiCpuData->RegisterTable != 0));\r
- CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->RegisterTable;\r
- CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->PreSmmInitRegisterTable;\r
+ ASSERT ((AcpiCpuData != NULL) && (AcpiCpuData->CpuFeatureInitData.RegisterTable != 0));\r
+ CpuFeaturesData->RegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->CpuFeatureInitData.RegisterTable;\r
+ CpuFeaturesData->PreSmmRegisterTable = (CPU_REGISTER_TABLE *) (UINTN) AcpiCpuData->CpuFeatureInitData.PreSmmInitRegisterTable;\r
}\r
\r
if (PreSmmFlag) {\r
IN BOOLEAN PreSmmRegisterTable\r
)\r
{\r
+ CPU_FEATURE_INIT_DATA *FeatureInitData;\r
CPU_REGISTER_TABLE *RegisterTable;\r
CPU_REGISTER_TABLE *RegisterTables;\r
UINT32 InitApicId;\r
UINTN ProcIndex;\r
UINTN Index;\r
\r
+ FeatureInitData = &mAcpiCpuData.CpuFeatureInitData;\r
+\r
if (PreSmmRegisterTable) {\r
- RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable;\r
+ RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->PreSmmInitRegisterTable;\r
} else {\r
- RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable;\r
+ RegisterTables = (CPU_REGISTER_TABLE *)(UINTN)FeatureInitData->RegisterTable;\r
}\r
if (RegisterTables == NULL) {\r
return;\r
}\r
ASSERT (RegisterTable != NULL);\r
\r
- if (mAcpiCpuData.ApLocation != 0) {\r
+ if (FeatureInitData->ApLocation != 0) {\r
ProgramProcessorRegister (\r
RegisterTable,\r
- (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)mAcpiCpuData.ApLocation + ProcIndex,\r
- &mAcpiCpuData.CpuStatus,\r
+ (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)FeatureInitData->ApLocation + ProcIndex,\r
+ &FeatureInitData->CpuStatus,\r
&mCpuFlags\r
);\r
} else {\r
ProgramProcessorRegister (\r
RegisterTable,\r
NULL,\r
- &mAcpiCpuData.CpuStatus,\r
+ &FeatureInitData->CpuStatus,\r
&mCpuFlags\r
);\r
}\r
return TRUE;\r
}\r
\r
+/**\r
+ Copy the data used to initialize processor register into SMRAM.\r
+\r
+ @param[in,out] CpuFeatureInitDataDst Pointer to the destination CPU_FEATURE_INIT_DATA structure.\r
+ @param[in] CpuFeatureInitDataSrc Pointer to the source CPU_FEATURE_INIT_DATA structure.\r
+\r
+**/\r
+VOID\r
+CopyCpuFeatureInitDatatoSmram (\r
+ IN OUT CPU_FEATURE_INIT_DATA *CpuFeatureInitDataDst,\r
+ IN CPU_FEATURE_INIT_DATA *CpuFeatureInitDataSrc\r
+ )\r
+{\r
+ CPU_STATUS_INFORMATION *CpuStatus;\r
+\r
+ if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus)) {\r
+ CpuFeatureInitDataDst->PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));\r
+ ASSERT (CpuFeatureInitDataDst->PreSmmInitRegisterTable != 0);\r
+\r
+ CopyRegisterTable (\r
+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->PreSmmInitRegisterTable,\r
+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->PreSmmInitRegisterTable,\r
+ mAcpiCpuData.NumberOfCpus\r
+ );\r
+ }\r
+\r
+ if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable, mAcpiCpuData.NumberOfCpus)) {\r
+ CpuFeatureInitDataDst->RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));\r
+ ASSERT (CpuFeatureInitDataDst->RegisterTable != 0);\r
+\r
+ CopyRegisterTable (\r
+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataDst->RegisterTable,\r
+ (CPU_REGISTER_TABLE *)(UINTN)CpuFeatureInitDataSrc->RegisterTable,\r
+ mAcpiCpuData.NumberOfCpus\r
+ );\r
+ }\r
+\r
+ CpuStatus = &CpuFeatureInitDataDst->CpuStatus;\r
+ CopyMem (CpuStatus, &CpuFeatureInitDataSrc->CpuStatus, sizeof (CPU_STATUS_INFORMATION));\r
+\r
+ if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage != 0) {\r
+ CpuStatus->ThreadCountPerPackage = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (\r
+ sizeof (UINT32) * CpuStatus->PackageCount,\r
+ (UINT32 *)(UINTN)CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerPackage\r
+ );\r
+ ASSERT (CpuStatus->ThreadCountPerPackage != 0);\r
+ }\r
+\r
+ if (CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore != 0) {\r
+ CpuStatus->ThreadCountPerCore = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (\r
+ sizeof (UINT8) * (CpuStatus->PackageCount * CpuStatus->MaxCoreCount),\r
+ (UINT32 *)(UINTN)CpuFeatureInitDataSrc->CpuStatus.ThreadCountPerCore\r
+ );\r
+ ASSERT (CpuStatus->ThreadCountPerCore != 0);\r
+ }\r
+\r
+ if (CpuFeatureInitDataSrc->ApLocation != 0) {\r
+ CpuFeatureInitDataDst->ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (\r
+ mAcpiCpuData.NumberOfCpus * sizeof (EFI_CPU_PHYSICAL_LOCATION),\r
+ (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)CpuFeatureInitDataSrc->ApLocation\r
+ );\r
+ ASSERT (CpuFeatureInitDataDst->ApLocation != 0);\r
+ }\r
+}\r
+\r
/**\r
Get ACPI CPU data.\r
\r
\r
CopyMem ((VOID *)(UINTN)mAcpiCpuData.IdtrProfile, (VOID *)(UINTN)AcpiCpuData->IdtrProfile, sizeof (IA32_DESCRIPTOR));\r
\r
- if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable, mAcpiCpuData.NumberOfCpus)) {\r
- mAcpiCpuData.PreSmmInitRegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));\r
- ASSERT (mAcpiCpuData.PreSmmInitRegisterTable != 0);\r
-\r
- CopyRegisterTable (\r
- (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.PreSmmInitRegisterTable,\r
- (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->PreSmmInitRegisterTable,\r
- mAcpiCpuData.NumberOfCpus\r
- );\r
- } else {\r
- mAcpiCpuData.PreSmmInitRegisterTable = 0;\r
- }\r
-\r
- if (!IsRegisterTableEmpty ((CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable, mAcpiCpuData.NumberOfCpus)) {\r
- mAcpiCpuData.RegisterTable = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocatePool (mAcpiCpuData.NumberOfCpus * sizeof (CPU_REGISTER_TABLE));\r
- ASSERT (mAcpiCpuData.RegisterTable != 0);\r
-\r
- CopyRegisterTable (\r
- (CPU_REGISTER_TABLE *)(UINTN)mAcpiCpuData.RegisterTable,\r
- (CPU_REGISTER_TABLE *)(UINTN)AcpiCpuData->RegisterTable,\r
- mAcpiCpuData.NumberOfCpus\r
- );\r
- } else {\r
- mAcpiCpuData.RegisterTable = 0;\r
- }\r
-\r
//\r
// Copy AP's GDT, IDT and Machine Check handler into SMRAM.\r
//\r
Gdtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.GdtrProfile;\r
Idtr = (IA32_DESCRIPTOR *)(UINTN)mAcpiCpuData.IdtrProfile;\r
\r
- GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);\r
+ GdtForAp = AllocatePool ((Gdtr->Limit + 1) + (Idtr->Limit + 1) + mAcpiCpuData.ApMachineCheckHandlerSize);\r
ASSERT (GdtForAp != NULL);\r
IdtForAp = (VOID *) ((UINTN)GdtForAp + (Gdtr->Limit + 1));\r
MachineCheckHandlerForAp = (VOID *) ((UINTN)IdtForAp + (Idtr->Limit + 1));\r
Idtr->Base = (UINTN)IdtForAp;\r
mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;\r
\r
- CpuStatus = &mAcpiCpuData.CpuStatus;\r
- CopyMem (CpuStatus, &AcpiCpuData->CpuStatus, sizeof (CPU_STATUS_INFORMATION));\r
- if (AcpiCpuData->CpuStatus.ThreadCountPerPackage != 0) {\r
- CpuStatus->ThreadCountPerPackage = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (\r
- sizeof (UINT32) * CpuStatus->PackageCount,\r
- (UINT32 *)(UINTN)AcpiCpuData->CpuStatus.ThreadCountPerPackage\r
- );\r
- ASSERT (CpuStatus->ThreadCountPerPackage != 0);\r
- }\r
- if (AcpiCpuData->CpuStatus.ThreadCountPerCore != 0) {\r
- CpuStatus->ThreadCountPerCore = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (\r
- sizeof (UINT8) * (CpuStatus->PackageCount * CpuStatus->MaxCoreCount),\r
- (UINT32 *)(UINTN)AcpiCpuData->CpuStatus.ThreadCountPerCore\r
- );\r
- ASSERT (CpuStatus->ThreadCountPerCore != 0);\r
- }\r
- if (AcpiCpuData->ApLocation != 0) {\r
- mAcpiCpuData.ApLocation = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateCopyPool (\r
- mAcpiCpuData.NumberOfCpus * sizeof (EFI_CPU_PHYSICAL_LOCATION),\r
- (EFI_CPU_PHYSICAL_LOCATION *)(UINTN)AcpiCpuData->ApLocation\r
- );\r
- ASSERT (mAcpiCpuData.ApLocation != 0);\r
- }\r
- if (CpuStatus->PackageCount != 0) {\r
- mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (\r
- sizeof (UINT32) * CpuStatus->PackageCount *\r
- CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
- );\r
- ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);\r
- mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (\r
- sizeof (UINT32) * CpuStatus->PackageCount *\r
- CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
- );\r
- ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);\r
- }\r
+ ZeroMem (&mAcpiCpuData.CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));\r
+ CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);\r
+\r
+ CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;\r
+\r
+ mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (\r
+ sizeof (UINT32) * CpuStatus->PackageCount *\r
+ CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
+ );\r
+ ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);\r
+\r
+ mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (\r
+ sizeof (UINT32) * CpuStatus->PackageCount *\r
+ CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
+ );\r
+ ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);\r
+\r
InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);\r
}\r
\r