/** @file\r
Code for Processor S3 restoration\r
\r
-Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
0xEB, 0xFC // jmp $-2\r
};\r
\r
-CHAR16 *mRegisterTypeStr[] = {L"MSR", L"CR", L"MMIO", L"CACHE", L"SEMAP", L"INVALID" };\r
-\r
/**\r
Sync up the MTRR values for all processors.\r
\r
UINT32 PackageThreadsCount;\r
UINT32 CurrentThread;\r
UINTN ProcessorIndex;\r
- UINTN ThreadIndex;\r
UINTN ValidThreadCount;\r
UINT32 *ValidCoreCountPerPackage;\r
\r
\r
RegisterTableEntry = &RegisterTableEntryHead[Index];\r
\r
- DEBUG_CODE_BEGIN ();\r
- if (ApLocation != NULL) {\r
- AcquireSpinLock (&CpuFlags->ConsoleLogLock);\r
- ThreadIndex = ApLocation->Package * CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount +\r
- ApLocation->Core * CpuStatus->MaxThreadCount +\r
- ApLocation->Thread;\r
- DEBUG ((\r
- DEBUG_INFO,\r
- "Processor = %lu, Entry Index %lu, Type = %s!\n",\r
- (UINT64)ThreadIndex,\r
- (UINT64)Index,\r
- mRegisterTypeStr[MIN ((REGISTER_TYPE)RegisterTableEntry->RegisterType, InvalidReg)]\r
- ));\r
- ReleaseSpinLock (&CpuFlags->ConsoleLogLock);\r
- }\r
- DEBUG_CODE_END ();\r
-\r
//\r
// Check the type of specified register\r
//\r