MdePkg: Expand BaseIoLibIntrinsic (IoLib class) library

The UefiCpuPkg/CpuIo2Dxe driver and the QemuCfgLib library have duplicate
implementations of I/O Fifo routines. This patch clones the I/O Fifo
routines into the BaseIoLibIntrinsic library and expands the IoLib class
to include the ported I/O Fifo routines.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran  <leo.duran@amd.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/MdePkg/Include/Library/IoLib.h b/MdePkg/Include/Library/IoLib.h
index a0dd16bcd5e15c11df3522faa9aaf6eb0e038d0d..b6df4c10b92938c349f3dbfadbf21b6fd479b50a 100644 (file)
--- a/MdePkg/Include/Library/IoLib.h
+++ b/MdePkg/Include/Library/IoLib.h
@@ -2,6 +2,8 @@
   Provide services to access I/O Ports and MMIO registers.\r
 \r
 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
   Provide services to access I/O Ports and MMIO registers.\r
 \r
 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r

+Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r

 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r


@@ -75,6 +77,56 @@ IoWrite8 (
   IN      UINT8                     Value\r
   );\r
 \r
   IN      UINT8                     Value\r
   );\r
 \r

+/**\r
+  Reads an 8-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 8-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  );\r
+\r
+/**\r
+  Writes a block of memory into an 8-bit I/O port fifo.\r
+\r
+  Writes the 8-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  );\r
+\r

 /**\r
   Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r
   result back to the 8-bit I/O port.\r
 /**\r
   Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r
   result back to the 8-bit I/O port.\r


@@ -367,6 +419,56 @@ IoWrite16 (
   IN      UINT16                    Value\r
   );\r
 \r
   IN      UINT16                    Value\r
   );\r
 \r

+/**\r
+  Reads a 16-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 16-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  );\r
+\r
+/**\r
+  Writes a block of memory into a 16-bit I/O port fifo.\r
+\r
+  Writes the 16-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  );\r
+\r

 /**\r
   Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r
   result back to the 16-bit I/O port.\r
 /**\r
   Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r
   result back to the 16-bit I/O port.\r


@@ -668,6 +770,56 @@ IoWrite32 (
   IN      UINT32                    Value\r
   );\r
 \r
   IN      UINT32                    Value\r
   );\r
 \r

+/**\r
+  Reads a 32-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 32-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  );\r
+\r
+/**\r
+  Writes a block of memory into a 32-bit I/O port fifo.\r
+\r
+  Writes the 32-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  );\r
+\r

 /**\r
   Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r
   result back to the 32-bit I/O port.\r
 /**\r
   Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r
   result back to the 32-bit I/O port.\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
index 29b9e8bdfdfac1aa17c72f5368407c43e1f77ae3..8844b1ce4c2bb249c2bc7ce188ef6c86c42fd1e0 100644 (file)
--- a/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+++ b/MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
@@ -8,6 +8,7 @@
 #\r
 #  Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 #\r
 #  Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>\r
 #  Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r

+#  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r

 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r


@@ -16,7 +17,6 @@
 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 #\r
 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 #\r

-#\r

 ##\r
 \r
 [Defines]\r
 ##\r
 \r
 [Defines]\r


@@ -43,12 +43,16 @@
   IoLibMsc.c    | MSFT\r
   IoLibIcc.c    | INTEL\r
   IoLib.c\r
   IoLibMsc.c    | MSFT\r
   IoLibIcc.c    | INTEL\r
   IoLib.c\r

+  Ia32/IoFifo.nasm\r
+  Ia32/IoFifo.asm\r

 \r
 [Sources.X64]\r
   IoLibGcc.c    | GCC\r
   IoLibMsc.c    | MSFT\r
   IoLibIcc.c    | INTEL\r
   IoLib.c\r
 \r
 [Sources.X64]\r
   IoLibGcc.c    | GCC\r
   IoLibMsc.c    | MSFT\r
   IoLibIcc.c    | INTEL\r
   IoLib.c\r

+  X64/IoFifo.nasm\r
+  X64/IoFifo.asm\r

 \r
 [Sources.EBC]\r
   IoLibEbc.c\r
 \r
 [Sources.EBC]\r
   IoLibEbc.c\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
new file mode 100644 (file)
index 0000000..da767d1
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.asm
@@ -0,0 +1,141 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+;\r
+; This program and the accompanying materials are licensed and made available\r
+; under the terms and conditions of the BSD License which accompanies this\r
+; distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .586P\r
+    .model  flat,C\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo8 (\r
+;    IN  UINTN                 Port,\r
+;    IN  UINTN                 Size,\r
+;    OUT VOID                  *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo8 PROC\r
+    push    edi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+rep insb\r
+    pop     edi\r
+    ret\r
+IoReadFifo8 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo16 (\r
+;    IN  UINTN                 Port,\r
+;    IN  UINTN                 Size,\r
+;    OUT VOID                  *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo16 PROC\r
+    push    edi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+rep insw\r
+    pop     edi\r
+    ret\r
+IoReadFifo16 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo32 (\r
+;    IN  UINTN                 Port,\r
+;    IN  UINTN                 Size,\r
+;    OUT VOID                  *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo32 PROC\r
+    push    edi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+rep insd\r
+    pop     edi\r
+    ret\r
+IoReadFifo32 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo8 (\r
+;    IN UINTN                  Port,\r
+;    IN UINTN                  Size,\r
+;    IN VOID                   *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo8 PROC\r
+    push    esi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     esi, [esp + 16]\r
+rep outsb\r
+    pop     esi\r
+    ret\r
+IoWriteFifo8 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo16 (\r
+;    IN UINTN                  Port,\r
+;    IN UINTN                  Size,\r
+;    IN VOID                   *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo16 PROC\r
+    push    esi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     esi, [esp + 16]\r
+rep outsw\r
+    pop     esi\r
+    ret\r
+IoWriteFifo16 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo32 (\r
+;    IN UINTN                  Port,\r
+;    IN UINTN                  Size,\r
+;    IN VOID                   *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo32 PROC\r
+    push    esi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     esi, [esp + 16]\r
+rep outsd\r
+    pop     esi\r
+    ret\r
+IoWriteFifo32 ENDP\r
+\r
+    END\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
new file mode 100644 (file)
index 0000000..bcaa743
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/Ia32/IoFifo.nasm
@@ -0,0 +1,137 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+;\r
+; This program and the accompanying materials are licensed and made available\r
+; under the terms and conditions of the BSD License which accompanies this\r
+; distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    SECTION .text\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo8 (\r
+;    IN  UINTN                 Port,\r
+;    IN  UINTN                 Size,\r
+;    OUT VOID                  *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoReadFifo8)\r
+ASM_PFX(IoReadFifo8):\r
+    push    edi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+rep insb\r
+    pop     edi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo16 (\r
+;    IN  UINTN                 Port,\r
+;    IN  UINTN                 Size,\r
+;    OUT VOID                  *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoReadFifo16)\r
+ASM_PFX(IoReadFifo16):\r
+    push    edi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+rep insw\r
+    pop     edi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo32 (\r
+;    IN  UINTN                 Port,\r
+;    IN  UINTN                 Size,\r
+;    OUT VOID                  *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoReadFifo32)\r
+ASM_PFX(IoReadFifo32):\r
+    push    edi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     edi, [esp + 16]\r
+rep insd\r
+    pop     edi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo8 (\r
+;    IN UINTN                  Port,\r
+;    IN UINTN                  Size,\r
+;    IN VOID                   *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoWriteFifo8)\r
+ASM_PFX(IoWriteFifo8):\r
+    push    esi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     esi, [esp + 16]\r
+rep outsb\r
+    pop     esi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo16 (\r
+;    IN UINTN                  Port,\r
+;    IN UINTN                  Size,\r
+;    IN VOID                   *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoWriteFifo16)\r
+ASM_PFX(IoWriteFifo16):\r
+    push    esi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     esi, [esp + 16]\r
+rep outsw\r
+    pop     esi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo32 (\r
+;    IN UINTN                  Port,\r
+;    IN UINTN                  Size,\r
+;    IN VOID                   *Buffer\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoWriteFifo32)\r
+ASM_PFX(IoWriteFifo32):\r
+    push    esi\r
+    cld\r
+    mov     dx, [esp + 8]\r
+    mov     ecx, [esp + 12]\r
+    mov     esi, [esp + 16]\r
+rep outsd\r
+    pop     esi\r
+    ret\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
index b9f4c5ec65cceaad8a01d90db54a0c0e8e0204eb..5ce12ca56ae283ff154010a31a6497f4c37220ca 100644 (file)
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c
@@ -3,6 +3,8 @@
 \r
   Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
 \r
   Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
   Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r

+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r

   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -221,6 +223,173 @@ IoWrite64 (
   return 0;\r
 }\r
 \r
   return 0;\r
 }\r
 \r

+/**\r
+  Reads an 8-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 8-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into an 8-bit I/O port fifo.\r
+\r
+  Writes the 8-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 16-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 16-bit I/O port fifo.\r
+\r
+  Writes the 16-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 32-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 32-bit I/O port fifo.\r
+\r
+  Writes the 32-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r

 \r
 /**\r
   Reads an 8-bit MMIO register.\r
 \r
 /**\r
   Reads an 8-bit MMIO register.\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
index e12a5ae5d436889cb60d4f03e6a8fb53a1e2f911..dd87190e42c6474e8688f6ad1851fbfb89b89ce5 100644 (file)
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibEbc.c
@@ -4,6 +4,8 @@
   EBC does not support port I/O.  All APIs in this file ASSERT().\r
 \r
   Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
   EBC does not support port I/O.  All APIs in this file ASSERT().\r
 \r
   Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r

+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r

   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -169,3 +171,172 @@ IoWrite32 (
   ASSERT (FALSE);\r
   return 0;\r
 }\r
   ASSERT (FALSE);\r
   return 0;\r
 }\r

+\r
+/**\r
+  Reads an 8-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 8-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into an 8-bit I/O port fifo.\r
+\r
+  Writes the 8-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 16-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 16-bit I/O port fifo.\r
+\r
+  Writes the 16-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 32-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 32-bit I/O port fifo.\r
+\r
+  Writes the 32-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  ASSERT (FALSE);\r
+}\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
index 6b0bf6ab470c31782a1268103415e9c22221f952..e388549b3caa3d418c49dc1e71233e8a208d3f88 100644 (file)
--- a/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
+++ b/MdePkg/Library/BaseIoLibIntrinsic/IoLibIpf.c
@@ -2,6 +2,8 @@
   Common I/O Library routines.\r
 \r
   Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
   Common I/O Library routines.\r
 \r
   Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r

+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r

   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -147,6 +149,7 @@ IoRead64 (
   return 0;\r
 }\r
 \r
   return 0;\r
 }\r
 \r

+\r

 /**\r
   Writes an 8-bit I/O port.\r
 \r
 /**\r
   Writes an 8-bit I/O port.\r
 \r


@@ -251,6 +254,204 @@ IoWrite64 (
   return 0;\r
 }\r
 \r
   return 0;\r
 }\r
 \r

+/**\r
+  Reads an 8-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 8-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  UINT8 *Buffer8;\r
+\r
+  Buffer8 = (UINT8 *)Buffer;\r
+  while (Count--) {\r
+    *Buffer8++ = IoRead8 (Port);\r
+  }\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 16-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  UINT16 *Buffer16;\r
+\r
+  Buffer16 = (UINT16 *)Buffer;\r
+  while (Count--) {\r
+    *Buffer16++ = IoRead16 (Port);\r
+  }\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 32-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  UINT32 *Buffer32;\r
+\r
+  Buffer32 = (UINT32 *)Buffer;\r
+  while (Count--) {\r
+    *Buffer32++ = IoRead32 (Port);\r
+  }\r
+}\r
+\r
+/**\r
+  Writes a block of memory into an 8-bit I/O port fifo.\r
+\r
+  Writes the 8-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  UINT8 *Buffer8;\r
+\r
+  Buffer8 = (UINT8 *)Buffer;\r
+  while (Count--) {\r
+    IoWrite8 (Port, *Buffer8++);\r
+  }\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 16-bit I/O port fifo.\r
+\r
+  Writes the 16-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  UINT16 *Buffer16;\r
+\r
+  Buffer16 = (UINT16 *)Buffer;\r
+  while (Count--) {\r
+    IoWrite16 (Port, *Buffer16++);\r
+  }\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 32-bit I/O port fifo.\r
+\r
+  Writes the 32-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  UINT32 *Buffer32;\r
+\r
+  Buffer32 = (UINT32 *)Buffer;\r
+  while (Count--) {\r
+    IoWrite32 (Port, *Buffer32++);\r
+  }\r
+}\r
+\r

 /**\r
   Reads an 8-bit MMIO register.\r
 \r
 /**\r
   Reads an 8-bit MMIO register.\r
 \r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
new file mode 100644 (file)
index 0000000..87c6107
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.asm
@@ -0,0 +1,127 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+;\r
+; This program and the accompanying materials are licensed and made available\r
+; under the terms and conditions of the BSD License which accompanies this\r
+; distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    .code\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo8 (\r
+;    IN  UINTN                 Port,              // rcx\r
+;    IN  UINTN                 Size,              // rdx\r
+;    OUT VOID                  *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo8 PROC\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi\r
+rep insb\r
+    mov     rdi, r8             ; restore rdi\r
+    ret\r
+IoReadFifo8 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo16 (\r
+;    IN  UINTN                 Port,              // rcx\r
+;    IN  UINTN                 Size,              // rdx\r
+;    OUT VOID                  *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo16 PROC\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi\r
+rep insw\r
+    mov     rdi, r8             ; restore rdi\r
+    ret\r
+IoReadFifo16 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo32 (\r
+;    IN  UINTN                 Port,              // rcx\r
+;    IN  UINTN                 Size,              // rdx\r
+;    OUT VOID                  *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoReadFifo32 PROC\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi\r
+rep insd\r
+    mov     rdi, r8             ; restore rdi\r
+    ret\r
+IoReadFifo32 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo8 (\r
+;    IN UINTN                  Port,              // rcx\r
+;    IN UINTN                  Size,              // rdx\r
+;    IN VOID                   *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo8 PROC\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi\r
+rep outsb\r
+    mov     rsi, r8             ; restore rsi\r
+    ret\r
+IoWriteFifo8 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo16 (\r
+;    IN UINTN                  Port,              // rcx\r
+;    IN UINTN                  Size,              // rdx\r
+;    IN VOID                   *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo16 PROC\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi\r
+rep outsw\r
+    mov     rsi, r8             ; restore rsi\r
+    ret\r
+IoWriteFifo16 ENDP\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo32 (\r
+;    IN UINTN                  Port,              // rcx\r
+;    IN UINTN                  Size,              // rdx\r
+;    IN VOID                   *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+IoWriteFifo32 PROC\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi\r
+rep outsd\r
+    mov     rsi, r8             ; restore rsi\r
+    ret\r
+IoWriteFifo32 ENDP\r
+\r
+    END\r
+\r

diff --git a/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
new file mode 100644 (file)
index 0000000..7bd72d0
--- /dev/null
+++ b/MdePkg/Library/BaseIoLibIntrinsic/X64/IoFifo.nasm
@@ -0,0 +1,126 @@
+;------------------------------------------------------------------------------\r
+;\r
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+;\r
+; This program and the accompanying materials are licensed and made available\r
+; under the terms and conditions of the BSD License which accompanies this\r
+; distribution.  The full text of the license may be found at\r
+; http://opensource.org/licenses/bsd-license.php.\r
+;\r
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+;\r
+;------------------------------------------------------------------------------\r
+\r
+    DEFAULT REL\r
+    SECTION .text\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo8 (\r
+;    IN  UINTN                 Port,              // rcx\r
+;    IN  UINTN                 Size,              // rdx\r
+;    OUT VOID                  *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoReadFifo8)\r
+ASM_PFX(IoReadFifo8):\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi\r
+rep insb\r
+    mov     rdi, r8             ; restore rdi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo16 (\r
+;    IN  UINTN                 Port,              // rcx\r
+;    IN  UINTN                 Size,              // rdx\r
+;    OUT VOID                  *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoReadFifo16)\r
+ASM_PFX(IoReadFifo16):\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi\r
+rep insw\r
+    mov     rdi, r8             ; restore rdi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoReadFifo32 (\r
+;    IN  UINTN                 Port,              // rcx\r
+;    IN  UINTN                 Size,              // rdx\r
+;    OUT VOID                  *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoReadFifo32)\r
+ASM_PFX(IoReadFifo32):\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rdi, r8             ; rdi: buffer address; r8: save rdi\r
+rep insd\r
+    mov     rdi, r8             ; restore rdi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo8 (\r
+;    IN UINTN                  Port,              // rcx\r
+;    IN UINTN                  Size,              // rdx\r
+;    IN VOID                   *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoWriteFifo8)\r
+ASM_PFX(IoWriteFifo8):\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi\r
+rep outsb\r
+    mov     rsi, r8             ; restore rsi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo16 (\r
+;    IN UINTN                  Port,              // rcx\r
+;    IN UINTN                  Size,              // rdx\r
+;    IN VOID                   *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoWriteFifo16)\r
+ASM_PFX(IoWriteFifo16):\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi\r
+rep outsw\r
+    mov     rsi, r8             ; restore rsi\r
+    ret\r
+\r
+;------------------------------------------------------------------------------\r
+;  VOID\r
+;  EFIAPI\r
+;  IoWriteFifo32 (\r
+;    IN UINTN                  Port,              // rcx\r
+;    IN UINTN                  Size,              // rdx\r
+;    IN VOID                   *Buffer            // r8\r
+;    );\r
+;------------------------------------------------------------------------------\r
+global ASM_PFX(IoWriteFifo32)\r
+ASM_PFX(IoWriteFifo32):\r
+    cld\r
+    xchg    rcx, rdx\r
+    xchg    rsi, r8             ; rsi: buffer address; r8: save rsi\r
+rep outsd\r
+    mov     rsi, r8             ; restore rsi\r
+    ret\r
+\r