Some MMU manipulation is dependent on the presence of the multiprocessing
extensions. So add a function that returns this information.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18895
6f19259b-4bc3-4df7-8a09-
765794883524
.align 2\r
\r
GCC_ASM_EXPORT(ArmIsMpCore)\r
+GCC_ASM_EXPORT(ArmHasMpExtensions)\r
GCC_ASM_EXPORT(ArmEnableAsynchronousAbort)\r
GCC_ASM_EXPORT(ArmDisableAsynchronousAbort)\r
GCC_ASM_EXPORT(ArmEnableIrq)\r
movne R0, #0\r
bx LR\r
\r
+ASM_PFX(ArmHasMpExtensions):\r
+ mrc p15,0,R0,c0,c0,5\r
+ // Get Multiprocessing extension (bit31)\r
+ lsr R0, R0, #31\r
+ bx LR\r
+\r
ASM_PFX(ArmEnableAsynchronousAbort):\r
cpsie a\r
isb\r
\r
\r
EXPORT ArmIsMpCore\r
+ EXPORT ArmHasMpExtensions\r
EXPORT ArmEnableAsynchronousAbort\r
EXPORT ArmDisableAsynchronousAbort\r
EXPORT ArmEnableIrq\r
movne R0, #0\r
bx LR\r
\r
+ArmHasMpExtensions\r
+ mrc p15,0,R0,c0,c0,5\r
+ // Get Multiprocessing extension (bit31)\r
+ lsr R0, R0, #31\r
+ bx LR\r
+\r
ArmEnableAsynchronousAbort\r
cpsie a\r
isb\r
VOID\r
);\r
\r
+BOOLEAN\r
+EFIAPI\r
+ArmHasMpExtensions (\r
+ VOID\r
+ );\r
+\r
#endif // __ARM_V7_LIB_H__\r
\r