//\r
#define EFI_STRING_TOKEN UINT16\r
\r
-typedef struct {\r
+///\r
+/// Each data record that is a member of some subclass starts with a standard \r
+/// header of type EFI_SUBCLASS_TYPE1_HEADER.\r
+/// This header is only a guideline and applicable only to a data \r
+/// subclass that is producing SMBIOS data records. A subclass can start with a \r
+/// different header if needed. \r
+///\r
+typedef struct {\r
+ ///\r
+ /// The version of the specification to which a specific subclass data record adheres. \r
+ ///\r
UINT32 Version;\r
+ ///\r
+ /// The size in bytes of this data class header. \r
+ ///\r
UINT32 HeaderSize;\r
+ ///\r
+ /// The instance number of the subclass with the same ProducerName. This number is \r
+ /// applicable in cases where multiple subclass instances that were produced by the same \r
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not \r
+ /// Applicable. All data consumer drivers should be able to handle all the possible values \r
+ /// of Instance, including Not Applicable and Reserved. \r
+ ///\r
UINT16 Instance;\r
+ ///\r
+ /// The instance number of the RecordType for the same Instance. This number is \r
+ /// applicable in cases where multiple instances of the RecordType exist for a specific \r
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable. \r
+ /// All data consumer drivers should be able to handle all the possible values of \r
+ /// SubInstance, including Not Applicable and Reserved. \r
+ ///\r
UINT16 SubInstance;\r
+ ///\r
+ /// The record number for the data record being specified. The numbering scheme and \r
+ /// definition is defined in the specific subclass specification. \r
+ ///\r
UINT32 RecordType;\r
} EFI_SUBCLASS_TYPE1_HEADER;\r
\r
+///\r
+/// This structure is used to link data records in the same subclasses. A data record is \r
+/// defined as a link to another data record in the same subclass using this structure. \r
+///\r
typedef struct {\r
+ ///\r
+ /// An EFI_GUID that identifies the component that produced this data record. Type \r
+ /// EFI_GUID is defined in InstallProtocolInterface() in the EFI 1.10 Specification. \r
+ ///\r
EFI_GUID ProducerName;\r
+ ///\r
+ /// The instance number of the subclass with the same ProducerName. This number is \r
+ /// applicable in cases where multiple subclass instances that were produced by the same \r
+ /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not \r
+ /// Applicable. All data consumer drivers should be able to handle all the possible values \r
+ /// of Instance, including Not Applicable and Reserved. \r
+ ///\r
UINT16 Instance;\r
+ /// The instance number of the RecordType for the same Instance. This number is \r
+ /// applicable in cases where multiple instances of the RecordType exist for a specific \r
+ /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable. \r
+ /// All data consumer drivers should be able to handle all the possible values of \r
+ /// SubInstance, including Not Applicable and Reserved. \r
UINT16 SubInstance;\r
} EFI_INTER_LINK_DATA;\r
\r
//\r
// EXP data\r
//\r
-\r
+///\r
+/// This macro provides a calculation for base-10 representations. Value and Exponent are each \r
+/// INT16. It is signed to cover negative values and is 16 bits wide (15 bits for data and 1 bit\r
+/// for the sign). \r
+///\r
typedef struct {\r
+ ///\r
+ /// The INT16 number by which to multiply the base-10 representation. \r
+ ///\r
UINT16 Value;\r
+ ///\r
+ /// The INT16 number by which to raise the base-10 calculation. \r
+ ///\r
UINT16 Exponent;\r
} EFI_EXP_BASE2_DATA;\r
\r
+///\r
+/// This macro provides a calculation for base-2 representations. Value and Exponent are each \r
+/// INT16. It is 16 bits wide and is unsigned to mean nonnegative values. \r
+///\r
typedef struct {\r
+ ///\r
+ /// The INT16 number by which to multiply the base-2 representation.\r
+ ///\r
UINT16 Value;\r
+ ///\r
+ /// The INT16 number by which to raise the base-2 calculation. \r
+ ///\r
UINT16 Exponent;\r
} EFI_EXP_BASE10_DATA;\r
\r
typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;\r
typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;\r
typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;\r
+\r
+///\r
+/// This data record refers to the list of frequencies that the processor core supports. The list of \r
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example, \r
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data \r
+/// record is in Hertz. For asynchronous processors, the content of this data record is zero. \r
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means \r
+/// that the processor/driver supports automatic frequency selection. \r
+///\r
typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;\r
+\r
+///\r
+/// This data record refers to the list of supported frequencies of the processor external bus. The list of \r
+/// supported frequencies is determined by the firmware based on hardware capabilities--for example, \r
+/// it could be a common subset of all processors and the chipset. The unit of measurement of this data \r
+/// record is in Hertz. For asynchronous processors, the content of this data record is NULL. \r
+/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means \r
+/// that the processor/driver supports automatic frequency selection. \r
+///\r
typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;\r
typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;\r
typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;\r
UINT32 ProcessorReserved4: 2;\r
} EFI_PROCESSOR_FEATURE_FLAGS;\r
\r
+///\r
+/// This data record refers to the unique ID that identifies a set of processors. This data record is 16 \r
+/// bytes in length. The data in this structure is processor specific and reserved values can be defined \r
+/// for future use. The consumer of this data should not make any assumption and should use this data \r
+/// with respect to the processor family defined in the Family record number. \r
+///\r
typedef struct {\r
+ ///\r
+ /// Identifies the processor.\r
+ ///\r
EFI_PROCESSOR_SIGNATURE Signature;\r
+ ///\r
+ /// Provides additional processor information. \r
+ ///\r
EFI_PROCESSOR_MISC_INFO MiscInfo;\r
+ ///\r
+ /// Reserved for future use. \r
+ ///\r
UINT32 Reserved;\r
+ ///\r
+ /// Provides additional processor information. \r
+ ///\r
EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
} EFI_PROCESSOR_ID_DATA;\r
\r
+///\r
+/// This data record refers to the general classification of the processor. This data record is 4 bytes in \r
+/// length. \r
+///\r
typedef enum {\r
EfiProcessorOther = 1,\r
EfiProcessorUnknown = 2,\r
EfiVideoProcessor = 6\r
} EFI_PROCESSOR_TYPE_DATA;\r
\r
+///\r
+/// This data record refers to the family of the processor as defined by the DMTF. \r
+/// This data record is 4 bytes in length. \r
+///\r
typedef enum {\r
EfiProcessorFamilyOther = 1,\r
EfiProcessorFamilyUnknown = 2,\r
EfiProcessorFamilyPowerPC603 = 0x22,\r
EfiProcessorFamilyPowerPC603Plus = 0x23,\r
EfiProcessorFamilyPowerPC604 = 0x24,\r
+ EfiProcessorFamilyPowerPC620 = 0x25, \r
+ EfiProcessorFamilyPowerPC704 = 0x26, \r
+ EfiProcessorFamilyPowerPC750 = 0x27, \r
EfiProcessorFamilyAlpha2 = 0x30,\r
+ EfiProcessorFamilyAlpha21064 = 0x31, \r
+ EfiProcessorFamilyAlpha21066 = 0x32, \r
+ EfiProcessorFamilyAlpha21164 = 0x33, \r
+ EfiProcessorFamilyAlpha21164PC = 0x34, \r
+ EfiProcessorFamilyAlpha21164a = 0x35, \r
+ EfiProcessorFamilyAlpha21264 = 0x36, \r
+ EfiProcessorFamilyAlpha21364 = 0x37, \r
EfiProcessorFamilyMips = 0x40,\r
+ EfiProcessorFamilyMIPSR4000 = 0x41, \r
+ EfiProcessorFamilyMIPSR4200 = 0x42, \r
+ EfiProcessorFamilyMIPSR4400 = 0x43, \r
+ EfiProcessorFamilyMIPSR4600 = 0x44, \r
+ EfiProcessorFamilyMIPSR10000 = 0x45, \r
EfiProcessorFamilySparc = 0x50,\r
+ EfiProcessorFamilySuperSparc = 0x51, \r
+ EfiProcessorFamilymicroSparcII = 0x52, \r
+ EfiProcessorFamilymicroSparcIIep = 0x53, \r
+ EfiProcessorFamilyUltraSparc = 0x54, \r
+ EfiProcessorFamilyUltraSparcII = 0x55, \r
+ EfiProcessorFamilyUltraSparcIIi = 0x56, \r
+ EfiProcessorFamilyUltraSparcIII = 0x57, \r
+ EfiProcessorFamilyUltraSparcIIIi = 0x58, \r
EfiProcessorFamily68040 = 0x60,\r
EfiProcessorFamily68xxx = 0x61,\r
EfiProcessorFamily68000 = 0x62,\r
EfiProcessorFamily68020 = 0x64,\r
EfiProcessorFamily68030 = 0x65,\r
EfiProcessorFamilyHobbit = 0x70,\r
+ EfiProcessorFamilyCrusoeTM5000 = 0x78, \r
+ EfiProcessorFamilyCrusoeTM3000 = 0x79,\r
EfiProcessorFamilyWeitek = 0x80,\r
+ EfiProcessorFamilyItanium = 0x82, \r
+ EfiProcessorFamilyAmdAthlon64 = 0x83, \r
+ EfiProcessorFamilyAmdOpteron = 0x84,\r
EfiProcessorFamilyPARISC = 0x90,\r
+ EfiProcessorFamilyPaRisc8500 = 0x91, \r
+ EfiProcessorFamilyPaRisc8000 = 0x92, \r
+ EfiProcessorFamilyPaRisc7300LC = 0x93, \r
+ EfiProcessorFamilyPaRisc7200 = 0x94, \r
+ EfiProcessorFamilyPaRisc7100LC = 0x95, \r
+ EfiProcessorFamilyPaRisc7100 = 0x96,\r
EfiProcessorFamilyV30 = 0xA0,\r
EfiProcessorFamilyPentiumIIIXeon = 0xB0,\r
EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
EfiProcessorFamilyi960 = 0xFB\r
} EFI_PROCESSOR_FAMILY_DATA;\r
\r
+///\r
+/// This data record refers to the core voltage of the processor being defined. The unit of measurement \r
+/// of this data record is in volts. \r
+///\r
typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;\r
+\r
+///\r
+/// This data record refers to the base address of the APIC of the processor being defined. This data \r
+/// record is a physical address location. \r
+///\r
typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;\r
+\r
+///\r
+/// This data record refers to the ID of the APIC of the processor being defined. This data record is a \r
+/// 4-byte entry. \r
+///\r
typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;\r
+\r
+///\r
+/// This data record refers to the version number of the APIC of the processor being defined. This data \r
+/// record is a 4-byte entry. \r
+///\r
typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;\r
\r
typedef enum {\r
EfiProcessorIpfPalBMicrocode = 3\r
} EFI_PROCESSOR_MICROCODE_TYPE;\r
\r
+///\r
+/// This data record refers to the revision of the processor microcode that is loaded in the processor. \r
+/// This data record is a 4-byte entry. \r
+///\r
typedef struct {\r
+ ///\r
+ /// Identifies what type of microcode the data is. \r
+ /// \r
EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;\r
+ ///\r
+ /// Indicates the revision number of this microcode. \r
+ ///\r
UINT32 ProcessorMicrocodeRevisionNumber;\r
} EFI_PROCESSOR_MICROCODE_REVISION_DATA;\r
\r
-typedef struct {\r
- UINT32 CpuStatus :3;\r
- UINT32 Reserved1 :3;\r
- UINT32 SocketPopulated :1;\r
- UINT32 Reserved2 :1;\r
- UINT32 ApicEnable :1;\r
- UINT32 BootApplicationProcessor :1;\r
- UINT32 Reserved3 :22;\r
+///\r
+/// This data record refers to the status of the processor.\r
+///\r
+typedef struct {\r
+ UINT32 CpuStatus :3; ///> Indicates the status of the processor. \r
+ UINT32 Reserved1 :3; ///> Reserved for future use. Should be set to zero. \r
+ UINT32 SocketPopulated :1; ///> Indicates if the processor is socketed or not. \r
+ UINT32 Reserved2 :1; ///> Reserved for future use. Should be set to zero. \r
+ UINT32 ApicEnable :1; ///> Indicates if the APIC is enabled or not. \r
+ UINT32 BootApplicationProcessor :1; ///> Indicates if this processor is the boot processor. \r
+ UINT32 Reserved3 :22;///> Reserved for future use. Should be set to zero. \r
} EFI_PROCESSOR_STATUS_DATA;\r
\r
typedef enum {\r
typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;\r
typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;\r
\r
+///\r
+/// This data record refers to the health status of the processor. \r
+///\r
typedef enum {\r
EfiProcessorHealthy = 1,\r
EfiProcessorPerfRestricted = 2,\r
- EfiProcessorFuncRestricted = 3\r
+ EfiProcessorFuncRestricted = 3 \r
} EFI_PROCESSOR_HEALTH_STATUS;\r
\r
+///\r
+/// This data record refers to the package number of this processor. Multiple logical processors can \r
+/// exist in a system and each logical processor can be correlated to the physical processor using this \r
+/// record type. \r
+///\r
typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;\r
\r
typedef enum {\r
EfiMemoryRegionNvs = 0x04\r
} EFI_MEMORY_REGION_TYPE;\r
\r
+///\r
+/// This data record refers to the size of a memory region. The regions that are \r
+/// described can refer to physical memory, memory-mapped I/O, or reserved BIOS memory regions. \r
+/// The unit of measurement of this data record is in bytes. \r
+///\r
typedef struct {\r
+ ///\r
+ /// A zero-based value that indicates which processor(s) can access the memory region. \r
+ /// A value of 0xFFFF indicates the region is accessible by all processors. \r
+ ///\r
UINT32 ProcessorNumber;\r
+ ///\r
+ /// A zero-based value that indicates the starting bus that can access the memory region. \r
+ ///\r
UINT16 StartBusNumber;\r
+ ///\r
+ /// A zero-based value that indicates the ending bus that can access the memory region. \r
+ /// A value of 0xFF for a PCI system indicates the region is accessible by all buses and \r
+ /// is global in scope. An example of the EndBusNumber not being 0xFF is a system \r
+ /// with two or more peer-to-host PCI bridges. \r
+ ///\r
UINT16 EndBusNumber;\r
+ ///\r
+ /// The type of memory region from the operating system\92s point of view. \r
+ /// MemoryRegionType values are equivalent to the legacy INT 15 AX = E820 BIOS \r
+ /// command values. \r
+ ///\r
EFI_MEMORY_REGION_TYPE MemoryRegionType;\r
+ ///\r
+ /// The size of the memory region in bytes. \r
+ ///\r
EFI_EXP_BASE2_DATA MemorySize;\r
+ ///\r
+ /// The starting physical address of the memory region. \r
+ ///\r
EFI_PHYSICAL_ADDRESS MemoryStartAddress;\r
} EFI_MEMORY_SIZE_DATA;\r
\r
EfiMemoryErrorCorrectionCrc = 0x07\r
} EFI_MEMORY_ERROR_CORRECTION;\r
\r
-typedef struct {\r
+///\r
+/// This data record refers to the physical memory array. This data record is a structure. \r
+/// The type definition structure for EFI_MEMORY_ARRAY_LOCATION_DATA is in SMBIOS 2.3.4: \r
+/// - Table 3.3.17.1, Type 16, Offset 0x4 \r
+/// - Table 3.3.17.2, Type 16, Offset 0x5 \r
+/// - Table 3.3.17.3, Type 16, with the following offsets: \r
+/// -- Offset 0x6 \r
+/// -- Offset 0x7 \r
+/// -- Offset 0xB \r
+/// -- Offset 0xD \r
+/// \r
+typedef struct {\r
+ ///\r
+ /// The physical location of the memory array. \r
+ ///\r
EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;\r
+ ///\r
+ /// The memory array usage.\r
+ ///\r
EFI_MEMORY_ARRAY_USE MemoryArrayUse;\r
+ ///\r
+ /// The primary error correction or detection supported by this memory array.\r
+ ///\r
EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;\r
+ ///\r
+ /// The maximum memory capacity size in kilobytes. If capacity is unknown, then \r
+ /// values of MaximumMemoryCapacity.Value = 0x00 and \r
+ /// MaximumMemoryCapacity.Exponent = 0x8000 are used.\r
+ ///\r
EFI_EXP_BASE2_DATA MaximumMemoryCapacity;\r
+ ///\r
+ /// The number of memory slots or sockets that are available for memory devices \r
+ /// in this array. \r
+ ///\r
UINT16 NumberMemoryDevices;\r
} EFI_MEMORY_ARRAY_LOCATION_DATA;\r
\r
EfiMemoryStatePartial = 6\r
} EFI_MEMORY_STATE;\r
\r
+///\r
+/// This data record describes a memory device. This data record is a structure. \r
+/// The type definition structure for EFI_MEMORY_ARRAY_LINK_DATA is in SMBIOS 2.3.4.\r
+///\r
typedef struct {\r
+ ///\r
+ /// A string that identifies the physically labeled socket or board position where the \r
+ /// memory device is located.\r
+ ///\r
STRING_REF MemoryDeviceLocator;\r
+ ///\r
+ /// A string denoting the physically labeled bank where the memory device is located. \r
+ ///\r
STRING_REF MemoryBankLocator;\r
+ ///\r
+ /// A string denoting the memory manufacturer. \r
+ /// \r
STRING_REF MemoryManufacturer;\r
+ ///\r
+ /// A string denoting the serial number of the memory device. \r
+ ///\r
STRING_REF MemorySerialNumber;\r
+ ///\r
+ /// The asset tag of the memory device. \r
+ ///\r
STRING_REF MemoryAssetTag;\r
+ ///\r
+ /// A string denoting the part number of the memory device. \r
+ ///\r
STRING_REF MemoryPartNumber;\r
+ ///\r
+ /// A link to a memory array structure set. \r
+ ///\r
EFI_INTER_LINK_DATA MemoryArrayLink;\r
+ ///\r
+ /// A link to a memory array structure set.\r
+ ///\r
EFI_INTER_LINK_DATA MemorySubArrayLink;\r
+ ///\r
+ /// The total width in bits of this memory device. If there are no error correcting bits, \r
+ /// then the total width equals the data width. If the width is unknown, then set the field \r
+ /// to 0xFFFF. \r
+ ///\r
UINT16 MemoryTotalWidth;\r
+ ///\r
+ /// The data width in bits of the memory device. A data width of 0x00 and a total width \r
+ /// of 0x08 indicate that the device is used solely for error correction. \r
+ ///\r
UINT16 MemoryDataWidth;\r
+ ///\r
+ /// The size in bytes of the memory device. A value of 0x00 denotes that no device is \r
+ /// installed, while a value of all Fs denotes that the size is not known.\r
+ ///\r
EFI_EXP_BASE2_DATA MemoryDeviceSize;\r
+ ///\r
+ /// The form factor of the memory device. \r
+ ///\r
EFI_MEMORY_FORM_FACTOR MemoryFormFactor;\r
+ ///\r
+ /// A memory device set that must be populated with all devices of the same type and \r
+ /// size. A value of 0x00 indicates that the device is not part of any set. A value of 0xFF \r
+ /// indicates that the attribute is unknown. Any other value denotes the set number. \r
+ ///\r
UINT8 MemoryDeviceSet;\r
+ ///\r
+ /// The memory type in the socket. \r
+ ///\r
EFI_MEMORY_ARRAY_TYPE MemoryType;\r
+ ///\r
+ /// The memory type details. \r
+ ///\r
EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;\r
+ ///\r
+ /// The memory speed in megahertz (MHz). A value of 0x00 denotes that \r
+ /// the speed is unknown.\r
+ ///\r
EFI_EXP_BASE10_DATA MemorySpeed;\r
+ ///\r
+ /// The memory state. \r
+ ///\r
EFI_MEMORY_STATE MemoryState;\r
} EFI_MEMORY_ARRAY_LINK_DATA;\r
\r
\r
#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004\r
\r
+///\r
+/// This data record refers to a specified physical memory array associated with \r
+/// a given memory range. \r
+/// \r
typedef struct {\r
+ ///\r
+ /// The starting physical address in bytes of memory mapped to a specified physical \r
+ /// memory array. \r
+ ///\r
EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;\r
+ ///\r
+ /// The last physical address in bytes of memory mapped to a specified physical memory \r
+ /// array. \r
+ ///\r
EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;\r
+ ///\r
+ /// See Physical Memory Array (Type 16) for physical memory array structures.\r
+ ///\r
EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;\r
+ ///\r
+ /// The number of memory devices that form a single row of memory for the address \r
+ /// partition. \r
+ ///\r
UINT16 MemoryArrayPartitionWidth;\r
} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;\r
\r
\r
#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005\r
\r
+///\r
+/// This data record refers to a physical memory device that is associated with \r
+/// a given memory range.\r
+/// \r
typedef struct {\r
+ ///\r
+ /// The starting physical address that is associated with the device. \r
+ ///\r
EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;\r
+ ///\r
+ /// The ending physical address that is associated with the device. \r
+ ///\r
EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;\r
+ ///\r
+ /// A link to the memory device data structure. \r
+ ///\r
EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;\r
+ /// \r
+ /// A link to the memory array data structure. \r
+ ///\r
EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;\r
+ ///\r
+ /// The position of the memory device in a row. A value of 0x00 is reserved and a value \r
+ /// of 0xFF indicates that the position is unknown. \r
+ ///\r
UINT8 MemoryDevicePartitionRowPosition;\r
+ ///\r
+ /// The position of the device in an interleave. \r
+ ///\r
UINT8 MemoryDeviceInterleavePosition;\r
+ ///\r
+ /// The maximum number of consecutive rows from the device that are accessed in a \r
+ /// single interleave transfer. A value of 0x00 indicates that the device is not interleaved \r
+ /// and a value of 0xFF indicates that the interleave configuration is unknown. \r
+ ///\r
UINT8 MemoryDeviceInterleaveDataDepth;\r
} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;\r
\r
EfiMemoryChannelTypeSyncLink = 4\r
} EFI_MEMORY_CHANNEL_TYPE;\r
\r
-typedef struct {\r
+///\r
+/// This data record refers the type of memory that is associated with the channel. This data record is a \r
+/// structure. \r
+/// The type definition structure for EFI_MEMORY_CHANNEL_TYPE_DATA is in SMBIOS 2.3.4, \r
+/// Table 3.3.38, Type 37, with the following offsets: \r
+/// - Offset 0x4 \r
+/// - Offset 0x5 \r
+/// - Offset 0x6\r
+/// \r
+typedef struct {\r
+ ///\r
+ /// The type of memory that is associated with the channel. \r
+ /// \r
EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;\r
+ ///\r
+ /// The maximum load that is supported by the channel.\r
+ ///\r
UINT8 MemoryChannelMaximumLoad;\r
+ ///\r
+ /// The number of memory devices on this channel. \r
+ ///\r
UINT8 MemoryChannelDeviceCount;\r
} EFI_MEMORY_CHANNEL_TYPE_DATA;\r
\r
#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007\r
\r
-typedef struct {\r
+///\r
+/// This data record refers to the memory device that is associated with the memory channel. This data \r
+/// record is a structure. \r
+/// The type definition structure for EFI_MEMORY_CHANNEL_DEVICE_DATA is in SMBIOS 2.3.4, \r
+/// Table 3.3.38, Type 37, with the following offsets: \r
+/// - Offset 0x7 \r
+/// - Offset 0x8\r
+///\r
+typedef struct {\r
+ ///\r
+ /// A number between one and MemoryChannelDeviceCount plus an arbitrary base. \r
+ /// \r
UINT8 DeviceId;\r
+ ///\r
+ /// The Link of the associated memory device. See Memory Device (Type 17) for \r
+ /// memory devices. \r
+ ///\r
EFI_INTER_LINK_DATA DeviceLink;\r
+ ///\r
+ /// The number of load units that this device consumes. \r
+ ///\r
UINT8 MemoryChannelDeviceLoad;\r
} EFI_MEMORY_CHANNEL_DEVICE_DATA;\r
\r
);\r
\r
typedef struct {\r
- EFI_SMM_CPU_IO Read;\r
- EFI_SMM_CPU_IO Write;\r
+ EFI_SMM_CPU_IO Read; ///> This service provides the various modalities of memory and I/O read.\r
+ EFI_SMM_CPU_IO Write; ///> This service provides the various modalities of memory and I/O write.\r
} EFI_SMM_IO_ACCESS;\r
\r
+///\r
+/// The EFI_SMM_CPU_IO_INTERFACE service provides the basic memory, I/O, and PCI\r
+/// interfaces that are used to abstract accesses to devices.\r
+///\r
struct _EFI_SMM_CPU_IO_INTERFACE {\r
+ ///\r
+ /// Allows reads and writes to memory-mapped I/O space. \r
+ ///\r
EFI_SMM_IO_ACCESS Mem;\r
+ ///\r
+ /// Allows reads and writes to I/O space. \r
+ ///\r
EFI_SMM_IO_ACCESS Io;\r
};\r
\r
IN OUT VOID *ProcArguments OPTIONAL\r
);\r
\r
+///\r
+/// The processor save-state information for IA-32 processors. This information is important in that the\r
+/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r
+///\r
typedef struct {\r
+ ///\r
+ /// Reserved for future processors. As such, software should not attempt to interpret or\r
+ /// write to this region.\r
+ ///\r
UINT8 Reserved1[248];\r
+ ///\r
+ /// The location of the processor SMBASE, which is the location where the processor\r
+ /// will pass control upon receipt of an SMI.\r
+ ///\r
UINT32 SMBASE;\r
+ ///\r
+ /// The revision of the SMM save state. This value is set by the processor.\r
+ ///\r
UINT32 SMMRevId;\r
+ ///\r
+ /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r
+ ///\r
UINT16 IORestart;\r
+ ///\r
+ /// Describes behavior that should be commenced in response to a halt instruction.\r
+ ///\r
UINT16 AutoHALTRestart;\r
+ ///\r
+ /// Reserved for future processors. As such, software should not attempt to interpret or\r
+ /// write to this region.\r
+ ///\r
UINT8 Reserved2[164];\r
+\r
+ //\r
+ // Registers in IA-32 processors. \r
+ //\r
UINT32 ES;\r
UINT32 CS;\r
UINT32 SS;\r
UINT32 CR0;\r
} EFI_SMI_CPU_SAVE_STATE;\r
\r
+///\r
+/// The processor save-state information for the Itanium processor family. This information is\r
+/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
+/// the PMI. This structure is mandatory and must be 512 byte aligned.\r
+/// \r
typedef struct {\r
UINT64 reserved;\r
UINT64 r1;\r
\r
} EFI_PMI_SYSTEM_CONTEXT;\r
\r
+///\r
+/// The processor save-state information for IA-32 and Itanium processors. This information is\r
+/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
+/// the SMI or PMI.\r
+///\r
typedef union {\r
+ ///\r
+ /// The processor save-state information for IA-32 processors. \r
+ ///\r
EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r
+ ///\r
+ /// The processor save-state information for Itanium processors.\r
+ ///\r
EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r
} EFI_SMM_CPU_SAVE_STATE;\r
\r
+///\r
+/// The optional floating point save-state information for IA-32 processors. If the optional floating\r
+/// point save is indicated for any handler, the following data structure must be preserved.\r
+///\r
typedef struct {\r
UINT16 Fcw;\r
UINT16 Fsw;\r
UINT8 Rsvd11[22*16];\r
} EFI_SMI_OPTIONAL_FPSAVE_STATE;\r
\r
+///\r
+/// The optional floating point save-state information for the Itanium processor family. If the optional\r
+/// floating point save is indicated for any handler, then this data structure must be preserved. \r
+/// \r
typedef struct {\r
UINT64 f2[2];\r
UINT64 f3[2];\r
UINT64 f31[2];\r
} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r
\r
+///\r
+/// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r
+/// point save is indicated for any handler, then this data structure must be preserved.\r
+///\r
typedef union {\r
+ /// \r
+ /// The optional floating point save-state information for IA-32 processors. \r
+ ///\r
EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r
+ ///\r
+ /// The optional floating point save-state information for Itanium processors. \r
+ ///\r
EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r
} EFI_SMM_FLOATING_POINT_SAVE_STATE;\r
\r
// System Management System Table (SMST)\r
//\r
struct _EFI_SMM_SYSTEM_TABLE {\r
+ ///\r
+ /// The table header for the System Management System Table (SMST). \r
+ ///\r
EFI_TABLE_HEADER Hdr;\r
\r
+ ///\r
+ /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r
+ /// permissible for this pointer to be NULL.\r
+ ///\r
CHAR16 *SmmFirmwareVendor;\r
+ ///\r
+ /// The particular revision of the firmware.\r
+ ///\r
UINT32 SmmFirmwareRevision;\r
\r
+ ///\r
+ /// Adds, updates, or removes a configuration table entry from the SMST. \r
+ ///\r
EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r
\r
//\r
// I/O Services\r
//\r
+ ///\r
+ /// A GUID that designates the particular CPU I/O services. \r
+ ///\r
EFI_GUID EfiSmmCpuIoGuid;\r
+ ///\r
+ /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r
+ /// devices.\r
+ ///\r
EFI_SMM_CPU_IO_INTERFACE SmmIo;\r
\r
//\r
// Runtime memory service\r
//\r
+ ///\r
+ /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r
+ /// Itanium processor family.\r
+ ///\r
EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r
+ ///\r
+ /// Returns pool memory to the system. \r
+ ///\r
EFI_SMMCORE_FREE_POOL SmmFreePool;\r
+ ///\r
+ /// Allocates memory pages from the system. \r
+ ///\r
EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r
+ ///\r
+ /// Frees memory pages for the system.\r
+ ///\r
EFI_SMMCORE_FREE_PAGES SmmFreePages;\r
\r
//\r
//\r
// CPU information records\r
//\r
+ ///\r
+ /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r
+ /// which processor is executing the SMM infrastructure. This number also serves as an\r
+ /// index into the CpuSaveState and CpuOptionalFloatingPointState\r
+ /// fields.\r
+ ///\r
UINTN CurrentlyExecutingCpu;\r
+ ///\r
+ /// The number of EFI Configuration Tables in the buffer\r
+ /// SmmConfigurationTable.\r
+ ///\r
UINTN NumberOfCpus;\r
+ ///\r
+ /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
+ /// NumberOfTableEntries.\r
+ ///\r
EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r
+ ///\r
+ /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r
+ /// The size of this entire table is NumberOfCpus* size of the\r
+ /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r
+ /// there is at least one SMM driver that has registered for a callback with the\r
+ /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r
+ ///\r
EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r
\r
//\r
// Extensibility table\r
//\r
+ ///\r
+ /// The number of EFI Configuration Tables in the buffer\r
+ /// SmmConfigurationTable.\r
+ ///\r
UINTN NumberOfTableEntries;\r
+ ///\r
+ /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
+ /// NumberOfTableEntries.\r
+ ///\r
EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r
};\r
\r
} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA;\r
\r
///\r
-/// Voltage Extended Error Data\r
+/// This structure provides the voltage at the time of error. It also provides \r
+/// the threshold value indicating the minimum or maximum voltage that is considered \r
+/// an error. If the voltage is less then the threshold, the error indicates that the \r
+/// voltage fell below the minimum acceptable value. If the voltage is greater then the threshold, \r
+/// the error indicates that the voltage rose above the maximum acceptable value.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The voltage value at the time of the error.\r
+ ///\r
EFI_EXP_BASE10_DATA Voltage;\r
+ ///\r
+ /// The voltage threshold.\r
+ ///\r
EFI_EXP_BASE10_DATA Threshold;\r
} EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA;\r
\r
/// Microcode Update Extended Error Data\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The version of the microcode update from the header.\r
+ ///\r
UINT32 Version;\r
} EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA;\r
\r
///\r
/// Asynchronous Timer Extended Error Data\r
+/// The timer limit provides the timeout value of the timer prior to expiration.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The number of seconds that the computing unit timer was configured to expire.\r
+ ///\r
EFI_EXP_BASE10_DATA TimerLimit;\r
} EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA;\r
\r
///\r
/// Host Processor Mismatch Extended Error Data\r
+/// This provides information to indicate which processors mismatch, and how they mismatch. The \r
+/// status code contains the instance number of the processor that is in error. This structure's \r
+/// Instance indicates the second processor that does not match. This differentiation allows the \r
+/// consumer to determine which two processors do not match. The Attributes indicate what \r
+/// mismatch is being reported. Because Attributes is a bit field, more than one mismatch can be \r
+/// reported with one error code.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The unit number of the computing unit that does not match.\r
+ /// \r
UINT32 Instance;\r
+ /// \r
+ /// The attributes describing the failure. \r
+ /// \r
UINT16 Attributes;\r
} EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA;\r
\r
///\r
/// Thermal Extended Error Data\r
+/// This structure provides the temperature at the time of error. It also provides the threshold value \r
+/// indicating the minimum temperature that is considered an error.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The thermal value at the time of the error.\r
+ ///\r
EFI_EXP_BASE10_DATA Temperature;\r
+ ///\r
+ /// The thermal threshold.\r
+ ///\r
EFI_EXP_BASE10_DATA Threshold;\r
} EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA;\r
\r
-\r
+//\r
+// Valid cache types\r
+//\r
typedef enum {\r
EfiInitCacheDataOnly,\r
EfiInitCacheInstrOnly,\r
\r
///\r
/// Processor Disabled Extended Error Data\r
+/// This structure provides details as to why and how the computing unit was disabled. The causes \r
+/// should cover the typical reasons a processor would be disabled. How the processor was disabled is \r
+/// important because there are distinct differences between hardware and software disabling.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The reason for disabling the processor. \r
+ /// \r
UINT32 Cause;\r
+ ///\r
+ /// TRUE if the processor is disabled via software means such as not listing it in the ACPI tables. \r
+ /// Such a processor will respond to Interprocessor Interrupts (IPIs). FALSE if the processor is hardware \r
+ /// disabled, which means it is invisible to software and will not respond to IPIs.\r
+ ///\r
BOOLEAN SoftwareDisabled;\r
} EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA;\r
\r
///\r
typedef UINT8 EFI_MEMORY_ERROR_GRANULARITY;\r
\r
+///\r
+/// This structure provides specific details about the memory error that was detected. It provides \r
+/// enough information so that consumers can identify the exact failure and provides enough \r
+/// information to enable corrective action if necessary.\r
+///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The error granularity type.\r
+ ///\r
EFI_MEMORY_ERROR_GRANULARITY Granularity;\r
+ ///\r
+ /// The operation that resulted in the error being detected. \r
+ ///\r
EFI_MEMORY_ERROR_OPERATION Operation;\r
+ ///\r
+ /// The error syndrome, vendor-specific ECC syndrome, or CRC data associated with \r
+ /// the error. If unknown, should be initialized to 0.\r
+ ///\r
UINTN Syndrome;\r
+ ///\r
+ /// The physical address of the error. \r
+ ///\r
EFI_PHYSICAL_ADDRESS Address;\r
+ ///\r
+ /// The range, in bytes, within which the error address can be determined.\r
+ ///\r
UINTN Resolution;\r
} EFI_MEMORY_EXTENDED_ERROR_DATA;\r
\r
+///\r
+/// This extended data provides some context that consumers can use to locate a DIMM within the \r
+/// overall memory scheme. \r
+///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The memory array number.\r
+ ///\r
UINT16 Array;\r
+ ///\r
+ /// The device number within that Array.\r
+ ///\r
UINT16 Device;\r
} EFI_STATUS_CODE_DIMM_NUMBER;\r
\r
///\r
/// Memory Module Mismatch Extended Error Data\r
-///\r
+/// \r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data.\r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The instance number of the memory module that does not match. \r
+ ///\r
EFI_STATUS_CODE_DIMM_NUMBER Instance;\r
} EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA;\r
\r
///\r
/// Memory Range Extended Data\r
+/// This extended data may be used to convey the specifics of a memory range. Ranges are specified \r
+/// with a start address and a length.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The starting address of the memory range. \r
+ ///\r
EFI_PHYSICAL_ADDRESS Start;\r
+ ///\r
+ /// The length in bytes of the memory range.\r
+ ///\r
EFI_PHYSICAL_ADDRESS Length;\r
} EFI_MEMORY_RANGE_EXTENDED_DATA;\r
\r
///\r
/// Extended Error Data for Assert\r
+/// The data indicates the location of the assertion that failed in the source code. This information \r
+/// includes the file name and line number that are necessary to find the failing assertion in source code.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data.\r
+ /// \r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The line number of the source file where the fault was generated.\r
+ ///\r
UINT32 LineNumber;\r
+ ///\r
+ /// The size in bytes of FileName.\r
+ ///\r
UINT32 FileNameSize;\r
+ ///\r
+ /// A pointer to a NULL-terminated ASCII or Unicode string that represents the file \r
+ /// name of the source file where the fault was generated. \r
+ ///\r
EFI_STATUS_CODE_STRING_DATA *FileName;\r
} EFI_DEBUG_ASSERT_DATA;\r
\r
EFI_SYSTEM_CONTEXT_IPF SystemContextIpf;\r
} EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT;\r
\r
+///\r
+/// This extended data allows the processor context that is present at the time of the exception to be \r
+/// reported with the exception. The format and contents of the context data varies depending on the \r
+/// processor architecture. \r
+///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The system context. \r
+ ///\r
EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;\r
} EFI_STATUS_CODE_EXCEP_EXTENDED_DATA;\r
\r
+///\r
+/// This extended data records information about a Start() function call. Start() is a member of \r
+/// the EFI 1.10 Driver Binding Protocol.\r
+///\r
typedef struct {\r
+ /// \r
+ /// The data header identifying the data. \r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The controller handle. \r
+ ///\r
EFI_HANDLE ControllerHandle;\r
+ ///\r
+ /// The driver binding handle.\r
+ ///\r
EFI_HANDLE DriverBindingHandle;\r
+ /// \r
+ /// The size of the RemainingDevicePath. It is zero if the Start() function is \r
+ /// called with RemainingDevicePath = NULL. \r
+ ///\r
UINT16 DevicePathSize;\r
+ ///\r
+ /// Matches the RemainingDevicePath parameter being passed to the Start() \r
+ /// function. Note that this parameter is the variable-length device path and not a pointer \r
+ /// to the device path.\r
+ /// \r
UINT8 *RemainingDevicePath;\r
} EFI_STATUS_CODE_START_EXTENDED_DATA;\r
\r
///\r
/// Legacy Oprom extended data\r
+/// The device handle and ROM image base can be used by consumers to determine which option \r
+/// ROM failed. Due to the black-box nature of legacy option ROMs, the amount of information that \r
+/// can be obtained may be limited.\r
///\r
typedef struct {\r
+ ///\r
+ /// The data header identifying the data.\r
+ ///\r
EFI_STATUS_CODE_DATA DataHeader;\r
+ ///\r
+ /// The handle corresponding to the device that this legacy option ROM is being invoked.\r
+ ///\r
EFI_HANDLE DeviceHandle;\r
+ ///\r
+ /// The base address of the shadowed legacy ROM image. \r
+ /// May or may not point to the shadow RAM area. \r
+ ///\r
EFI_PHYSICAL_ADDRESS RomImageBase;\r
} EFI_LEGACY_OPROM_EXTENDED_DATA;\r
\r