IntelFsp2Pkg: add TempRamExitPpi.h.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1883

Add header file for FSP_TEMP_RAM_EXIT_PPI which is
defined by FSP 2.1 spec.

Test: Build successfully.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
Reviewed-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

diff --git a/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h b/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h
new file mode 100644 (file)
index 0000000..0db54df
--- /dev/null
+++ b/IntelFsp2Pkg/Include/Ppi/TempRamExitPpi.h
@@ -0,0 +1,52 @@
+/** @file\r
+  This file defines the Silicon Temp Ram Exit PPI which implements the\r
+  required programming steps for disabling temporary memory.\r
+\r
+Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef _FSP_TEMP_RAM_EXIT_PPI_H_\r
+#define _FSP_TEMP_RAM_EXIT_PPI_H_\r
+\r
+///\r
+/// Global ID for the FSP_TEMP_RAM_EXIT_PPI.\r
+///\r
+#define FSP_TEMP_RAM_EXIT_GUID \\r
+  { \\r
+    0xbc1cfbdb, 0x7e50, 0x42be, { 0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52 } \\r
+  }\r
+\r
+//\r
+// Forward declaration for the FSP_TEMP_RAM_EXIT_PPI.\r
+//\r
+typedef struct _FSP_TEMP_RAM_EXIT_PPI FSP_TEMP_RAM_EXIT_PPI;\r
+\r
+/**\r
+  Silicon function for disabling temporary memory.\r
+  @param[in] TempRamExitParamPtr - Pointer to the TempRamExit parameters structure.\r
+                                   This structure is normally defined in the Integration\r
+                                   Guide. If it is not defined in the Integration Guide,\r
+                                   pass NULL.\r
+  @retval EFI_SUCCESS            - FSP execution environment was initialized successfully.\r
+  @retval EFI_INVALID_PARAMETER  - Input parameters are invalid.\r
+  @retval EFI_UNSUPPORTED        - The FSP calling conditions were not met.\r
+  @retval EFI_DEVICE_ERROR       - Temporary memory exit.\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *FSP_TEMP_RAM_EXIT) (\r
+  IN  VOID    *TempRamExitParamPtr\r
+  );\r
+\r
+///\r
+/// This PPI provides function to disable temporary memory.\r
+///\r
+struct _FSP_TEMP_RAM_EXIT_PPI {\r
+  FSP_TEMP_RAM_EXIT   TempRamExit;\r
+};\r
+\r
+extern EFI_GUID gFspTempRamExitPpiGuid;\r
+\r
+#endif // _FSP_TEMP_RAM_EXIT_PPI_H_\r

diff --git a/IntelFsp2Pkg/IntelFsp2Pkg.dec b/IntelFsp2Pkg/IntelFsp2Pkg.dec
index cc1716474295a4d43858771925d0ddaacfb8c672..60d40ab6b9f527f08e960efa2cd55f29e938455d 100644 (file)
--- a/IntelFsp2Pkg/IntelFsp2Pkg.dec
+++ b/IntelFsp2Pkg/IntelFsp2Pkg.dec
@@ -42,13 +42,23 @@
   # PPI to indicate FSP is ready to enter notify phase\r
   # This provides flexibility for any late initialization that must be done right before entering notify phase.\r
   #\r
-  gFspReadyForNotifyPhasePpiGuid        = { 0xcd167c1e, 0x6e0b, 0x42b3, { 0x82, 0xf6, 0xe3, 0xe9, 0x6, 0x19, 0x98, 0x10}}\r
+  gFspReadyForNotifyPhasePpiGuid        = { 0xcd167c1e, 0x6e0b, 0x42b3, {0x82, 0xf6, 0xe3, 0xe9, 0x06, 0x19, 0x98, 0x10}}\r
 \r
   #\r
   # PPI as dependency on some modules which only required for API mode\r
   #\r
   gFspInApiModePpiGuid                  = { 0xa1eeab87, 0xc859, 0x479d, {0x89, 0xb5, 0x14, 0x61, 0xf4, 0x06, 0x1a, 0x3e}}\r
 \r
+  #\r
+  # PPI for Architectural configuration data for FSP-M\r
+  #\r
+  gFspmArchConfigPpiGuid                = { 0x824d5a3a, 0xaf92, 0x4c0c, {0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb}}\r
+\r
+  #\r
+  # PPI to tear down the temporary memory set up by TempRamInit ().\r
+  #\r
+  gFspTempRamExitPpiGuid                = { 0xbc1cfbdb, 0x7e50, 0x42be, {0xb4, 0x87, 0x22, 0xe0, 0xa9, 0x0c, 0xb0, 0x52}}\r
+\r
 [Guids]\r
   #\r
   # GUID defined in package\r
@@ -64,9 +74,6 @@
   gFspPerformanceDataGuid               = { 0x56ed21b6, 0xba23, 0x429e, { 0x89, 0x32, 0x37, 0x6d, 0x8e, 0x18, 0x2e, 0xe3 } }\r
   gFspEventEndOfFirmwareGuid            = { 0xbd44f629, 0xeae7, 0x4198, { 0x87, 0xf1, 0x39, 0xfa, 0xb0, 0xfd, 0x71, 0x7e } }\r
 \r
-[Ppis]\r
-  gFspmArchConfigPpiGuid                = { 0x824d5a3a, 0xaf92, 0x4c0c, { 0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb } }\r
-\r
 [PcdsFixedAtBuild]\r
   gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress |0xFED00108|UINT32|0x00000001\r
   gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase         |0xFEF00000|UINT32|0x10001001\r