MdePkg: fix ARM version of InternalMathSwapBytes64 ()

The ARM asm implementation of InternalMathSwapBytes64 () does
interesting things if bit 7 of operand r1 (upper 32 bits of the
input value) is set. After the recursive swap, bit 7 ends up in
the sign bit position, after which it is right shifted with sign
extension, and or'ed with the upper half of the output value.

This means SwapBytes64 (0x00000080_00000000) returns an incorrect
value of 0xFFFFFFFF_80000000.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Ronald Cron <Ronald.Cron@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17077 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Library/BaseLib/Arm/Math64.S b/MdePkg/Library/BaseLib/Arm/Math64.S
index 4d975739207a598cf27dd83c5e2ff5d645772b4e..e2512621fe1a7ce8a25c10207e5a5beefbbc33ce 100755 (executable)
--- a/MdePkg/Library/BaseLib/Arm/Math64.S
+++ b/MdePkg/Library/BaseLib/Arm/Math64.S
@@ -256,22 +256,14 @@ L30:
        GCC_ASM_EXPORT(InternalMathSwapBytes64)\r
 \r
 ASM_PFX(InternalMathSwapBytes64):\r
-       @ args = 0, pretend = 0, frame = 0\r
-       @ frame_needed = 1, uses_anonymous_args = 0\r
-       stmfd   sp!, {r4, r5, r6, r7, lr}\r
-       add     r7, sp, #12\r
+       stmfd   sp!, {r4, r5, r7, lr}\r
        mov     r5, r1\r
        bl      ASM_PFX(SwapBytes32)\r
-       mov     r6, r0\r
+       mov     r4, r0\r
        mov     r0, r5\r
        bl      ASM_PFX(SwapBytes32)\r
-       mov     r4, r6\r
-       mov     r5, r4, asr #31\r
-       mov     r2, #0\r
-       mov     r1, r0, asr #31\r
-       orr     r0, r0, r2\r
-       orr     r1, r1, r4\r
-       ldmfd   sp!, {r4, r5, r6, r7, pc}\r
+       mov     r1, r4\r
+       ldmfd   sp!, {r4, r5, r7, pc}\r
 \r
 \r
 ASM_FUNCTION_REMOVE_IF_UNREFERENCED
\ No newline at end of file