OvmfPkg: Create initial version of PlatformInitLib

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3863

There are 3 variants of PlatformPei in OvmfPkg:
 - OvmfPkg/PlatformPei
 - OvmfPkg/XenPlatformPei
 - OvmfPkg/Bhyve/PlatformPei/PlatformPei.inf
These PlatformPeis can share many common codes, such as
Cmos / Hob / Memory / Platform related functions. This commit
(and its following several patches) are to create a PlatformInitLib
which wraps the common code called in above PlatformPeis.

In this initial version of PlatformInitLib, below Cmos related functions
are introduced:
 - PlatformCmosRead8
 - PlatformCmosWrite8
 - PlatformDebugDumpCmos

They correspond to the functions in OvmfPkg/PlatformPei:
 - CmosRead8
 - CmosWrite8
 - DebugDumpCmos

Considering this PlatformInitLib will be used in SEC phase, global
variables and dynamic PCDs are avoided. We use PlatformInfoHob
to exchange information between functions.

EFI_HOB_PLATFORM_INFO is the data struct which contains the platform
information, such as HostBridgeDevId, BootMode, S3Supported,
SmmSmramRequire, etc.

After PlatformInitLib is created, OvmfPkg/PlatformPei is refactored
with this library.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Brijesh Singh <brijesh.singh@amd.com>
Cc: Erdem Aktas <erdemaktas@google.com>
Cc: James Bottomley <jejb@linux.ibm.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Tom Lendacky <thomas.lendacky@amd.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Acked-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Signed-off-by: Min Xu <min.m.xu@intel.com>

diff --git a/OvmfPkg/AmdSev/AmdSevX64.dsc b/OvmfPkg/AmdSev/AmdSevX64.dsc
index fd56176796d5f478941bc88a449cb4468386b41a..785049c88962f95671249bd54b064734bef3778d 100644 (file)
--- a/OvmfPkg/AmdSev/AmdSevX64.dsc
+++ b/OvmfPkg/AmdSev/AmdSevX64.dsc
@@ -280,6 +280,7 @@
 !include OvmfPkg/OvmfTpmLibsPeim.dsc.inc\r
 \r
   MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf\r
+  PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf\r
 \r
 [LibraryClasses.common.DXE_CORE]\r
   HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r

diff --git a/OvmfPkg/CloudHv/CloudHvX64.dsc b/OvmfPkg/CloudHv/CloudHvX64.dsc
index b4d855d80f56cc14e6b6e717db9950926f0a3e59..b8a82380202ce10727d556704ebdc2eebca986b8 100644 (file)
--- a/OvmfPkg/CloudHv/CloudHvX64.dsc
+++ b/OvmfPkg/CloudHv/CloudHvX64.dsc
@@ -307,6 +307,7 @@
 !include OvmfPkg/OvmfTpmLibsPeim.dsc.inc\r
 \r
   MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf\r
+  PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf\r
 \r
 [LibraryClasses.common.DXE_CORE]\r
   HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r

diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Library/PlatformInitLib.h
new file mode 100644 (file)
index 0000000..2ebac5c
--- /dev/null
+++ b/OvmfPkg/Include/Library/PlatformInitLib.h
@@ -0,0 +1,99 @@
+/** @file\r
+  PlatformInitLib header file.\r
+\r
+  Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#ifndef PLATFORM_INIT_LIB_H_\r
+#define PLATFORM_INIT_LIB_H_\r
+\r
+#include <PiPei.h>\r
+\r
+#pragma pack(1)\r
+typedef struct {\r
+  EFI_HOB_GUID_TYPE    GuidHeader;\r
+  UINT16               HostBridgeDevId;\r
+\r
+  UINT64               PcdConfidentialComputingGuestAttr;\r
+  BOOLEAN              SevEsIsEnabled;\r
+\r
+  UINT32               BootMode;\r
+  BOOLEAN              S3Supported;\r
+\r
+  BOOLEAN              SmmSmramRequire;\r
+  BOOLEAN              Q35SmramAtDefaultSmbase;\r
+  UINT16               Q35TsegMbytes;\r
+\r
+  UINT64               FirstNonAddress;\r
+  UINT8                PhysMemAddressWidth;\r
+  UINT32               Uc32Base;\r
+  UINT32               Uc32Size;\r
+\r
+  BOOLEAN              PcdSetNxForStack;\r
+  UINT64               PcdTdxSharedBitMask;\r
+\r
+  UINT64               PcdPciMmio64Base;\r
+  UINT64               PcdPciMmio64Size;\r
+  UINT32               PcdPciMmio32Base;\r
+  UINT32               PcdPciMmio32Size;\r
+  UINT64               PcdPciIoBase;\r
+  UINT64               PcdPciIoSize;\r
+\r
+  UINT64               PcdEmuVariableNvStoreReserved;\r
+  UINT32               PcdCpuBootLogicalProcessorNumber;\r
+  UINT32               PcdCpuMaxLogicalProcessorNumber;\r
+  UINT32               DefaultMaxCpuNumber;\r
+\r
+  UINT32               S3AcpiReservedMemoryBase;\r
+  UINT32               S3AcpiReservedMemorySize;\r
+} EFI_HOB_PLATFORM_INFO;\r
+#pragma pack()\r
+\r
+/**\r
+  Reads 8-bits of CMOS data.\r
+\r
+  Reads the 8-bits of CMOS data at the location specified by Index.\r
+  The 8-bit read value is returned.\r
+\r
+  @param  Index  The CMOS location to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PlatformCmosRead8 (\r
+  IN      UINTN  Index\r
+  );\r
+\r
+/**\r
+  Writes 8-bits of CMOS data.\r
+\r
+  Writes 8-bits of CMOS data to the location specified by Index\r
+  with the value specified by Value and returns Value.\r
+\r
+  @param  Index  The CMOS location to write.\r
+  @param  Value  The value to write to CMOS.\r
+\r
+  @return The value written to CMOS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PlatformCmosWrite8 (\r
+  IN      UINTN  Index,\r
+  IN      UINT8  Value\r
+  );\r
+\r
+/**\r
+   Dump the CMOS content\r
+ */\r
+VOID\r
+EFIAPI\r
+PlatformDebugDumpCmos (\r
+  VOID\r
+  );\r
+\r
+#endif // PLATFORM_INIT_LIB_H_\r

diff --git a/OvmfPkg/Library/PlatformInitLib/Cmos.c b/OvmfPkg/Library/PlatformInitLib/Cmos.c
new file mode 100644 (file)
index 0000000..977aa97
--- /dev/null
+++ b/OvmfPkg/Library/PlatformInitLib/Cmos.c
@@ -0,0 +1,81 @@
+/** @file\r
+  PC/AT CMOS access routines\r
+\r
+  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+\r
+**/\r
+\r
+#include <Library/PlatformInitLib.h>\r
+#include <Library/DebugLib.h>\r
+#include "Library/IoLib.h"\r
+\r
+/**\r
+  Reads 8-bits of CMOS data.\r
+\r
+  Reads the 8-bits of CMOS data at the location specified by Index.\r
+  The 8-bit read value is returned.\r
+\r
+  @param  Index  The CMOS location to read.\r
+\r
+  @return The value read.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PlatformCmosRead8 (\r
+  IN      UINTN  Index\r
+  )\r
+{\r
+  IoWrite8 (0x70, (UINT8)Index);\r
+  return IoRead8 (0x71);\r
+}\r
+\r
+/**\r
+  Writes 8-bits of CMOS data.\r
+\r
+  Writes 8-bits of CMOS data to the location specified by Index\r
+  with the value specified by Value and returns Value.\r
+\r
+  @param  Index  The CMOS location to write.\r
+  @param  Value  The value to write to CMOS.\r
+\r
+  @return The value written to CMOS.\r
+\r
+**/\r
+UINT8\r
+EFIAPI\r
+PlatformCmosWrite8 (\r
+  IN      UINTN  Index,\r
+  IN      UINT8  Value\r
+  )\r
+{\r
+  IoWrite8 (0x70, (UINT8)Index);\r
+  IoWrite8 (0x71, Value);\r
+  return Value;\r
+}\r
+\r
+/**\r
+   Dump the CMOS content\r
+ */\r
+VOID\r
+EFIAPI\r
+PlatformDebugDumpCmos (\r
+  VOID\r
+  )\r
+{\r
+  UINT32  Loop;\r
+\r
+  DEBUG ((DEBUG_INFO, "CMOS:\n"));\r
+\r
+  for (Loop = 0; Loop < 0x80; Loop++) {\r
+    if ((Loop % 0x10) == 0) {\r
+      DEBUG ((DEBUG_INFO, "%02x:", Loop));\r
+    }\r
+\r
+    DEBUG ((DEBUG_INFO, " %02x", PlatformCmosRead8 (Loop)));\r
+    if ((Loop % 0x10) == 0xf) {\r
+      DEBUG ((DEBUG_INFO, "\n"));\r
+    }\r
+  }\r
+}\r

diff --git a/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
new file mode 100644 (file)
index 0000000..4ea2da8
--- /dev/null
+++ b/OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf
@@ -0,0 +1,36 @@
+## @file\r
+#  Platform Initialization Lib\r
+#\r
+#  This module provides platform specific function to detect boot mode.\r
+#  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
+#\r
+#  SPDX-License-Identifier: BSD-2-Clause-Patent\r
+#\r
+##\r
+\r
+[Defines]\r
+  INF_VERSION                    = 0x00010005\r
+  BASE_NAME                      = PlatformInitLib\r
+  FILE_GUID                      = 89f886b0-7109-46e1-9d28-503ad4ab6ee0\r
+  MODULE_TYPE                    = BASE\r
+  VERSION_STRING                 = 1.0\r
+  LIBRARY_CLASS                  = PlatformInitLib|PEIM\r
+\r
+#\r
+# The following information is for reference only and not required by the build tools.\r
+#\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC\r
+#\r
+\r
+[Sources]\r
+  Cmos.c\r
+\r
+[Packages]\r
+  MdeModulePkg/MdeModulePkg.dec\r
+  MdePkg/MdePkg.dec\r
+  OvmfPkg/OvmfPkg.dec\r
+\r
+[LibraryClasses]\r
+  BaseLib\r
+  DebugLib\r
+  IoLib\r

diff --git a/OvmfPkg/Microvm/MicrovmX64.dsc b/OvmfPkg/Microvm/MicrovmX64.dsc
index 1ea43443ae9762cb45442963ac0f491a5aacfed5..27005eec89f29dd214c5eb25208a3352aad80782 100644 (file)
--- a/OvmfPkg/Microvm/MicrovmX64.dsc
+++ b/OvmfPkg/Microvm/MicrovmX64.dsc
@@ -300,6 +300,7 @@
   QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf\r
 \r
   MemEncryptSevLib|OvmfPkg/Library/BaseMemEncryptSevLib/PeiMemEncryptSevLib.inf\r
+  PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf\r
 \r
 [LibraryClasses.common.DXE_CORE]\r
   HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf\r

diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec
index d373b5d6042eb79edd539b6e9c636e8d71bcea6a..61635c73c761e3624e714667f20e9286e73a9848 100644 (file)
--- a/OvmfPkg/OvmfPkg.dec
+++ b/OvmfPkg/OvmfPkg.dec
@@ -113,6 +113,10 @@
   #\r
   TdxMailboxLib|Include/Library/TdxMailboxLib.h\r
 \r
+  ##  @libraryclass  PlatformInitLib\r
+  #\r
+  PlatformInitLib|Include/Library/PlatformInitLib.h\r
+\r
 [Guids]\r
   gUefiOvmfPkgTokenSpaceGuid            = {0x93bb96af, 0xb9f2, 0x4eb8, {0x94, 0x62, 0xe0, 0xba, 0x74, 0x56, 0x42, 0x36}}\r
   gEfiXenInfoGuid                       = {0xd3b46f3b, 0xd441, 0x1244, {0x9a, 0x12, 0x0, 0x12, 0x27, 0x3f, 0xc1, 0x4d}}\r

diff --git a/OvmfPkg/OvmfPkgIa32.dsc b/OvmfPkg/OvmfPkgIa32.dsc
index 85abed24c1a72bbce4d9302dcff5727adc4074a4..8f02dca6386929a58ef1f624587d38de44af087b 100644 (file)
--- a/OvmfPkg/OvmfPkgIa32.dsc
+++ b/OvmfPkg/OvmfPkgIa32.dsc
@@ -300,6 +300,7 @@
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf\r
   PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
   QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf\r
+  PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf\r
 \r
 !include OvmfPkg/OvmfTpmLibsPeim.dsc.inc\r
 \r

diff --git a/OvmfPkg/OvmfPkgIa32X64.dsc b/OvmfPkg/OvmfPkgIa32X64.dsc
index a9c1daecc1a86e47f763424bc2f6c0f22cfa8ea4..c58ef8494470fa39a3cfdf35363095a02740ea48 100644 (file)
--- a/OvmfPkg/OvmfPkgIa32X64.dsc
+++ b/OvmfPkg/OvmfPkgIa32X64.dsc
@@ -304,6 +304,7 @@
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf\r
   PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
   QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf\r
+  PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf\r
 \r
 !include OvmfPkg/OvmfTpmLibsPeim.dsc.inc\r
 \r

diff --git a/OvmfPkg/OvmfPkgX64.dsc b/OvmfPkg/OvmfPkgX64.dsc
index 718399299f574ae30205aca8585f8e70787f94c4..227b9845619f07deb02940d4cc6cf3721326cc8d 100644 (file)
--- a/OvmfPkg/OvmfPkgX64.dsc
+++ b/OvmfPkg/OvmfPkgX64.dsc
@@ -305,6 +305,7 @@
   QemuFwCfgS3Lib|OvmfPkg/Library/QemuFwCfgS3Lib/PeiQemuFwCfgS3LibFwCfg.inf\r
   PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
   QemuFwCfgLib|OvmfPkg/Library/QemuFwCfgLib/QemuFwCfgPeiLib.inf\r
+  PlatformInitLib|OvmfPkg/Library/PlatformInitLib/PlatformInitLib.inf\r
 \r
 !include OvmfPkg/OvmfTpmLibsPeim.dsc.inc\r
 \r

diff --git a/OvmfPkg/PlatformPei/Cmos.c b/OvmfPkg/PlatformPei/Cmos.c
deleted file mode 100644 (file)
index a01b386..0000000
--- a/OvmfPkg/PlatformPei/Cmos.c
+++ /dev/null
@@ -1,55 +0,0 @@
-/** @file\r
-  PC/AT CMOS access routines\r
-\r
-  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
-  SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#include "Cmos.h"\r
-#include "Library/IoLib.h"\r
-\r
-/**\r
-  Reads 8-bits of CMOS data.\r
-\r
-  Reads the 8-bits of CMOS data at the location specified by Index.\r
-  The 8-bit read value is returned.\r
-\r
-  @param  Index  The CMOS location to read.\r
-\r
-  @return The value read.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-CmosRead8 (\r
-  IN      UINTN  Index\r
-  )\r
-{\r
-  IoWrite8 (0x70, (UINT8)Index);\r
-  return IoRead8 (0x71);\r
-}\r
-\r
-/**\r
-  Writes 8-bits of CMOS data.\r
-\r
-  Writes 8-bits of CMOS data to the location specified by Index\r
-  with the value specified by Value and returns Value.\r
-\r
-  @param  Index  The CMOS location to write.\r
-  @param  Value  The value to write to CMOS.\r
-\r
-  @return The value written to CMOS.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-CmosWrite8 (\r
-  IN      UINTN  Index,\r
-  IN      UINT8  Value\r
-  )\r
-{\r
-  IoWrite8 (0x70, (UINT8)Index);\r
-  IoWrite8 (0x71, Value);\r
-  return Value;\r
-}\r

diff --git a/OvmfPkg/PlatformPei/Cmos.h b/OvmfPkg/PlatformPei/Cmos.h
deleted file mode 100644 (file)
index 2b3124d..0000000
--- a/OvmfPkg/PlatformPei/Cmos.h
+++ /dev/null
@@ -1,48 +0,0 @@
-/** @file\r
-  PC/AT CMOS access routines\r
-\r
-  Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
-  SPDX-License-Identifier: BSD-2-Clause-Patent\r
-\r
-**/\r
-\r
-#ifndef __CMOS_H__\r
-#define __CMOS_H__\r
-\r
-/**\r
-  Reads 8-bits of CMOS data.\r
-\r
-  Reads the 8-bits of CMOS data at the location specified by Index.\r
-  The 8-bit read value is returned.\r
-\r
-  @param  Index  The CMOS location to read.\r
-\r
-  @return The value read.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-CmosRead8 (\r
-  IN      UINTN  Index\r
-  );\r
-\r
-/**\r
-  Writes 8-bits of CMOS data.\r
-\r
-  Writes 8-bits of CMOS data to the location specified by Index\r
-  with the value specified by Value and returns Value.\r
-\r
-  @param  Index  The CMOS location to write.\r
-  @param  Value  The value to write to CMOS.\r
-\r
-  @return The value written to CMOS.\r
-\r
-**/\r
-UINT8\r
-EFIAPI\r
-CmosWrite8 (\r
-  IN      UINTN  Index,\r
-  IN      UINT8  Value\r
-  );\r
-\r
-#endif\r

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 8ecc8257f9b9315f56e7d479424969a6fa19c201..9c5bf240e3baf34db374c4daa484bf6ad96ee8fa 100644 (file)
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -37,9 +37,9 @@ Module Name:
 #include <Library/MtrrLib.h>\r
 #include <Library/QemuFwCfgLib.h>\r
 #include <Library/QemuFwCfgSimpleParserLib.h>\r
+#include <Library/PlatformInitLib.h>\r
 \r
 #include "Platform.h"\r
-#include "Cmos.h"\r
 \r
 UINT8  mPhysMemAddressWidth;\r
 \r
@@ -412,8 +412,8 @@ GetSystemMemorySizeBelow4gb (
   //   into the calculation to get the total memory size.\r
   //\r
 \r
-  Cmos0x34 = (UINT8)CmosRead8 (0x34);\r
-  Cmos0x35 = (UINT8)CmosRead8 (0x35);\r
+  Cmos0x34 = (UINT8)PlatformCmosRead8 (0x34);\r
+  Cmos0x35 = (UINT8)PlatformCmosRead8 (0x35);\r
 \r
   return (UINT32)(((UINTN)((Cmos0x35 << 8) + Cmos0x34) << 16) + SIZE_16MB);\r
 }\r
@@ -436,7 +436,7 @@ GetSystemMemorySizeAbove4gb (
 \r
   Size = 0;\r
   for (CmosIndex = 0x5d; CmosIndex >= 0x5b; CmosIndex--) {\r
-    Size = (UINT32)(Size << 8) + (UINT32)CmosRead8 (CmosIndex);\r
+    Size = (UINT32)(Size << 8) + (UINT32)PlatformCmosRead8 (CmosIndex);\r
   }\r
 \r
   return LShiftU64 (Size, 16);\r

diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index d0323c6451621cadfee81c712e1c4d1156d99263..59489178644072886223c8b9a5cc2c9dd4fb8083 100644 (file)
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -36,10 +36,10 @@
 #include <IndustryStandard/Pci22.h>\r
 #include <IndustryStandard/Q35MchIch9.h>\r
 #include <IndustryStandard/QemuCpuHotplug.h>\r
+#include <Library/PlatformInitLib.h>\r
 #include <OvmfPlatforms.h>\r
 \r
 #include "Platform.h"\r
-#include "Cmos.h"\r
 \r
 EFI_PEI_PPI_DESCRIPTOR  mPpiBootMode[] = {\r
   {\r
@@ -505,11 +505,11 @@ BootModeInitialization (
 {\r
   EFI_STATUS  Status;\r
 \r
-  if (CmosRead8 (0xF) == 0xFE) {\r
+  if (PlatformCmosRead8 (0xF) == 0xFE) {\r
     mBootMode = BOOT_ON_S3_RESUME;\r
   }\r
 \r
-  CmosWrite8 (0xF, 0x00);\r
+  PlatformCmosWrite8 (0xF, 0x00);\r
 \r
   Status = PeiServicesSetBootMode (mBootMode);\r
   ASSERT_EFI_ERROR (Status);\r
@@ -546,27 +546,6 @@ ReserveEmuVariableNvStore (
   ASSERT_RETURN_ERROR (PcdStatus);\r
 }\r
 \r
-VOID\r
-DebugDumpCmos (\r
-  VOID\r
-  )\r
-{\r
-  UINT32  Loop;\r
-\r
-  DEBUG ((DEBUG_INFO, "CMOS:\n"));\r
-\r
-  for (Loop = 0; Loop < 0x80; Loop++) {\r
-    if ((Loop % 0x10) == 0) {\r
-      DEBUG ((DEBUG_INFO, "%02x:", Loop));\r
-    }\r
-\r
-    DEBUG ((DEBUG_INFO, " %02x", CmosRead8 (Loop)));\r
-    if ((Loop % 0x10) == 0xf) {\r
-      DEBUG ((DEBUG_INFO, "\n"));\r
-    }\r
-  }\r
-}\r
-\r
 VOID\r
 S3Verification (\r
   VOID\r
@@ -810,7 +789,7 @@ InitializePlatform (
 \r
   DEBUG ((DEBUG_INFO, "Platform PEIM Loaded\n"));\r
 \r
-  DebugDumpCmos ();\r
+  PlatformDebugDumpCmos ();\r
 \r
   if (QemuFwCfgS3Enabled ()) {\r
     DEBUG ((DEBUG_INFO, "S3 support was detected on QEMU\n"));\r

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 212aa7b04751fd5a931274f8b0d903b5de4e6858..f6bfc09c2dd5023670b19db5581024698c6e1258 100644 (file)
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -25,8 +25,6 @@
 [Sources]\r
   AmdSev.c\r
   ClearCache.c\r
-  Cmos.c\r
-  Cmos.h\r
   FeatureControl.c\r
   Fv.c\r
   MemDetect.c\r
@@ -64,6 +62,7 @@
   MemEncryptSevLib\r
   PcdLib\r
   VmgExitLib\r
+  PlatformInitLib\r
 \r
 [Pcd]\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase\r