MdePkg/BaseLib: Remove support of INTEL tool chain
authorShenglei Zhang <shenglei.zhang@intel.com>
Thu, 4 Apr 2019 08:53:43 +0000 (16:53 +0800)
committerLiming Gao <liming.gao@intel.com>
Wed, 24 Apr 2019 02:23:21 +0000 (10:23 +0800)
As Intel tool chain will be removed, support of INTEL tool chain
should be removed first.
https://bugzilla.tianocore.org/show_bug.cgi?id=1666

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Shenglei Zhang <shenglei.zhang@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
(cherry picked from commit dd611bfeaac249cebb6c12ffdcbbf510f8ed1980)

MdePkg/Library/BaseLib/BaseLib.inf

index 44ad37a..533e83e 100644 (file)
   Ia32/EnablePaging32.c | MSFT\r
   Ia32/EnableInterrupts.c | MSFT\r
   Ia32/EnableDisableInterrupts.c | MSFT\r
-  Ia32/DivU64x64Remainder.nasm| MSFT\r
   Ia32/DivU64x32Remainder.c | MSFT\r
   Ia32/DivU64x32.c | MSFT\r
   Ia32/DisablePaging32.c | MSFT\r
   Ia32/CpuId.c | MSFT\r
   Ia32/CpuBreakpoint.c | MSFT\r
   Ia32/ARShiftU64.c | MSFT\r
-  Ia32/Thunk16.nasm | MSFT\r
-  Ia32/EnablePaging64.nasm| MSFT\r
   Ia32/EnableCache.c | MSFT\r
   Ia32/DisableCache.c | MSFT\r
-  Ia32/RdRand.nasm| MSFT\r
 \r
-  Ia32/Wbinvd.nasm| INTEL\r
-  Ia32/WriteMm7.nasm| INTEL\r
-  Ia32/WriteMm6.nasm| INTEL\r
-  Ia32/WriteMm5.nasm| INTEL\r
-  Ia32/WriteMm4.nasm| INTEL\r
-  Ia32/WriteMm3.nasm| INTEL\r
-  Ia32/WriteMm2.nasm| INTEL\r
-  Ia32/WriteMm1.nasm| INTEL\r
-  Ia32/WriteMm0.nasm| INTEL\r
-  Ia32/WriteLdtr.nasm| INTEL\r
-  Ia32/WriteIdtr.nasm| INTEL\r
-  Ia32/WriteGdtr.nasm| INTEL\r
-  Ia32/WriteDr7.nasm| INTEL\r
-  Ia32/WriteDr6.nasm| INTEL\r
-  Ia32/WriteDr5.nasm| INTEL\r
-  Ia32/WriteDr4.nasm| INTEL\r
-  Ia32/WriteDr3.nasm| INTEL\r
-  Ia32/WriteDr2.nasm| INTEL\r
-  Ia32/WriteDr1.nasm| INTEL\r
-  Ia32/WriteDr0.nasm| INTEL\r
-  Ia32/WriteCr4.nasm| INTEL\r
-  Ia32/WriteCr3.nasm| INTEL\r
-  Ia32/WriteCr2.nasm| INTEL\r
-  Ia32/WriteCr0.nasm| INTEL\r
-  Ia32/WriteMsr64.nasm| INTEL\r
-  Ia32/SwapBytes64.nasm| INTEL\r
-  Ia32/RRotU64.nasm| INTEL\r
-  Ia32/RShiftU64.nasm| INTEL\r
-  Ia32/ReadPmc.nasm| INTEL\r
-  Ia32/ReadTsc.nasm| INTEL\r
-  Ia32/ReadLdtr.nasm| INTEL\r
-  Ia32/ReadIdtr.nasm| INTEL\r
-  Ia32/ReadGdtr.nasm| INTEL\r
-  Ia32/ReadTr.nasm| INTEL\r
-  Ia32/ReadSs.nasm| INTEL\r
-  Ia32/ReadGs.nasm| INTEL\r
-  Ia32/ReadFs.nasm| INTEL\r
-  Ia32/ReadEs.nasm| INTEL\r
-  Ia32/ReadDs.nasm| INTEL\r
-  Ia32/ReadCs.nasm| INTEL\r
-  Ia32/ReadMsr64.nasm| INTEL\r
-  Ia32/ReadMm7.nasm| INTEL\r
-  Ia32/ReadMm6.nasm| INTEL\r
-  Ia32/ReadMm5.nasm| INTEL\r
-  Ia32/ReadMm4.nasm| INTEL\r
-  Ia32/ReadMm3.nasm| INTEL\r
-  Ia32/ReadMm2.nasm| INTEL\r
-  Ia32/ReadMm1.nasm| INTEL\r
-  Ia32/ReadMm0.nasm| INTEL\r
-  Ia32/ReadEflags.nasm| INTEL\r
-  Ia32/ReadDr7.nasm| INTEL\r
-  Ia32/ReadDr6.nasm| INTEL\r
-  Ia32/ReadDr5.nasm| INTEL\r
-  Ia32/ReadDr4.nasm| INTEL\r
-  Ia32/ReadDr3.nasm| INTEL\r
-  Ia32/ReadDr2.nasm| INTEL\r
-  Ia32/ReadDr1.nasm| INTEL\r
-  Ia32/ReadDr0.nasm| INTEL\r
-  Ia32/ReadCr4.nasm| INTEL\r
-  Ia32/ReadCr3.nasm| INTEL\r
-  Ia32/ReadCr2.nasm| INTEL\r
-  Ia32/ReadCr0.nasm| INTEL\r
-  Ia32/Mwait.nasm| INTEL\r
-  Ia32/Monitor.nasm| INTEL\r
-  Ia32/ModU64x32.nasm| INTEL\r
-  Ia32/MultU64x64.nasm| INTEL\r
-  Ia32/MultU64x32.nasm| INTEL\r
-  Ia32/LShiftU64.nasm| INTEL\r
-  Ia32/LRotU64.nasm| INTEL\r
-  Ia32/Invd.nasm| INTEL\r
-  Ia32/FxRestore.nasm| INTEL\r
-  Ia32/FxSave.nasm| INTEL\r
-  Ia32/FlushCacheLine.nasm| INTEL\r
-  Ia32/EnablePaging32.nasm| INTEL\r
-  Ia32/EnableInterrupts.nasm| INTEL\r
-  Ia32/EnableDisableInterrupts.nasm| INTEL\r
-  Ia32/DivU64x64Remainder.nasm| INTEL\r
-  Ia32/DivU64x32Remainder.nasm| INTEL\r
-  Ia32/DivU64x32.nasm| INTEL\r
-  Ia32/DisablePaging32.nasm| INTEL\r
-  Ia32/DisableInterrupts.nasm| INTEL\r
-  Ia32/CpuPause.nasm| INTEL\r
-  Ia32/CpuIdEx.nasm| INTEL\r
-  Ia32/CpuId.nasm| INTEL\r
-  Ia32/CpuBreakpoint.nasm| INTEL\r
-  Ia32/ARShiftU64.nasm| INTEL\r
-  Ia32/Thunk16.nasm | INTEL\r
-  Ia32/EnablePaging64.nasm| INTEL\r
-  Ia32/EnableCache.nasm| INTEL\r
-  Ia32/DisableCache.nasm| INTEL\r
-  Ia32/RdRand.nasm| INTEL\r
 \r
   Ia32/GccInline.c | GCC\r
-  Ia32/Thunk16.nasm | GCC\r
+  Ia32/Thunk16.nasm\r
   Ia32/EnableDisableInterrupts.nasm| GCC\r
-  Ia32/EnablePaging64.nasm| GCC\r
+  Ia32/EnablePaging64.nasm\r
   Ia32/DisablePaging32.nasm| GCC\r
   Ia32/EnablePaging32.nasm| GCC\r
   Ia32/Mwait.nasm| GCC\r
   Ia32/LongJump.nasm\r
   Ia32/SetJump.nasm\r
   Ia32/SwapBytes64.nasm| GCC\r
-  Ia32/DivU64x64Remainder.nasm| GCC\r
+  Ia32/DivU64x64Remainder.nasm\r
   Ia32/DivU64x32Remainder.nasm| GCC\r
   Ia32/ModU64x32.nasm| GCC\r
   Ia32/DivU64x32.nasm| GCC\r
   Ia32/LShiftU64.nasm| GCC\r
   Ia32/EnableCache.nasm| GCC\r
   Ia32/DisableCache.nasm| GCC\r
-  Ia32/RdRand.nasm| GCC\r
+  Ia32/RdRand.nasm\r
 \r
   Ia32/DivS64x64Remainder.c\r
   Ia32/InternalSwitchStack.c | MSFT\r
-  Ia32/InternalSwitchStack.c | INTEL\r
   Ia32/InternalSwitchStack.nasm | GCC\r
   Ia32/Non-existing.c\r
   Unaligned.c\r
   X86ReadGdtr.c\r
   X86Msr.c\r
   X86MemoryFence.c | MSFT\r
-  X86MemoryFence.c | INTEL\r
   X86GetInterruptState.c\r
   X86FxSave.c\r
   X86FxRestore.c\r
   X64/CpuBreakpoint.c | MSFT\r
   X64/WriteMsr64.c | MSFT\r
   X64/ReadMsr64.c | MSFT\r
-  X64/RdRand.nasm| MSFT\r
   X64/CpuPause.nasm| MSFT\r
-  X64/EnableDisableInterrupts.nasm| MSFT\r
   X64/DisableInterrupts.nasm| MSFT\r
   X64/EnableInterrupts.nasm| MSFT\r
   X64/FlushCacheLine.nasm| MSFT\r
   X64/Invd.nasm| MSFT\r
   X64/Wbinvd.nasm| MSFT\r
-  X64/DisablePaging64.nasm| MSFT\r
   X64/Mwait.nasm| MSFT\r
   X64/Monitor.nasm| MSFT\r
   X64/ReadPmc.nasm| MSFT\r
   X64/ReadCr0.nasm| MSFT\r
   X64/ReadEflags.nasm| MSFT\r
 \r
-  X64/CpuBreakpoint.nasm| INTEL\r
-  X64/WriteMsr64.nasm| INTEL\r
-  X64/ReadMsr64.nasm| INTEL\r
-  X64/RdRand.nasm| INTEL\r
-  X64/CpuPause.nasm| INTEL\r
-  X64/EnableDisableInterrupts.nasm| INTEL\r
-  X64/DisableInterrupts.nasm| INTEL\r
-  X64/EnableInterrupts.nasm| INTEL\r
-  X64/FlushCacheLine.nasm| INTEL\r
-  X64/Invd.nasm| INTEL\r
-  X64/Wbinvd.nasm| INTEL\r
-  X64/DisablePaging64.nasm| INTEL\r
-  X64/Mwait.nasm| INTEL\r
-  X64/Monitor.nasm| INTEL\r
-  X64/ReadPmc.nasm| INTEL\r
-  X64/ReadTsc.nasm| INTEL\r
-  X64/WriteMm7.nasm| INTEL\r
-  X64/WriteMm6.nasm| INTEL\r
-  X64/WriteMm5.nasm| INTEL\r
-  X64/WriteMm4.nasm| INTEL\r
-  X64/WriteMm3.nasm| INTEL\r
-  X64/WriteMm2.nasm| INTEL\r
-  X64/WriteMm1.nasm| INTEL\r
-  X64/WriteMm0.nasm| INTEL\r
-  X64/ReadMm7.nasm| INTEL\r
-  X64/ReadMm6.nasm| INTEL\r
-  X64/ReadMm5.nasm| INTEL\r
-  X64/ReadMm4.nasm| INTEL\r
-  X64/ReadMm3.nasm| INTEL\r
-  X64/ReadMm2.nasm| INTEL\r
-  X64/ReadMm1.nasm| INTEL\r
-  X64/ReadMm0.nasm| INTEL\r
-  X64/FxRestore.nasm| INTEL\r
-  X64/FxSave.nasm| INTEL\r
-  X64/WriteLdtr.nasm| INTEL\r
-  X64/ReadLdtr.nasm| INTEL\r
-  X64/WriteIdtr.nasm| INTEL\r
-  X64/ReadIdtr.nasm| INTEL\r
-  X64/WriteGdtr.nasm| INTEL\r
-  X64/ReadGdtr.nasm| INTEL\r
-  X64/ReadTr.nasm| INTEL\r
-  X64/ReadSs.nasm| INTEL\r
-  X64/ReadGs.nasm| INTEL\r
-  X64/ReadFs.nasm| INTEL\r
-  X64/ReadEs.nasm| INTEL\r
-  X64/ReadDs.nasm| INTEL\r
-  X64/ReadCs.nasm| INTEL\r
-  X64/WriteDr7.nasm| INTEL\r
-  X64/WriteDr6.nasm| INTEL\r
-  X64/WriteDr5.nasm| INTEL\r
-  X64/WriteDr4.nasm| INTEL\r
-  X64/WriteDr3.nasm| INTEL\r
-  X64/WriteDr2.nasm| INTEL\r
-  X64/WriteDr1.nasm| INTEL\r
-  X64/WriteDr0.nasm| INTEL\r
-  X64/ReadDr7.nasm| INTEL\r
-  X64/ReadDr6.nasm| INTEL\r
-  X64/ReadDr5.nasm| INTEL\r
-  X64/ReadDr4.nasm| INTEL\r
-  X64/ReadDr3.nasm| INTEL\r
-  X64/ReadDr2.nasm| INTEL\r
-  X64/ReadDr1.nasm| INTEL\r
-  X64/ReadDr0.nasm| INTEL\r
-  X64/WriteCr4.nasm| INTEL\r
-  X64/WriteCr3.nasm| INTEL\r
-  X64/WriteCr2.nasm| INTEL\r
-  X64/WriteCr0.nasm| INTEL\r
-  X64/ReadCr4.nasm| INTEL\r
-  X64/ReadCr3.nasm| INTEL\r
-  X64/ReadCr2.nasm| INTEL\r
-  X64/ReadCr0.nasm| INTEL\r
-  X64/ReadEflags.nasm| INTEL\r
 \r
   X64/Non-existing.c\r
   Math64.c\r
   X86ReadGdtr.c\r
   X86Msr.c\r
   X86MemoryFence.c | MSFT\r
-  X86MemoryFence.c | INTEL\r
   X86GetInterruptState.c\r
   X86FxSave.c\r
   X86FxRestore.c\r
   X86PatchInstruction.c\r
   X86SpeculationBarrier.c\r
   X64/GccInline.c | GCC\r
-  X64/SwitchStack.nasm| GCC\r
-  X64/SetJump.nasm| GCC\r
-  X64/LongJump.nasm| GCC\r
-  X64/EnableDisableInterrupts.nasm| GCC\r
-  X64/DisablePaging64.nasm| GCC\r
-  X64/CpuId.nasm| GCC\r
-  X64/CpuIdEx.nasm| GCC\r
-  X64/EnableCache.nasm| GCC\r
-  X64/DisableCache.nasm| GCC\r
-  X64/RdRand.nasm| GCC\r
+  X64/EnableDisableInterrupts.nasm\r
+  X64/DisablePaging64.nasm\r
+  X64/RdRand.nasm\r
   ChkStkGcc.c  | GCC\r
 \r
 [Sources.EBC]\r