UefiCpuPkg/CpuCommonFeaturesLib: Correct the CPU location check

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3424

Processor location information check needs to updated
When Core 0 is disabled.

In C1e.c, change MSR_FEATURE_CONFIG to MSR_NEHALEM_POWER_CTL in comments
to match the correct MSR name.

Signed-off-by: Daoxiang Li <daoxiang.li@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
index e6e5db75917c22f56ed308fd3349b4c4b37d80af..6f968573320260a41804b0c0af15cba2fc13893d 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/C1e.c
@@ -63,9 +63,9 @@ C1eInitialize (
 {\r
   //\r
   // The scope of C1EEnable bit in the MSR_NEHALEM_POWER_CTL is Package, only program\r
-  // MSR_FEATURE_CONFIG for thread 0 core 0 in each package.\r
+  // MSR_NEHALEM_POWER_CTL once for each package.\r
   //\r
-  if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {\r
+  if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {\r
   return RETURN_SUCCESS;\r
   }\r
 \r

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
index bb5d983d1f4be2c286c2bdfd92f5a0170a0047d0..a3a2861cee5b1b5865f0a5aeb82075d26a0296cc 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/MachineCheck.c
@@ -152,10 +152,10 @@ McaInitialize (
 \r
   //\r
   // The scope of MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS is package for below processor type, only program\r
-  // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS for thread 0 core 0 in each package.\r
+  // MSR_IA32_MC*_CTL/MSR_IA32_MC*_STATUS once for each package.\r
   //\r
   if (IS_NEHALEM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel)) {\r
-    if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {\r
+    if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {\r
       return RETURN_SUCCESS;\r
     }\r
   }\r

diff --git a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
index 8450c7ea3eafd2230cd27e35e91cbb8a57e6cc8e..3c4c1bc706ba5d5a4ab659ef19968b889bc7b79e 100644 (file)
--- a/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
+++ b/UefiCpuPkg/Library/CpuCommonFeaturesLib/Ppin.c
@@ -130,10 +130,10 @@ PpinInitialize (
   // Support function already check the processor which support PPIN feature, so this function not need\r
   // to check the processor again.\r
   //\r
-  // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL for\r
-  // thread 0 core 0 in each package.\r
+  // The scope of the MSR_IVY_BRIDGE_PPIN_CTL is package level, only program MSR_IVY_BRIDGE_PPIN_CTL\r
+  // once for each package.\r
   //\r
-  if ((CpuInfo->ProcessorInfo.Location.Thread != 0) || (CpuInfo->ProcessorInfo.Location.Core != 0)) {\r
+  if ((CpuInfo->First.Thread == 0) || (CpuInfo->First.Core == 0)) {\r
     return RETURN_SUCCESS;\r
   }\r
 \r