]> git.proxmox.com Git - mirror_edk2.git/commitdiff
ArmPlatformPkg/LcdPlatformLib: Produce the protocols EFI_EDID_DISCOVERED_PROTOCOL...
authoroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Wed, 14 Dec 2011 10:35:04 +0000 (10:35 +0000)
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>
Wed, 14 Dec 2011 10:35:04 +0000 (10:35 +0000)
These two EDID protocols are excepted to be produced by the GOP.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12860 6f19259b-4bc3-4df7-8a09-765794883524

ArmPlatformPkg/ArmRealViewEbPkg/Library/PL111LcdArmRealViewEbLib/PL111LcdArmRealViewEb.c
ArmPlatformPkg/ArmVExpressPkg/Library/PL111LcdArmVExpressLib/PL111LcdArmVExpress.c
ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c
ArmPlatformPkg/Include/Library/LcdPlatformLib.h

index c4140150f8d34f5d23c995fdb55da4f3be55c6cb..3b2f63fb666f6fba95c5931cf4673d09596e642b 100644 (file)
 \r
 #include <PiDxe.h>\r
 \r
 \r
 #include <PiDxe.h>\r
 \r
-#include <Library/LcdPlatformLib.h>\r
-#include <Library/IoLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/LcdPlatformLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+\r
+#include <Protocol/EdidDiscovered.h>\r
+#include <Protocol/EdidActive.h>\r
 \r
 #include <Drivers/PL111Lcd.h>\r
 \r
 \r
 #include <Drivers/PL111Lcd.h>\r
 \r
@@ -50,14 +54,33 @@ CLCD_RESOLUTION mResolutions[] = {
     }\r
 };\r
 \r
     }\r
 };\r
 \r
+EFI_EDID_DISCOVERED_PROTOCOL  mEdidDiscovered = {\r
+  0,\r
+  NULL\r
+};\r
+\r
+EFI_EDID_ACTIVE_PROTOCOL      mEdidActive = {\r
+  0,\r
+  NULL\r
+};\r
 \r
 EFI_STATUS\r
 LcdPlatformInitializeDisplay (\r
 \r
 EFI_STATUS\r
 LcdPlatformInitializeDisplay (\r
-  VOID\r
+  IN EFI_HANDLE   Handle\r
   )\r
 {\r
   )\r
 {\r
+  EFI_STATUS  Status;\r
+\r
   MmioWrite32(ARM_EB_SYS_CLCD_REG, 1);\r
 \r
   MmioWrite32(ARM_EB_SYS_CLCD_REG, 1);\r
 \r
+  // Install the EDID Protocols\r
+  Status = gBS->InstallMultipleProtocolInterfaces(\r
+    &Handle,\r
+    &gEfiEdidDiscoveredProtocolGuid,  &mEdidDiscovered,\r
+    &gEfiEdidActiveProtocolGuid,      &mEdidActive,\r
+    NULL\r
+  );\r
+\r
   return EFI_SUCCESS;\r
 }\r
 \r
   return EFI_SUCCESS;\r
 }\r
 \r
index 31a3549f13a7d1cbb5d8768e5dc5af79cf9f4ca3..f6f01fa20df55d10a29eff591c8baaec81d8d10f 100644 (file)
@@ -21,6 +21,8 @@
 #include <Library/UefiBootServicesTableLib.h>\r
 \r
 #include <Protocol/Cpu.h>\r
 #include <Library/UefiBootServicesTableLib.h>\r
 \r
 #include <Protocol/Cpu.h>\r
+#include <Protocol/EdidDiscovered.h>\r
+#include <Protocol/EdidActive.h>\r
 \r
 #include <ArmPlatform.h>\r
 \r
 \r
 #include <ArmPlatform.h>\r
 \r
@@ -41,94 +43,119 @@ typedef struct {
 \r
 \r
 LCD_RESOLUTION mResolutions[] = {\r
 \r
 \r
 LCD_RESOLUTION mResolutions[] = {\r
-    { // Mode 0 : VGA : 640 x 480 x 24 bpp\r
-        VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,\r
-        VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
-        VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 1 : SVGA : 800 x 600 x 24 bpp\r
-        SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,\r
-        SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
-        SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 2 : XGA : 1024 x 768 x 24 bpp\r
-        XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,\r
-        XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
-        XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp\r
-        SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),\r
-        SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,\r
-        SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp\r
-        UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),\r
-        UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,\r
-        UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 5 : HD : 1920 x 1080 x 24 bpp\r
-        HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),\r
-        HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,\r
-        HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH\r
-    },\r
-    { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)\r
-        VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,\r
-        VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
-        VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)\r
-        SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,\r
-        SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
-        SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)\r
-        XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,\r
-        XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
-        XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 9 : VGA : 640 x 480 x 15 bpp\r
-        VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,\r
-        VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
-        VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 10 : SVGA : 800 x 600 x 15 bpp\r
-        SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,\r
-        SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
-        SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 11 : XGA : 1024 x 768 x 15 bpp\r
-        XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,\r
-        XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
-        XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings\r
-        XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,\r
-        XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
-        XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)\r
-        VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,\r
-        VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
-        VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)\r
-        SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,\r
-        SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
-        SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
-    },\r
-    { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)\r
-        XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,\r
-        XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
-        XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
-    }\r
+  { // Mode 0 : VGA : 640 x 480 x 24 bpp\r
+      VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, VGA_OSC_FREQUENCY,\r
+      VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+      VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 1 : SVGA : 800 x 600 x 24 bpp\r
+      SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, SVGA_OSC_FREQUENCY,\r
+      SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+      SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 2 : XGA : 1024 x 768 x 24 bpp\r
+      XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, XGA_OSC_FREQUENCY,\r
+      XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+      XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 3 : SXGA : 1280 x 1024 x 24 bpp\r
+      SXGA, SXGA_H_RES_PIXELS, SXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (SXGA_OSC_FREQUENCY/2),\r
+      SXGA_H_SYNC, SXGA_H_BACK_PORCH, SXGA_H_FRONT_PORCH,\r
+      SXGA_V_SYNC, SXGA_V_BACK_PORCH, SXGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 4 : UXGA : 1600 x 1200 x 24 bpp\r
+      UXGA, UXGA_H_RES_PIXELS, UXGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (UXGA_OSC_FREQUENCY/2),\r
+      UXGA_H_SYNC, UXGA_H_BACK_PORCH, UXGA_H_FRONT_PORCH,\r
+      UXGA_V_SYNC, UXGA_V_BACK_PORCH, UXGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 5 : HD : 1920 x 1080 x 24 bpp\r
+      HD, HD_H_RES_PIXELS, HD_V_RES_PIXELS, LCD_BITS_PER_PIXEL_24, (HD_OSC_FREQUENCY/2),\r
+      HD_H_SYNC, HD_H_BACK_PORCH, HD_H_FRONT_PORCH,\r
+      HD_V_SYNC, HD_V_BACK_PORCH, HD_V_FRONT_PORCH\r
+  },\r
+  { // Mode 6 : VGA : 640 x 480 x 16 bpp (565 Mode)\r
+      VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, VGA_OSC_FREQUENCY,\r
+      VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+      VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 7 : SVGA : 800 x 600 x 16 bpp (565 Mode)\r
+      SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, SVGA_OSC_FREQUENCY,\r
+      SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+      SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 8 : XGA : 1024 x 768 x 16 bpp (565 Mode)\r
+      XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_565, XGA_OSC_FREQUENCY,\r
+      XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+      XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 9 : VGA : 640 x 480 x 15 bpp\r
+      VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, VGA_OSC_FREQUENCY,\r
+      VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+      VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 10 : SVGA : 800 x 600 x 15 bpp\r
+      SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, SVGA_OSC_FREQUENCY,\r
+      SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+      SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 11 : XGA : 1024 x 768 x 15 bpp\r
+      XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, XGA_OSC_FREQUENCY,\r
+      XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+      XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 12 : XGA : 1024 x 768 x 15 bpp - All the timing info is derived from Linux Kernel Driver Settings\r
+      XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_16_555, 63500000,\r
+      XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+      XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 13 : VGA : 640 x 480 x 12 bpp (444 Mode)\r
+      VGA, VGA_H_RES_PIXELS, VGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, VGA_OSC_FREQUENCY,\r
+      VGA_H_SYNC, VGA_H_BACK_PORCH, VGA_H_FRONT_PORCH,\r
+      VGA_V_SYNC, VGA_V_BACK_PORCH, VGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 14 : SVGA : 800 x 600 x 12 bpp (444 Mode)\r
+      SVGA, SVGA_H_RES_PIXELS, SVGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, SVGA_OSC_FREQUENCY,\r
+      SVGA_H_SYNC, SVGA_H_BACK_PORCH, SVGA_H_FRONT_PORCH,\r
+      SVGA_V_SYNC, SVGA_V_BACK_PORCH, SVGA_V_FRONT_PORCH\r
+  },\r
+  { // Mode 15 : XGA : 1024 x 768 x 12 bpp (444 Mode)\r
+      XGA, XGA_H_RES_PIXELS, XGA_V_RES_PIXELS, LCD_BITS_PER_PIXEL_12_444, XGA_OSC_FREQUENCY,\r
+      XGA_H_SYNC, XGA_H_BACK_PORCH, XGA_H_FRONT_PORCH,\r
+      XGA_V_SYNC, XGA_V_BACK_PORCH, XGA_V_FRONT_PORCH\r
+  }\r
+};\r
+\r
+EFI_EDID_DISCOVERED_PROTOCOL  mEdidDiscovered = {\r
+  0,\r
+  NULL\r
 };\r
 \r
 };\r
 \r
+EFI_EDID_ACTIVE_PROTOCOL      mEdidActive = {\r
+  0,\r
+  NULL\r
+};\r
+\r
+\r
 EFI_STATUS\r
 LcdPlatformInitializeDisplay (\r
 EFI_STATUS\r
 LcdPlatformInitializeDisplay (\r
-  VOID\r
-  ) {\r
+  IN EFI_HANDLE   Handle\r
+  )\r
+{\r
+  EFI_STATUS  Status;\r
+\r
   // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard\r
   // Set the FPGA multiplexer to select the video output from the motherboard or the daughterboard\r
-  return ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);\r
+  Status = ArmPlatformSysConfigSet (SYS_CFG_MUXFPGA, PL111_CLCD_SITE);\r
+  if (!EFI_ERROR(Status)) {\r
+    // Install the EDID Protocols\r
+    Status = gBS->InstallMultipleProtocolInterfaces(\r
+      &Handle,\r
+      &gEfiEdidDiscoveredProtocolGuid,  &mEdidDiscovered,\r
+      &gEfiEdidActiveProtocolGuid,      &mEdidActive,\r
+      NULL\r
+    );\r
+  }\r
+\r
+  return Status;\r
 }\r
 \r
 EFI_STATUS\r
 }\r
 \r
 EFI_STATUS\r
index a0cf9afe2e8d7a3057262fa6299ca9775db62b98..229d2a6aa24627b2dd0f0d2c922778cabe6bb72e 100644 (file)
@@ -125,7 +125,7 @@ InitializeDisplay (
     goto EXIT_ERROR_LCD_SHUTDOWN;
   }
 
     goto EXIT_ERROR_LCD_SHUTDOWN;
   }
 
-  Status = LcdPlatformInitializeDisplay ();
+  Status = LcdPlatformInitializeDisplay (Instance->Handle);
   if (EFI_ERROR(Status)) {
     goto EXIT_ERROR_LCD_SHUTDOWN;
   }
   if (EFI_ERROR(Status)) {
     goto EXIT_ERROR_LCD_SHUTDOWN;
   }
index 93afa6322ec4dba181fc7cfe326a921dc408e88b..7a424c0ad7ca6613801fe9890646020f2ccdfc36 100644 (file)
@@ -158,7 +158,7 @@ typedef enum {
 \r
 EFI_STATUS\r
 LcdPlatformInitializeDisplay (\r
 \r
 EFI_STATUS\r
 LcdPlatformInitializeDisplay (\r
-  VOID\r
+  IN EFI_HANDLE   Handle\r
   );\r
 \r
 EFI_STATUS\r
   );\r
 \r
 EFI_STATUS\r