OvmfPkg/PlatformPei: detect SMRAM at default SMBASE (for real)

Now that the SMRAM at the default SMBASE is honored everywhere necessary,
implement the actual detection. The (simple) steps are described in
previous patch "OvmfPkg/IndustryStandard: add MCH_DEFAULT_SMBASE* register
macros".

Regarding CSM_ENABLE builds: according to the discussion with Jiewen at

  https://edk2.groups.io/g/devel/message/48082
  http://mid.mail-archive.com/74D8A39837DF1E4DA445A8C0B3885C503F7C9D2F@shsmsx102.ccr.corp.intel.com

if the platform has SMRAM at the default SMBASE, then we have to

(a) either punch a hole in the legacy E820 map as well, in
    LegacyBiosBuildE820() [OvmfPkg/Csm/LegacyBiosDxe/LegacyBootSupport.c],

(b) or document, or programmatically catch, the incompatibility between
    the "SMRAM at default SMBASE" and "CSM" features.

Because CSM is out of scope for the larger "VCPU hotplug with SMM"
feature, option (b) applies. Therefore, if the CSM is enabled in the OVMF
build, then PlatformPei will not attempt to detect SMRAM at the default
SMBASE, at all. This is approach (4) -- the most flexible one, for
end-users -- from:

  http://mid.mail-archive.com/868dcff2-ecaa-e1c6-f018-abe7087d640c@redhat.com
  https://edk2.groups.io/g/devel/message/48348

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20200129214412.2361-12-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

diff --git a/OvmfPkg/PlatformPei/MemDetect.c b/OvmfPkg/PlatformPei/MemDetect.c
index 8fdc9c2ed7c9676163e5a3afa1518a0a15ddeaba..47dc9c543719a0f55c4279140d23a8d5822b57f2 100644 (file)
--- a/OvmfPkg/PlatformPei/MemDetect.c
+++ b/OvmfPkg/PlatformPei/MemDetect.c
@@ -103,6 +103,22 @@ Q35SmramAtDefaultSmbaseInitialization (
   ASSERT (mHostBridgeDevId == INTEL_Q35_MCH_DEVICE_ID);\r
 \r
   mQ35SmramAtDefaultSmbase = FALSE;\r
+  if (FeaturePcdGet (PcdCsmEnable)) {\r
+    DEBUG ((DEBUG_INFO, "%a: SMRAM at default SMBASE not checked due to CSM\n",\r
+      __FUNCTION__));\r
+  } else {\r
+    UINTN CtlReg;\r
+    UINT8 CtlRegVal;\r
+\r
+    CtlReg = DRAMC_REGISTER_Q35 (MCH_DEFAULT_SMBASE_CTL);\r
+    PciWrite8 (CtlReg, MCH_DEFAULT_SMBASE_QUERY);\r
+    CtlRegVal = PciRead8 (CtlReg);\r
+    mQ35SmramAtDefaultSmbase = (BOOLEAN)(CtlRegVal ==\r
+                                         MCH_DEFAULT_SMBASE_IN_RAM);\r
+    DEBUG ((DEBUG_INFO, "%a: SMRAM at default SMBASE %a\n", __FUNCTION__,\r
+      mQ35SmramAtDefaultSmbase ? "found" : "not found"));\r
+  }\r
+\r
   PcdStatus = PcdSetBoolS (PcdQ35SmramAtDefaultSmbase,\r
                 mQ35SmramAtDefaultSmbase);\r
   ASSERT_RETURN_ERROR (PcdStatus);\r

diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index 25229618ed137f7979365530a7ce570bc5509fb7..c51a6176aa2e3693b8d6a42cb8852f08187f2505 100644 (file)
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -106,6 +106,7 @@
   gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress\r
 \r
 [FeaturePcd]\r
+  gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable\r
   gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire\r
 \r
 [Ppis]\r