By now OVMF makes MdeModulePkg/Bus/Pci/PciHostBridgeDxe go through
MMCONFIG (when running on Q35). Enable the driver to address each B/D/F's
config space up to and including offset 0xFFF.
Cc: Gabriel Somlo <somlo@cmu.edu>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Marcel Apfelbaum <marcel@redhat.com>
Cc: Michał Zegan <webczat_200@poczta.onet.pl>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Tested-by: Gabriel Somlo <somlo@cmu.edu>
Tested-by: Michał Zegan <webczat_200@poczta.onet.pl>
#include <PiDxe.h>\r
\r
#include <IndustryStandard/Pci.h>\r
+#include <IndustryStandard/Q35MchIch9.h>\r
\r
#include <Protocol/PciHostBridgeResourceAllocation.h>\r
#include <Protocol/PciRootBridgeIo.h>\r
RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +\r
(PcdGet64 (PcdPciMmio32Size) - 1);\r
\r
- RootBus->NoExtendedConfigSpace = TRUE;\r
+ RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) !=\r
+ INTEL_Q35_MCH_DEVICE_ID);\r
\r
DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate,\r
&mRootBridgeDevicePathTemplate);\r
gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r
+ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\r