UefiCpuPkg: Prevent from re-initializing CPU features during S3 resume

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3621
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3631

Current CPU feature initialization design:
During normal boot, CpuFeaturesPei module (inside FSP) initializes the
CPU features. During S3 boot, CpuFeaturesPei module does nothing, and
CpuSmm driver (in SMRAM) initializes CPU features instead.

This code change prevents CpuSmm driver from re-initializing CPU
features during S3 resume if CpuFeaturesPei module has done the same
initialization.

In addition, EDK2 contains DxeIpl PEIM that calls S3RestoreConfig2 PPI
during S3 boot and this PPI eventually calls CpuSmm driver (in SMRAM) to
initialize the CPU features, so "EDK2 + FSP" does not have the CPU
feature initialization issue during S3 boot. But "coreboot" does not
contain DxeIpl PEIM and the issue appears, unless
"PcdCpuFeaturesInitOnS3Resume" is set to TRUE.

Signed-off-by: Jason Lou <yun.lou@intel.com>
Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
index 2873cba08357c1f4225346daf7708b71d3f6d3b3..2496abb3923ff9e2655cc30c80b7591682b86f0e 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c
@@ -1152,23 +1152,31 @@ GetAcpiCpuData (
   mAcpiCpuData.ApMachineCheckHandlerBase = (EFI_PHYSICAL_ADDRESS)(UINTN)MachineCheckHandlerForAp;\r
 \r
   ZeroMem (&mAcpiCpuData.CpuFeatureInitData, sizeof (CPU_FEATURE_INIT_DATA));\r
-  CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);\r
 \r
-  CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;\r
+  if (!PcdGetBool (PcdCpuFeaturesInitOnS3Resume)) {\r
+    //\r
+    // If the CPU features will not be initialized by CpuFeaturesPei module during\r
+    // next ACPI S3 resume, copy the CPU features initialization data into SMRAM,\r
+    // which will be consumed in SmmRestoreCpu during next S3 resume.\r
+    //\r
+    CopyCpuFeatureInitDatatoSmram (&mAcpiCpuData.CpuFeatureInitData, &AcpiCpuData->CpuFeatureInitData);\r
 \r
-  mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (\r
-                                   sizeof (UINT32) * CpuStatus->PackageCount *\r
-                                   CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
-                                   );\r
-  ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);\r
+    CpuStatus = &mAcpiCpuData.CpuFeatureInitData.CpuStatus;\r
 \r
-  mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (\r
-                                      sizeof (UINT32) * CpuStatus->PackageCount *\r
-                                      CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
-                                      );\r
-  ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);\r
+    mCpuFlags.CoreSemaphoreCount = AllocateZeroPool (\r
+                                     sizeof (UINT32) * CpuStatus->PackageCount *\r
+                                     CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
+                                     );\r
+    ASSERT (mCpuFlags.CoreSemaphoreCount != NULL);\r
 \r
-  InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);\r
+    mCpuFlags.PackageSemaphoreCount = AllocateZeroPool (\r
+                                        sizeof (UINT32) * CpuStatus->PackageCount *\r
+                                        CpuStatus->MaxCoreCount * CpuStatus->MaxThreadCount\r
+                                        );\r
+    ASSERT (mCpuFlags.PackageSemaphoreCount != NULL);\r
+\r
+    InitializeSpinLock((SPIN_LOCK*) &mCpuFlags.MemoryMappedLock);\r
+  }\r
 }\r
 \r
 /**\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
index 76b14629967972683142bf4a466cb8db8c780724..0e88071c707921d60972f1e3f0c0ce01df597c8c 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
@@ -4,7 +4,7 @@
 # This SMM driver performs SMM initialization, deploy SMM Entry Vector,\r
 # provides CPU specific services in SMM.\r
 #\r
-# Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2009 - 2021, Intel Corporation. All rights reserved.<BR>\r
 # Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
 #\r
 # SPDX-License-Identifier: BSD-2-Clause-Patent\r
@@ -134,6 +134,7 @@
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmCodeAccessCheckEnable         ## CONSUMES\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmSyncMode                      ## CONSUMES\r
   gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmShadowStackSize               ## SOMETIMES_CONSUMES\r
+  gUefiCpuPkgTokenSpaceGuid.PcdCpuFeaturesInitOnS3Resume           ## CONSUMES\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable                   ## CONSUMES\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask    ## CONSUMES\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdNullPointerDetectionPropertyMask    ## CONSUMES\r