lock inc dword [edi]\r
\r
; AP init\r
- mov edi, esi\r
- add edi, MP_CPU_EXCHANGE_INFO_FIELD (Lock)\r
- mov eax, NotVacantFlag\r
-\r
mov edi, esi\r
add edi, MP_CPU_EXCHANGE_INFO_FIELD (ApIndex)\r
mov ebx, 1\r
;-------------------------------------------------------------------------------\r
%include "Nasm.inc"\r
\r
-VacantFlag equ 00h\r
-NotVacantFlag equ 0ffh\r
-\r
CPU_SWITCH_STATE_IDLE equ 0\r
CPU_SWITCH_STATE_STORED equ 1\r
CPU_SWITCH_STATE_LOADED equ 2\r
; Equivalent NASM structure of MP_CPU_EXCHANGE_INFO\r
;\r
struc MP_CPU_EXCHANGE_INFO\r
- .Lock: CTYPE_UINTN 1\r
.StackStart: CTYPE_UINTN 1\r
.StackSize: CTYPE_UINTN 1\r
.CFunction: CTYPE_UINTN 1\r
IA32_CR4 Cr4;\r
\r
ExchangeInfo = CpuMpData->MpCpuExchangeInfo;\r
- ExchangeInfo->Lock = 0;\r
ExchangeInfo->StackStart = CpuMpData->Buffer;\r
ExchangeInfo->StackSize = CpuMpData->CpuApStackSize;\r
ExchangeInfo->BufferStart = CpuMpData->WakeupBuffer;\r
/** @file\r
Common header file for MP Initialize Library.\r
\r
- Copyright (c) 2016 - 2020, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r
Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r
\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
// into this structure are used in assembly code in this module\r
//\r
typedef struct {\r
- UINTN Lock;\r
UINTN StackStart;\r
UINTN StackSize;\r
UINTN CFunction;\r
lock inc dword [edi]\r
\r
; AP init\r
- mov edi, esi\r
- add edi, MP_CPU_EXCHANGE_INFO_FIELD (Lock)\r
- mov rax, NotVacantFlag\r
-\r
mov edi, esi\r
add edi, MP_CPU_EXCHANGE_INFO_FIELD (ApIndex)\r
mov ebx, 1\r