Fsp1.1 update.

Update ApiEntry.asm to use MACRO instead of direct XMM access.
Add sanity parameter check for FSP API.
Add sanity return code check for internal API.
Call LoadUcode before CarInit to meet silicon requirement.
Remove unnecessary VpdBase for PatchTable.
Add ASSERT for NULL check FSP1.1 entrypoint.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Rangarajan, Ravi P" <ravi.p.rangarajan@intel.com>
Reviewed-by: "Ma, Maurice" <maurice.ma@intel.com>
Reviewed-by: "Mudusuru, Giri P" <giri.p.mudusuru@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16834 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index 6c330833e047e19204a819cdc9e2fac25d55b68b..7c6e60f0d14f332eea203bedc144a9c2480e229c 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -41,9 +41,8 @@ EXTERN   GetFspBaseAddress:PROC
 EXTERN   GetBootFirmwareVolumeOffset:PROC\r
 EXTERN   Pei2LoaderSwitchStack:PROC\r
 EXTERN   FspSelfCheck(FspSelfCheckDflt):PROC\r
 EXTERN   GetBootFirmwareVolumeOffset:PROC\r
 EXTERN   Pei2LoaderSwitchStack:PROC\r
 EXTERN   FspSelfCheck(FspSelfCheckDflt):PROC\r

-EXTERN   PlatformBasicInit(PlatformBasicInitDflt):PROC\r

 EXTERN   LoadUcode(LoadUcodeDflt):PROC\r
 EXTERN   LoadUcode(LoadUcodeDflt):PROC\r

-EXTERN   SecPlatformInit:PROC\r
+EXTERN   SecPlatformInit(SecPlatformInitDflt):PROC\r

 EXTERN   SecCarInit:PROC\r
 \r
 ;\r
 EXTERN   SecCarInit:PROC\r
 \r
 ;\r


@@ -101,7 +100,7 @@ exit:
 FspSelfCheckDflt   ENDP\r
 \r
 ;------------------------------------------------------------------------------\r
 FspSelfCheckDflt   ENDP\r
 \r
 ;------------------------------------------------------------------------------\r

-PlatformBasicInitDflt PROC NEAR PUBLIC\r
+SecPlatformInitDflt PROC NEAR PUBLIC\r

    ; Inputs:\r
    ;   eax -> Return address\r
    ; Outputs:\r
    ; Inputs:\r
    ;   eax -> Return address\r
    ; Outputs:\r


@@ -116,7 +115,7 @@ PlatformBasicInitDflt PROC NEAR PUBLIC
    xor   eax, eax\r
 exit:\r
    jmp   ebp\r
    xor   eax, eax\r
 exit:\r
    jmp   ebp\r

-PlatformBasicInitDflt   ENDP\r
+SecPlatformInitDflt   ENDP\r

 \r
 ;------------------------------------------------------------------------------\r
 LoadUcodeDflt   PROC  NEAR PUBLIC\r
 \r
 ;------------------------------------------------------------------------------\r
 LoadUcodeDflt   PROC  NEAR PUBLIC\r


@@ -304,7 +303,6 @@ exit:
 LoadUcodeDflt   ENDP\r
 \r
 EstablishStackFsp    PROC    NEAR    PRIVATE\r
 LoadUcodeDflt   ENDP\r
 \r
 EstablishStackFsp    PROC    NEAR    PRIVATE\r

-  ; Following is the code copied from BYTFSP, need to figure out what it is doing..\r

   ;\r
   ; Save parameter pointer in edx  \r
   ;\r
   ;\r
   ; Save parameter pointer in edx  \r
   ;\r


@@ -336,9 +334,9 @@ InvalidMicrocodeRegion:
   ;\r
   push      DATA_LEN_OF_PER0     ; Size of the data region \r
   push      30524550h            ; Signature of the  data region 'PER0'\r
   ;\r
   push      DATA_LEN_OF_PER0     ; Size of the data region \r
   push      30524550h            ; Signature of the  data region 'PER0'\r

-  movd      eax, xmm4\r
-  push      eax\r
-  movd      eax, xmm5\r
+  LOAD_EDX\r
+  push      edx\r
+  LOAD_EAX\r

   push      eax\r
   rdtsc\r
   push      edx\r
   push      eax\r
   rdtsc\r
   push      edx\r


@@ -387,9 +385,17 @@ TempRamInitApi   PROC    NEAR    PUBLIC
   ; Save timestamp into XMM4 & XMM5\r
   ;\r
   rdtsc\r
   ; Save timestamp into XMM4 & XMM5\r
   ;\r
   rdtsc\r

-  movd      xmm4, edx\r
-  movd      xmm5, eax\r
-  \r
+  SAVE_EAX\r
+  SAVE_EDX\r
+\r
+  ;\r
+  ; Check Parameter\r
+  ;\r
+  mov       eax, dword ptr [esp + 4]\r
+  cmp       eax, 0\r
+  mov       eax, 80000002h\r
+  jz        NemInitExit\r
+\r

   ;\r
   ; CPUID/DeviceID check\r
   ;\r
   ;\r
   ; CPUID/DeviceID check\r
   ;\r


@@ -400,16 +406,22 @@ TempRamInitApi   PROC    NEAR    PUBLIC
   jnz       NemInitExit\r
 \r
   CALL_MMX  SecPlatformInit\r
   jnz       NemInitExit\r
 \r
   CALL_MMX  SecPlatformInit\r

-\r
-  ; Call Sec CAR Init\r
-  CALL_MMX  SecCarInit\r
+  cmp       eax, 0\r
+  jnz       NemInitExit\r

   \r
   \r

-  ; @todo: ESP has been modified, we need to restore here.\r
-  LOAD_REGS\r
-  SAVE_REGS\r

   ; Load microcode\r
   ; Load microcode\r

+  LOAD_ESP\r

   CALL_MMX  LoadUcode\r
   CALL_MMX  LoadUcode\r

+  cmp       eax, 0\r
+  jnz       NemInitExit\r
+\r
+  ; Call Sec CAR Init\r
+  LOAD_ESP\r
+  CALL_MMX  SecCarInit\r
+  cmp       eax, 0\r
+  jnz       NemInitExit\r

 \r
 \r

+  LOAD_ESP\r

   CALL_MMX  EstablishStackFsp\r
 \r
 NemInitExit:\r
   CALL_MMX  EstablishStackFsp\r
 \r
 NemInitExit:\r

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
index 203efd9e424c58afa27113393aa404345d3de48e..995aef6088e9f160a5be03cfa1305a7041546e98 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.s
@@ -205,7 +205,7 @@ FspSelfCheckDfltExit:
 \r
 \r
 #------------------------------------------------------------------------------\r
 \r
 \r
 #------------------------------------------------------------------------------\r

-# PlatformBasicInitDflt\r
+# SecPlatformInitDflt\r

 # Inputs:\r
 #   eax -> Return address\r
 # Outputs:\r
 # Inputs:\r
 #   eax -> Return address\r
 # Outputs:\r


@@ -214,15 +214,15 @@ FspSelfCheckDfltExit:
 #   eax is cleared and ebp is used for return address.\r
 #   All others reserved.\r
 #------------------------------------------------------------------------------\r
 #   eax is cleared and ebp is used for return address.\r
 #   All others reserved.\r
 #------------------------------------------------------------------------------\r

-ASM_GLOBAL ASM_PFX(PlatformBasicInitDflt)\r
-ASM_PFX(PlatformBasicInitDflt):\r
+ASM_GLOBAL ASM_PFX(SecPlatformInitDflt)\r
+ASM_PFX(SecPlatformInitDflt):\r

    #\r
    # Save return address to EBP\r
    #\r
    movl   %eax, %ebp\r
    xorl   %eax, %eax\r
 \r
    #\r
    # Save return address to EBP\r
    #\r
    movl   %eax, %ebp\r
    xorl   %eax, %eax\r
 \r

-PlatformBasicInitDfltExit:\r
+SecPlatformInitDfltExit:\r

    jmp   *%ebp\r
 \r
 \r
    jmp   *%ebp\r
 \r
 \r


@@ -244,7 +244,7 @@ ASM_PFX(LoadUcode):
    #\r
    # Save return address to EBP\r
    #\r
    #\r
    # Save return address to EBP\r
    #\r

-   movd   %xmm7, %ebp\r
+   movd   %mm7, %ebp\r

 \r
    cmpl   $0x00, %esp\r
    jz     ParamError\r
 \r
    cmpl   $0x00, %esp\r
    jz     ParamError\r


@@ -451,8 +451,6 @@ LoadUcodeExit:
 #----------------------------------------------------------------------------\r
 # EstablishStackFsp\r
 #\r
 #----------------------------------------------------------------------------\r
 # EstablishStackFsp\r
 #\r

-# Following is the code copied from BYTFSP, need to figure out what it is doing..\r
-#\r

 #----------------------------------------------------------------------------\r
 ASM_GLOBAL ASM_PFX(EstablishStackFsp)\r
 ASM_PFX(EstablishStackFsp):\r
 #----------------------------------------------------------------------------\r
 ASM_GLOBAL ASM_PFX(EstablishStackFsp)\r
 ASM_PFX(EstablishStackFsp):\r


@@ -487,9 +485,9 @@ EstablishStackFspExit:
   #\r
   pushl   $DATA_LEN_OF_PER0                  # Size of the data region\r
   pushl   $0x30524550                        # Signature of the  data region 'PER0'\r
   #\r
   pushl   $DATA_LEN_OF_PER0                  # Size of the data region\r
   pushl   $0x30524550                        # Signature of the  data region 'PER0'\r

-  movd    %xmm4, %eax\r
-  pushl   %eax\r
-  movd    %xmm5, %eax\r
+  LOAD_EDX\r
+  pushl   %edx\r
+  LOAD_EAX\r

   pushl   %eax\r
   rdtsc\r
   pushl   %edx\r
   pushl   %eax\r
   rdtsc\r
   pushl   %edx\r


@@ -537,8 +535,16 @@ ASM_PFX(TempRamInitApi):
   # Save timestamp into XMM4 & XMM5\r
   #\r
   rdtsc\r
   # Save timestamp into XMM4 & XMM5\r
   #\r
   rdtsc\r

-  movd    %edx, %xmm4\r
-  movd    %eax, %xmm5\r
+  SAVE_EAX\r
+  SAVE_EDX\r
+\r
+  #\r
+  # Check Parameter\r
+  #\r
+  movl    4(%esp), %eax\r
+  cmpl    $0x00, %eax\r
+  movl    $0x80000002, %eax\r
+  jz      NemInitExit\r

 \r
   #\r
   # CPUID/DeviceID check\r
 \r
   #\r
   # CPUID/DeviceID check\r


@@ -556,31 +562,35 @@ TempRamInitApiL0:
   movd    %mm7, %esi\r
   jmp     ASM_PFX(SecPlatformInit)\r
 TempRamInitApiL1:\r
   movd    %mm7, %esi\r
   jmp     ASM_PFX(SecPlatformInit)\r
 TempRamInitApiL1:\r

+  cmpl    $0x00, %eax\r
+  jnz     NemInitExit\r

 \r
   #\r
 \r
   #\r

-  # Call Sec CAR Init\r
+  # Load microcode\r

   #\r
   #\r

-  movl    $TempRamInitApiL2, %esi            #CALL_MMX  SecCarInit\r
+  LOAD_ESP\r
+  movl    $TempRamInitApiL2, %esi            #CALL_MMX  LoadUcode\r

   movd    %mm7, %esi\r
   movd    %mm7, %esi\r

-  jmp     ASM_PFX(SecCarInit)\r
+  jmp     ASM_PFX(LoadUcode)\r

 TempRamInitApiL2:\r
 TempRamInitApiL2:\r

-\r
-  # @todo: ESP has been modified, we need to restore here.\r
-\r
-  LOAD_REGS\r
-  SAVE_REGS\r
+  cmpl    $0x00, %eax\r
+  jnz     NemInitExit\r

 \r
   #\r
 \r
   #\r

-  # Load microcode\r
+  # Call Sec CAR Init\r

   #\r
   #\r

-  movl    $TempRamInitApiL3, %esi            #CALL_MMX  LoadUcode\r
+  LOAD_ESP\r
+  movl    $TempRamInitApiL3, %esi            #CALL_MMX  SecCarInit\r

   movd    %mm7, %esi\r
   movd    %mm7, %esi\r

-  jmp     ASM_PFX(LoadUcode)\r
+  jmp     ASM_PFX(SecCarInit)\r

 TempRamInitApiL3:\r
 TempRamInitApiL3:\r

+  cmpl    $0x00, %eax\r
+  jnz     NemInitExit\r

 \r
   #\r
   # EstablishStackFsp\r
   #\r
 \r
   #\r
   # EstablishStackFsp\r
   #\r

+  LOAD_ESP\r

   movl    $TempRamInitApiL4, %esi            #CALL_MMX  EstablishStackFsp\r
   movd    %mm7, %esi\r
   jmp     ASM_PFX(EstablishStackFsp)\r
   movl    $TempRamInitApiL4, %esi            #CALL_MMX  EstablishStackFsp\r
   movd    %mm7, %esi\r
   jmp     ASM_PFX(EstablishStackFsp)\r

diff --git a/IntelFspPkg/Include/Guid/GuidHobFspEas.h b/IntelFspPkg/Include/Guid/GuidHobFspEas.h
index d29def3adefce3574121e507002cc3147151d890..45a6e25f0ad1ac8fcb011bbb56ad303490321362 100644 (file)
--- a/IntelFspPkg/Include/Guid/GuidHobFspEas.h
+++ b/IntelFspPkg/Include/Guid/GuidHobFspEas.h
@@ -16,8 +16,7 @@
 #ifndef __GUID_HOB_FSP_EAS_GUID__\r
 #define __GUID_HOB_FSP_EAS_GUID__\r
 \r
 #ifndef __GUID_HOB_FSP_EAS_GUID__\r
 #define __GUID_HOB_FSP_EAS_GUID__\r
 \r

-extern EFI_GUID gFspBootLoaderTempMemoryGuid;\r
-extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid; // Same as gFspBootLoaderTempMemoryGuid\r
+extern EFI_GUID gFspBootLoaderTemporaryMemoryGuid;\r

 \r
 extern EFI_GUID gFspReservedMemoryResourceHobGuid;\r
 extern EFI_GUID gFspNonVolatileStorageHobGuid;\r
 \r
 extern EFI_GUID gFspReservedMemoryResourceHobGuid;\r
 extern EFI_GUID gFspNonVolatileStorageHobGuid;\r

diff --git a/IntelFspPkg/Include/Private/FspGlobalData.h b/IntelFspPkg/Include/Private/FspGlobalData.h
index efbb94227bd97eb7fd11e0fd5c480a302e265bb8..436891af44804ecc73572e0c530ae6e1a43dc5eb 100644 (file)
--- a/IntelFspPkg/Include/Private/FspGlobalData.h
+++ b/IntelFspPkg/Include/Private/FspGlobalData.h
@@ -38,7 +38,6 @@ typedef struct  {
    UINT8              Reserved[3];\r
    UINT32             PerfIdx;\r
    UINT64             PerfData[32];\r
    UINT8              Reserved[3];\r
    UINT32             PerfIdx;\r
    UINT64             PerfData[32];\r

-//   UINT64             PerfData[FixedPcdGet32(PcdFspMaxPerfEntry)];\r

 } FSP_GLOBAL_DATA;\r
 \r
 #pragma pack()\r
 } FSP_GLOBAL_DATA;\r
 \r
 #pragma pack()\r

diff --git a/IntelFspPkg/Include/Private/FspPatchTable.h b/IntelFspPkg/Include/Private/FspPatchTable.h
index d16a1b7b5e2bbcbe938bab968ea66b95381a554a..7f672c66b4cffb3cde1b9fd93e94d32ae3e019cd 100644 (file)
--- a/IntelFspPkg/Include/Private/FspPatchTable.h
+++ b/IntelFspPkg/Include/Private/FspPatchTable.h
@@ -25,7 +25,6 @@ typedef struct  {
   UINT8   Reserved;\r
   UINT32  PatchEntryNum;\r
   UINT32  PatchData[FixedPcdGet32(PcdFspMaxPatchEntry)];\r
   UINT8   Reserved;\r
   UINT32  PatchEntryNum;\r
   UINT32  PatchData[FixedPcdGet32(PcdFspMaxPatchEntry)];\r

-  UINT32  VpdBase;\r

 } FSP_PATCH_TABLE;\r
 \r
 #pragma pack()\r
 } FSP_PATCH_TABLE;\r
 \r
 #pragma pack()\r

diff --git a/IntelFspPkg/IntelFspPkg.dec b/IntelFspPkg/IntelFspPkg.dec
index ab934f9f54d9459103bd88fb73ae465755d9d3cb..1f286c1c7d945202646ed55e070c8239a7f315d4 100644 (file)
--- a/IntelFspPkg/IntelFspPkg.dec
+++ b/IntelFspPkg/IntelFspPkg.dec
@@ -49,7 +49,6 @@
 \r
   # Guid define in FSP EAS\r
   gFspHeaderFileGuid                    = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }\r
 \r
   # Guid define in FSP EAS\r
   gFspHeaderFileGuid                    = { 0x912740BE, 0x2284, 0x4734, { 0xB9, 0x71, 0x84, 0xB0, 0x27, 0x35, 0x3F, 0x0C } }\r

-  gFspBootLoaderTempMemoryGuid          = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }\r

   gFspBootLoaderTemporaryMemoryGuid     = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }\r
   gFspReservedMemoryResourceHobGuid     = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }\r
   gFspNonVolatileStorageHobGuid         = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }\r
   gFspBootLoaderTemporaryMemoryGuid     = { 0xbbcff46c, 0xc8d3, 0x4113, { 0x89, 0x85, 0xb9, 0xd4, 0xf3, 0xb3, 0xf6, 0x4e } }\r
   gFspReservedMemoryResourceHobGuid     = { 0x69a79759, 0x1373, 0x4367, { 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e } }\r
   gFspNonVolatileStorageHobGuid         = { 0x721acf02, 0x4d77, 0x4c2a, { 0xb3, 0xdc, 0x27, 0x0b, 0x7b, 0xa9, 0xe4, 0xb0 } }\r

diff --git a/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf b/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
index 4e528d0e9a3302899b473ee72044155a6c4946b4..1ec6e4e37f816736880f47481f1122cd32cbec8c 100644 (file)
--- a/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
+++ b/IntelFspPkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf
@@ -39,7 +39,7 @@
   gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize         ## CONSUMES\r
 \r
 [Guids]\r
   gIntelFspPkgTokenSpaceGuid.PcdFspTemporaryRamSize         ## CONSUMES\r
 \r
 [Guids]\r

-  gFspBootLoaderTempMemoryGuid                              ## PRODUCES ## HOB\r
+  gFspBootLoaderTemporaryMemoryGuid                         ## PRODUCES ## HOB\r

 \r
 [FixedPcd]\r
   gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry        ## CONSUMES\r
 \r
 [FixedPcd]\r
   gIntelFspPkgTokenSpaceGuid.PcdFspMaxPatchEntry        ## CONSUMES\r

diff --git a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
index 6fb4dca7657cf985f2099895e1cc57e832dd5755..241cd284fbf9ff0bed2f15410839e44ee83a5c5d 100644 (file)
--- a/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
+++ b/IntelFspPkg/Library/BaseFspPlatformLib/FspPlatformMemory.c
@@ -103,10 +103,11 @@ FspMigrateTemporaryMemory (
   // Build a Boot Loader Temporary Memory GUID HOB\r
   //\r
   if (ApiMode == 0) {\r
   // Build a Boot Loader Temporary Memory GUID HOB\r
   //\r
   if (ApiMode == 0) {\r

-    BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTempMemoryGuid, BootLoaderTempRamSize);\r
+    BootLoaderTempRamHob = BuildGuidHob (&gFspBootLoaderTemporaryMemoryGuid, BootLoaderTempRamSize);\r

   } else {\r
   } else {\r

-       BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);\r
+    BootLoaderTempRamHob = (VOID *)AllocatePool (BootLoaderTempRamSize);\r

   }\r
   }\r

+  ASSERT(BootLoaderTempRamHob != NULL);\r

 \r
   CopyMem (BootLoaderTempRamHob, (VOID *)BootLoaderTempRamStart, BootLoaderTempRamSize);\r
   OffsetGap = (UINT32)BootLoaderTempRamHob - BootLoaderTempRamStart;\r
 \r
   CopyMem (BootLoaderTempRamHob, (VOID *)BootLoaderTempRamStart, BootLoaderTempRamSize);\r
   OffsetGap = (UINT32)BootLoaderTempRamHob - BootLoaderTempRamStart;\r

diff --git a/IntelFspPkg/Tools/GenCfgOpt.py b/IntelFspPkg/Tools/GenCfgOpt.py
index 06e426aa16bb8c86b5bf1a6aae3f267f52b28444..7e59801879ca555dbe0efca777adb39feb285c7d 100644 (file)
--- a/IntelFspPkg/Tools/GenCfgOpt.py
+++ b/IntelFspPkg/Tools/GenCfgOpt.py
@@ -254,10 +254,10 @@ EndList
                                     ElifStack[-1] = ElifStack[-1] + 1\r
                             else:\r
                                 if len(DscLine) > 0 and DscLine[0] == '!':\r
                                     ElifStack[-1] = ElifStack[-1] + 1\r
                             else:\r
                                 if len(DscLine) > 0 and DscLine[0] == '!':\r

-                                                                   #\r
-                                                                   # Current it can only handle build switch.\r
-                                                                       # It does not support INF file in included dsc.\r
-                                                                       #\r
+                                    #\r
+                                    # Current it can only handle build switch.\r
+                                    # It does not support INF file in included dsc.\r
+                                    #\r

                                 else:\r
                                     if reduce(lambda x,y: x and y, IfStack):\r
                                         Handle = True\r
                                 else:\r
                                     if reduce(lambda x,y: x and y, IfStack):\r
                                         Handle = True\r


@@ -619,8 +619,8 @@ EndList
                 ImageRev = struct.unpack('<I', BinFd.read(0x04))\r
                 BinFd.close()\r
 \r
                 ImageRev = struct.unpack('<I', BinFd.read(0x04))\r
                 BinFd.close()\r
 \r

-                HeaderFd.write("#define VPD_IMAGE_ID    0x%016X        /* '%s' */\n" % (ImageId[0], IdStr))\r
-                HeaderFd.write("#define VPD_IMAGE_REV   0x%08X \n\n" % ImageRev[0])\r
+                HeaderFd.write("#define FSP_IMAGE_ID    0x%016X        /* '%s' */\n" % (ImageId[0], IdStr))\r
+                HeaderFd.write("#define FSP_IMAGE_REV   0x%08X \n\n" % ImageRev[0])\r

 \r
             HeaderFd.write("typedef struct _" + Region[0]  + "PD_DATA_REGION {\n")\r
             NextOffset  = 0\r
 \r
             HeaderFd.write("typedef struct _" + Region[0]  + "PD_DATA_REGION {\n")\r
             NextOffset  = 0\r

diff --git a/IntelFspWrapperPkg/FspInitPei/FspInitPei.c b/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
index 17a646836ab770e5426baf8201565c0b95e061f6..48a030709b03e73e282556660673f9953c2363bc 100644 (file)
--- a/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
+++ b/IntelFspWrapperPkg/FspInitPei/FspInitPei.c
@@ -42,17 +42,21 @@ FspPeiEntryPoint (
     return EFI_DEVICE_ERROR;\r
   }\r
 \r
     return EFI_DEVICE_ERROR;\r
   }\r
 \r

+  ASSERT (FspHeader->TempRamInitEntryOffset != 0);\r
+  ASSERT (FspHeader->FspInitEntryOffset != 0);\r
+  ASSERT (FspHeader->NotifyPhaseEntryOffset != 0);\r
+\r

   if ((PcdGet8 (PcdFspApiVersion) >= 2) &&\r
       (FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&\r
   if ((PcdGet8 (PcdFspApiVersion) >= 2) &&\r
       (FspHeader->HeaderRevision >= FSP_HEADER_REVISION_2) &&\r

-      (FspHeader->ApiEntryNum >= 6) &&\r
-      (FspHeader->FspMemoryInitEntryOffset != 0) &&\r
-      (FspHeader->TempRamExitEntryOffset != 0) &&\r
-      (FspHeader->FspSiliconInitEntryOffset != 0) ) {\r
-    PcdFspApiVersion = FSP_HEADER_REVISION_2;\r
+      (FspHeader->ApiEntryNum >= 6) ) {\r
+    ASSERT (FspHeader->FspMemoryInitEntryOffset != 0);\r
+    ASSERT (FspHeader->TempRamExitEntryOffset != 0);\r
+    ASSERT (FspHeader->FspSiliconInitEntryOffset != 0);\r
+    PcdFspApiVersion = PcdGet8 (PcdFspApiVersion);\r

   }\r
   DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));\r
 \r
   }\r
   DEBUG ((DEBUG_INFO, "PcdFspApiVersion - 0x%x\n", PcdFspApiVersion));\r
 \r

-  if (PcdFspApiVersion == FSP_HEADER_REVISION_1) {\r
+  if (PcdFspApiVersion == 1) {\r

     PeiFspInitV1 (FspHeader);\r
   } else {\r
     PeiFspInitV2 (FspHeader);\r
     PeiFspInitV1 (FspHeader);\r
   } else {\r
     PeiFspInitV2 (FspHeader);\r

diff --git a/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c b/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c
index 6ddbf7f1b37e4027473e73e5ac5327c43879dd06..7cad84effb75226a5e493c975da8c73ee54a6b1a 100644 (file)
--- a/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c
+++ b/IntelFspWrapperPkg/FspInitPei/FspInitPeiV2.c
@@ -169,6 +169,7 @@ PeiFspMemoryInit (
   FspMemoryInitParams.NvsBufferPtr = GetNvsBuffer ();\r
   DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspMemoryInitParams.NvsBufferPtr));\r
   FspMemoryInitParams.RtBufferPtr  = (VOID *)&FspRtBuffer;\r
   FspMemoryInitParams.NvsBufferPtr = GetNvsBuffer ();\r
   DEBUG ((DEBUG_INFO, "NvsBufferPtr - 0x%x\n", FspMemoryInitParams.NvsBufferPtr));\r
   FspMemoryInitParams.RtBufferPtr  = (VOID *)&FspRtBuffer;\r

+  FspHobList = NULL;\r

   FspMemoryInitParams.HobListPtr   = &FspHobList;\r
 \r
   DEBUG ((DEBUG_INFO, "FspMemoryInitParams - 0x%x\n", &FspMemoryInitParams));\r
   FspMemoryInitParams.HobListPtr   = &FspHobList;\r
 \r
   DEBUG ((DEBUG_INFO, "FspMemoryInitParams - 0x%x\n", &FspMemoryInitParams));\r


@@ -184,6 +185,7 @@ PeiFspMemoryInit (
   ASSERT_EFI_ERROR (Status);\r
 \r
   DEBUG ((DEBUG_INFO, "  HobListPtr (returned) - 0x%x\n", FspHobList));\r
   ASSERT_EFI_ERROR (Status);\r
 \r
   DEBUG ((DEBUG_INFO, "  HobListPtr (returned) - 0x%x\n", FspHobList));\r

+  ASSERT (FspHobList != NULL);\r

 \r
   FspHobProcessForMemoryResource (FspHobList);\r
 \r
 \r
   FspHobProcessForMemoryResource (FspHobList);\r
 \r