OvmfPkg: VMWare SVGA display device register definitions

This adds a header file defining symbolic constants for the VMWare SVGA
virtual display device in preparation for supporting it in
QemuVideoDxe.

It is mostly an extract of the file lib/vmware/svga_reg.h from commit
329dd537456f93a806841ec8a8213aed11395def of VMWare's vmware-svga
repository at git://git.code.sf.net/p/vmware-svga/git (See also
http://vmware-svga.sourceforge.net/ )

Only the bare essentials necessary for initialisation, modesetting and
framebuffer access have been kept from the original file; macro names
have been prefixed with VMWARE_SVGA_ instead of SVGA2_, and the enum
definition has been adapted to comply with EDK2 naming conventions.

The original file was released by VMWare under the MIT license, this
has been retained.

Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Phil Dennis-Jordan <phil@philjordan.eu>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>

diff --git a/OvmfPkg/Include/IndustryStandard/VmwareSvga.h b/OvmfPkg/Include/IndustryStandard/VmwareSvga.h
new file mode 100644 (file)
index 0000000..693d44b
--- /dev/null
+++ b/OvmfPkg/Include/IndustryStandard/VmwareSvga.h
@@ -0,0 +1,104 @@
+/** @file\r
+\r
+  Macro and enum definitions of a subset of port numbers, register identifiers\r
+  and values required for driving the VMWare SVGA virtual display adapter,\r
+  also implemented by Qemu.\r
+\r
+  This file's contents was extracted from file lib/vmware/svga_reg.h in commit\r
+  329dd537456f93a806841ec8a8213aed11395def of VMWare's vmware-svga repository:\r
+  git://git.code.sf.net/p/vmware-svga/git\r
+\r
+\r
+  Copyright 1998-2009 VMware, Inc.  All rights reserved.\r
+  Portions Copyright 2017 Phil Dennis-Jordan <phil@philjordan.eu>\r
+\r
+  Permission is hereby granted, free of charge, to any person\r
+  obtaining a copy of this software and associated documentation\r
+  files (the "Software"), to deal in the Software without\r
+  restriction, including without limitation the rights to use, copy,\r
+  modify, merge, publish, distribute, sublicense, and/or sell copies\r
+  of the Software, and to permit persons to whom the Software is\r
+  furnished to do so, subject to the following conditions:\r
+\r
+  The above copyright notice and this permission notice shall be\r
+  included in all copies or substantial portions of the Software.\r
+\r
+  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,\r
+  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF\r
+  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND\r
+  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS\r
+  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN\r
+  ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN\r
+  CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE\r
+  SOFTWARE.\r
+\r
+**/\r
+\r
+#ifndef _VMWARE_SVGA_H_\r
+#define _VMWARE_SVGA_H_\r
+\r
+#include <Base.h>\r
+\r
+//\r
+// IDs for recognising the device\r
+//\r
+#define VMWARE_PCI_VENDOR_ID_VMWARE            0x15AD\r
+#define VMWARE_PCI_DEVICE_ID_VMWARE_SVGA2      0x0405\r
+\r
+//\r
+// I/O port BAR offsets for register selection and read/write.\r
+//\r
+// The register index is written to the 32-bit index port, followed by a 32-bit\r
+// read or write on the value port to read or set that register's contents.\r
+//\r
+#define VMWARE_SVGA_INDEX_PORT         0x0\r
+#define VMWARE_SVGA_VALUE_PORT         0x1\r
+\r
+//\r
+// Some of the device's register indices for basic framebuffer functionality.\r
+//\r
+typedef enum {\r
+  VmwareSvgaRegId = 0,\r
+  VmwareSvgaRegEnable = 1,\r
+  VmwareSvgaRegWidth = 2,\r
+  VmwareSvgaRegHeight = 3,\r
+  VmwareSvgaRegMaxWidth = 4,\r
+  VmwareSvgaRegMaxHeight = 5,\r
+\r
+  VmwareSvgaRegBitsPerPixel = 7,\r
+\r
+  VmwareSvgaRegRedMask = 9,\r
+  VmwareSvgaRegGreenMask = 10,\r
+  VmwareSvgaRegBlueMask = 11,\r
+  VmwareSvgaRegBytesPerLine = 12,\r
+\r
+  VmwareSvgaRegFbOffset = 14,\r
+\r
+  VmwareSvgaRegFbSize = 16,\r
+  VmwareSvgaRegCapabilities = 17,\r
+\r
+  VmwareSvgaRegHostBitsPerPixel = 28,\r
+} VMWARE_SVGA_REGISTER;\r
+\r
+//\r
+// Values used with VmwareSvgaRegId for sanity-checking the device and getting\r
+// its version.\r
+//\r
+#define VMWARE_SVGA_MAGIC          0x900000U\r
+#define VMWARE_SVGA_MAKE_ID(ver)   (VMWARE_SVGA_MAGIC << 8 | (ver))\r
+\r
+#define VMWARE_SVGA_VERSION_2      2\r
+#define VMWARE_SVGA_ID_2           VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_2)\r
+\r
+#define VMWARE_SVGA_VERSION_1      1\r
+#define VMWARE_SVGA_ID_1           VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_1)\r
+\r
+#define VMWARE_SVGA_VERSION_0      0\r
+#define VMWARE_SVGA_ID_0           VMWARE_SVGA_MAKE_ID (VMWARE_SVGA_VERSION_0)\r
+\r
+//\r
+// One of the capability bits advertised by VmwareSvgaRegCapabilities.\r
+//\r
+#define VMWARE_SVGA_CAP_8BIT_EMULATION     BIT8\r
+\r
+#endif\r