ArmPlatformPkg: Update PL011 Serial PCDs to Fixed PCDs

The PCDs used in the PL011 UART Driver and Serial Port Library are
inherently "fixed at build".  This change updates the source to use
Fixed PCDs for these values.  This improves clarity and efficiency.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>

diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
index ab00cae26d92fced0f14bb17706129859846ad3c..d0f9381e9eaad2c14e1c86b89ff1c1cf9f0a6427 100644 (file)
--- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
+++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
@@ -168,17 +168,17 @@ PL011UartInitializePort (
   //\r
 \r
   // If PL011 Integer value has been defined then always ignore the BAUD rate\r
-  if (PcdGet32 (PL011UartInteger) != 0) {\r
-      MmioWrite32 (UartBase + UARTIBRD, PcdGet32 (PL011UartInteger));\r
-      MmioWrite32 (UartBase + UARTFBRD, PcdGet32 (PL011UartFractional));\r
+  if (FixedPcdGet32 (PL011UartInteger) != 0) {\r
+      MmioWrite32 (UartBase + UARTIBRD, FixedPcdGet32 (PL011UartInteger));\r
+      MmioWrite32 (UartBase + UARTFBRD, FixedPcdGet32 (PL011UartFractional));\r
   } else {\r
     // If BAUD rate is zero then replace it with the system default value\r
     if (*BaudRate == 0) {\r
-      *BaudRate = PcdGet32 (PcdSerialBaudRate);\r
+      *BaudRate = FixedPcdGet32 (PcdSerialBaudRate);\r
       ASSERT (*BaudRate != 0);\r
     }\r
 \r
-    Divisor = (PcdGet32 (PL011UartClkInHz) * 4) / *BaudRate;\r
+    Divisor = (FixedPcdGet32 (PL011UartClkInHz) * 4) / *BaudRate;\r
     MmioWrite32 (UartBase + UARTIBRD, Divisor >> FRACTION_PART_SIZE_IN_BITS);\r
     MmioWrite32 (UartBase + UARTFBRD, Divisor & FRACTION_PART_MASK);\r
   }\r

diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
index 18df7c9fb94431ffa1d2e8b4c06dfb82e53181e5..5afce36d3935e7fd79c25c46360d72328b2a571f 100644 (file)
--- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
+++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.inf
@@ -2,7 +2,7 @@
 #\r
 #  Component description file for PL011Uart module\r
 #\r
-#  Copyright (c) 2011-2013, ARM Ltd. All rights reserved.<BR>\r
+#  Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -34,7 +34,7 @@
   MdeModulePkg/MdeModulePkg.dec\r
   ArmPlatformPkg/ArmPlatformPkg.dec\r
 \r
-[Pcd]\r
+[FixedPcd]\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialBaudRate\r
 \r
   gArmPlatformTokenSpaceGuid.PL011UartClkInHz\r

diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
index 3b5f1edf68ea5dc84bd0dad66cfe404b6ed27332..015f6fbb712c4ca6fbf20448d795dda41ad24e9c 100644 (file)
--- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
+++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.c
@@ -43,14 +43,14 @@ SerialPortInitialize (
   UINT8               DataBits;\r
   EFI_STOP_BITS_TYPE  StopBits;\r
 \r
-  BaudRate = (UINTN)PcdGet64 (PcdUartDefaultBaudRate);\r
+  BaudRate = (UINTN)FixedPcdGet64 (PcdUartDefaultBaudRate);\r
   ReceiveFifoDepth = 0;         // Use default FIFO depth\r
-  Parity = (EFI_PARITY_TYPE)PcdGet8 (PcdUartDefaultParity);\r
-  DataBits = PcdGet8 (PcdUartDefaultDataBits);\r
-  StopBits = (EFI_STOP_BITS_TYPE) PcdGet8 (PcdUartDefaultStopBits);\r
+  Parity = (EFI_PARITY_TYPE)FixedPcdGet8 (PcdUartDefaultParity);\r
+  DataBits = FixedPcdGet8 (PcdUartDefaultDataBits);\r
+  StopBits = (EFI_STOP_BITS_TYPE) FixedPcdGet8 (PcdUartDefaultStopBits);\r
 \r
   return PL011UartInitializePort (\r
-      (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
+      (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),\r
       &BaudRate,\r
       &ReceiveFifoDepth,\r
       &Parity,\r
@@ -76,7 +76,7 @@ SerialPortWrite (
   IN UINTN     NumberOfBytes\r
   )\r
 {\r
-  return PL011UartWrite ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
+  return PL011UartWrite ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
 }\r
 \r
 /**\r
@@ -96,7 +96,7 @@ SerialPortRead (
   IN  UINTN     NumberOfBytes\r
 )\r
 {\r
-  return PL011UartRead ((UINTN)PcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
+  return PL011UartRead ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Buffer, NumberOfBytes);\r
 }\r
 \r
 /**\r
@@ -113,7 +113,7 @@ SerialPortPoll (
   VOID\r
   )\r
 {\r
-  return PL011UartPoll ((UINTN)PcdGet64 (PcdSerialRegisterBase));\r
+  return PL011UartPoll ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase));\r
 }\r
 /**\r
   Set new attributes to PL011.\r
@@ -158,7 +158,7 @@ SerialPortSetAttributes (
   )\r
 {\r
   return PL011UartInitializePort (\r
-    (UINTN)PcdGet64 (PcdSerialRegisterBase),\r
+    (UINTN)FixedPcdGet64 (PcdSerialRegisterBase),\r
     BaudRate,\r
     ReceiveFifoDepth,\r
     Parity,\r
@@ -199,7 +199,7 @@ SerialPortSetControl (
   IN UINT32  Control\r
   )\r
 {\r
-  return PL011UartSetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
+  return PL011UartSetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);\r
 }\r
 \r
 /**\r
@@ -240,5 +240,5 @@ SerialPortGetControl (
   OUT UINT32  *Control\r
   )\r
 {\r
-  return PL011UartGetControl ((UINTN)PcdGet64 (PcdSerialRegisterBase), Control);\r
+  return PL011UartGetControl ((UINTN)FixedPcdGet64 (PcdSerialRegisterBase), Control);\r
 }\r

diff --git a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
index 3a950d0788d481ab73408af41343dfcfa2378a6e..653c0b2dfc147f1d82155e4150812f0cb4c59e12 100644 (file)
--- a/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
+++ b/ArmPlatformPkg/Library/PL011SerialPortLib/PL011SerialPortLib.inf
@@ -2,7 +2,7 @@
 #\r
 #  Component description file for PL011SerialPortLib module\r
 #\r
-#  Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
+#  Copyright (c) 2011-2016, ARM Ltd. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -35,7 +35,7 @@
   MdeModulePkg/MdeModulePkg.dec\r
   ArmPlatformPkg/ArmPlatformPkg.dec\r
 \r
-[Pcd]\r
+[FixedPcd]\r
   gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase\r
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate\r
   gEfiMdePkgTokenSpaceGuid.PcdUartDefaultDataBits\r