The reasons for the changes made are:

1)PciCommand.h: Add some macro constants definitions that will be used by other changes.
2)PciDeviceSupport.c:
a)Fix the bug that programs Non-Bridge Devices' Interrupt Line Register to 0x00. Although this register is rarely used in modern OS (actually, only Dos still uses it), it is good practice to modify it so it will align the spec. Please refer to PCI 3.0 Spec for the chapter on Interrupt line register.
b) Change the way used to detect VGA device. The old method will fail.
3)PciEnumeratorSupport.c: Make changes so Pci Driver will preserve those bits in Command & Bridge Control Register that were set by Customer's Chipset initialization code. Pci Driver is supposed to only touch those bits that are generic. Problems will arise if we destroy some initializations already done.
4)PciIo.c: PollIo() is not conformant to EFI spec so fix it. Also, some fixes are introduced to better support VGA card. These modifications are supposed to work with fixes in PciDeviceSupport.c.
5) PciOptionromSupport.c:Add the fix to enhance the logic working with OptionRom. Some legacy cards do not report correct imagelength so we add double check.
And add EFI_MIN and EFI_MAX macro definition since they are not currently defined in global files.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1738 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h
index 56f632e8da4b7dda4066aa1356587a762e4c5f0d..e63d0d15254b0c460d94a81ff31a80e92d062563 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.h
@@ -24,6 +24,47 @@ Revision History
 #ifndef _EFI_PCI_COMMAND_H\r
 #define _EFI_PCI_COMMAND_H\r
 \r
+//\r
+// The PCI Command register bits owned by PCI Bus driver.\r
+//\r
+// They should be cleared at the beginning. The other registers\r
+// are owned by chipset, we should not touch them.\r
+//\r
+#define EFI_PCI_COMMAND_BITS_OWNED                          ( \\r
+                EFI_PCI_COMMAND_IO_SPACE                    | \\r
+                EFI_PCI_COMMAND_MEMORY_SPACE                | \\r
+                EFI_PCI_COMMAND_BUS_MASTER                  | \\r
+                EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \\r
+                EFI_PCI_COMMAND_VGA_PALETTE_SNOOP           | \\r
+                EFI_PCI_COMMAND_FAST_BACK_TO_BACK             \\r
+                )\r
+\r
+//\r
+// The PCI Bridge Control register bits owned by PCI Bus driver.\r
+// \r
+// They should be cleared at the beginning. The other registers\r
+// are owned by chipset, we should not touch them.\r
+//\r
+#define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED                   ( \\r
+                EFI_PCI_BRIDGE_CONTROL_ISA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_VGA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_VGA_16               | \\r
+                EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \\r
+                )\r
+\r
+//\r
+// The PCCard Bridge Control register bits owned by PCI Bus driver.\r
+// \r
+// They should be cleared at the beginning. The other registers\r
+// are owned by chipset, we should not touch them.\r
+//\r
+#define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED                ( \\r
+                EFI_PCI_BRIDGE_CONTROL_ISA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_VGA                  | \\r
+                EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK      \\r
+                )\r
+\r
+\r
 #define EFI_GET_REGISTER      1\r
 #define EFI_SET_REGISTER      2\r
 #define EFI_ENABLE_REGISTER   3\r

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciDeviceSupport.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciDeviceSupport.c
index 54a7fe745297fb65997001ec9cf8a9ed594b1bf8..77e7cbaa8255ab899720257a20b099831d1dc28e 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciDeviceSupport.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciDeviceSupport.c
@@ -305,6 +305,7 @@ Returns:
   UINTN               PlatformOpRomSize;\r
   UINT8               PciExpressCapRegOffset;\r
   EFI_PCI_IO_PROTOCOL *PciIo;\r
+  UINT8               Data8;\r
 \r
   //\r
   // Install the pciio protocol, device path protocol\r
@@ -339,7 +340,8 @@ Returns:
   // Force Interrupt line to zero for cards that come up randomly\r
   //\r
   PciIo = &(PciIoDevice->PciIo);\r
-  PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &gAllZero);\r
+  Data8 = 0xFF;\r
+  PciIo->Pci.Write (PciIo, EfiPciIoWidthUint8, 0x3C, 1, &Data8);\r
   //\r
   // Process Platform OpRom\r
   //\r
@@ -1149,7 +1151,10 @@ Returns:
     Temp = PCI_IO_DEVICE_FROM_LINK (CurrentLink);\r
 \r
     if (IS_PCI_VGA(&Temp->Pci) && \r
-        (Temp->Attributes & (EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_IO))) {\r
+        (Temp->Attributes &\r
+         (EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY |\r
+          EFI_PCI_IO_ATTRIBUTE_VGA_IO     |\r
+          EFI_PCI_IO_ATTRIBUTE_VGA_IO_16))) {\r
       return Temp;\r
     }\r
 \r

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciEnumeratorSupport.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciEnumeratorSupport.c
index 80bc7d4daf84fcac1243caeb2a45a3a2bea97b78..ce605cc8131c23c4092046a872e271aabd8b1f60 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciEnumeratorSupport.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciEnumeratorSupport.c
@@ -394,7 +394,7 @@ Returns:
   //\r
   if (gFullEnumeration) {\r
 \r
-    PciSetCommandRegister (PciIoDevice, 0);\r
+    PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
 \r
   }\r
 \r
@@ -462,12 +462,12 @@ Returns:
     );\r
 \r
   if (gFullEnumeration) {\r
-    PciSetCommandRegister (PciIoDevice, 0);\r
+    PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
 \r
     //\r
     // Initalize the bridge control register\r
     //\r
-    PciSetBridgeControlRegister (PciIoDevice, 0);\r
+    PciDisableBridgeControlRegister (PciIoDevice, EFI_PCI_BRIDGE_CONTROL_BITS_OWNED);\r
 \r
   }\r
 \r
@@ -586,12 +586,12 @@ Returns:
     );\r
 \r
   if (gFullEnumeration) {\r
-    PciSetCommandRegister (PciIoDevice, 0);\r
+    PciDisableCommandRegister (PciIoDevice, EFI_PCI_COMMAND_BITS_OWNED);\r
 \r
     //\r
     // Initalize the bridge control register\r
     //\r
-    PciSetBridgeControlRegister (PciIoDevice, 0);\r
+    PciDisableBridgeControlRegister (PciIoDevice, EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED);\r
 \r
   }\r
   //\r
@@ -871,6 +871,11 @@ Returns:
     Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO;\r
   }\r
 \r
+  if (BridgeControl & EFI_PCI_BRIDGE_CONTROL_VGA_16) {\r
+    Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_IO_16;\r
+    Attributes |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16;\r
+  }\r
+\r
   if (Option == EFI_SET_SUPPORTS) {\r
 \r
     Attributes |= EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE | \r
@@ -1066,7 +1071,7 @@ Returns:
               EFI_PCI_COMMAND_BUS_MASTER   |\r
               EFI_PCI_COMMAND_VGA_PALETTE_SNOOP;\r
 \r
-    BridgeControl = EFI_PCI_BRIDGE_CONTROL_ISA | EFI_PCI_BRIDGE_CONTROL_VGA;\r
+    BridgeControl = EFI_PCI_BRIDGE_CONTROL_ISA | EFI_PCI_BRIDGE_CONTROL_VGA | EFI_PCI_BRIDGE_CONTROL_VGA_16;\r
 \r
     //\r
     // Test whether the device can support attributes above\r

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciIo.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciIo.c
index 28fbaca67a121eeec1bcb3c81cb0919d46503111..e01d6aa7f0cb291f55c1da03a686a9198248dd17 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciIo.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciIo.c
@@ -369,7 +369,7 @@ Returns:
 \r
   PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
 \r
-  if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+  if (Width < 0 || Width > EfiPciIoWidthUint64) {\r
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
@@ -378,10 +378,6 @@ Returns:
     return EFI_UNSUPPORTED;\r
   }\r
 \r
-  if (Width > EfiPciIoWidthUint64) {\r
-    return EFI_INVALID_PARAMETER;\r
-  }\r
-\r
   Status = PciIoDevice->PciRootBridgeIo->PollIo (\r
                                           PciIoDevice->PciRootBridgeIo,\r
                                           (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,\r
@@ -1509,12 +1505,26 @@ Returns:
   Command       = 0;\r
   BridgeControl = 0;\r
 \r
+  //\r
+  // Check VGA and VGA16, they can not be set at the same time\r
+  //\r
+  if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO)         &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16))         ||\r
+      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO)         &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) ||\r
+      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16))         ||\r
+      ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) &&\r
+       (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) ) {\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
   //\r
   // For PPB & P2C, set relevant attribute bits\r
   //\r
   if (IS_PCI_BRIDGE (&PciIoDevice->Pci) || IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
 \r
-    if (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) {\r
+    if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {\r
       BridgeControl |= EFI_PCI_BRIDGE_CONTROL_VGA;\r
     }\r
 \r
@@ -1522,18 +1532,23 @@ Returns:
       BridgeControl |= EFI_PCI_BRIDGE_CONTROL_ISA;\r
     }\r
 \r
-    if (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) {\r
+    if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) {\r
       Command |= EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO;\r
     }\r
 \r
+    if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 | EFI_PCI_IO_ATTRIBUTE_VGA_IO_16)) {\r
+      BridgeControl |= EFI_PCI_BRIDGE_CONTROL_VGA_16;\r
+    }\r
+\r
   } else {\r
     //\r
     // Do with the attributes on VGA\r
+    // Only for VGA's legacy resource, we just can enable once.\r
     //\r
-    if ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) || \r
-        (IS_PCI_VGA(&PciIoDevice->Pci) && \r
-         ((Attributes & EFI_PCI_IO_ATTRIBUTE_IO) || \r
-          (Attributes & EFI_PCI_IO_ATTRIBUTE_MEMORY)))) {\r
+    if (Attributes &\r
+        (EFI_PCI_IO_ATTRIBUTE_VGA_IO    |\r
+         EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 |\r
+         EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY)) {\r
       //\r
       // Check if a VGA has been enabled before enabling a new one\r
       //\r
@@ -1554,7 +1569,7 @@ Returns:
     //\r
     // Do with the attributes on GFX\r
     //\r
-    if (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) {\r
+    if (Attributes & (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16)) {\r
 \r
       if (Operation == EfiPciIoAttributeOperationEnable) {\r
         //\r

diff --git a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciOptionRomSupport.c b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciOptionRomSupport.c
index 5819fd6e373bd9a10479fbb82260bdbaa9375e9b..3ec76989a5c69983859ced1a76aedf1260bac756 100644 (file)
--- a/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciOptionRomSupport.c
+++ b/EdkModulePkg/Bus/Pci/PciBus/Dxe/PciOptionRomSupport.c
@@ -24,6 +24,13 @@ Revision History
 #include "pcibus.h"\r
 #include "PciResourceSupport.h"\r
 \r
+//\r
+// Min Max\r
+//\r
+#define EFI_MIN(a, b) (((a) < (b)) ? (a) : (b))\r
+#define EFI_MAX(a, b) (((a) > (b)) ? (a) : (b))\r
+\r
+\r
 EFI_STATUS\r
 GetOpRomInfo (\r
   IN PCI_IO_DEVICE    *PciIoDevice\r
@@ -152,6 +159,7 @@ Returns:
   UINT64                    RomSize;\r
   UINT64                    RomImageSize;\r
   UINT8                     *RomInMemory;\r
+  UINT8                     CodeType;\r
 \r
   RomSize       = PciDevice->RomSize;\r
 \r
@@ -159,6 +167,7 @@ Returns:
   RomImageSize  = 0;\r
   RomInMemory   = NULL;\r
   Temp          = 0;\r
+  CodeType      = 0xFF;\r
 \r
   //\r
   // Get the RomBarIndex\r
@@ -231,11 +240,22 @@ Returns:
                                       sizeof (PCI_DATA_STRUCTURE),\r
                                       (UINT8 *) RomPcir\r
                                       );\r
+    if (RomPcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {\r
+      CodeType = PCI_CODE_TYPE_PCAT_IMAGE;\r
+    }\r
     Indicator     = RomPcir->Indicator;\r
     RomImageSize  = RomImageSize + RomPcir->ImageLength * 512;\r
     RomBarOffset  = RomBarOffset + RomPcir->ImageLength * 512;\r
   } while (((Indicator & 0x80) == 0x00) && ((RomBarOffset - RomBar) < RomSize));\r
 \r
+  //\r
+  // Some Legacy Cards do not report the correct ImageLength so used the maximum\r
+  // of the legacy length and the PCIR Image Length\r
+  //\r
+  if (CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {\r
+    RomImageSize = EFI_MAX(RomImageSize, (((EFI_LEGACY_EXPANSION_ROM_HEADER *)RomHeader)->Size512 * 512));\r
+  }\r
+\r
   if (RomImageSize > 0) {\r
     retStatus = EFI_SUCCESS;\r
     Image     = AllocatePool ((UINT32) RomImageSize);\r