ArmPlatformPkg: Remove double write in PL011

The variable LineControl was initialised to zero, then updated in a
condition.  This change converts that to a write in each branch of the
condition, removing the Write/Read/Modify/Write sequence.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
Signed-off-by: Evan Lloyd <evan.lloyd@arm.com>
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>

diff --git a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
index d0f9381e9eaad2c14e1c86b89ff1c1cf9f0a6427..db15a8b322fe35aa3a21cd8f5cc123804c6d2fcd 100644 (file)
--- a/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
+++ b/ArmPlatformPkg/Drivers/PL011Uart/PL011Uart.c
@@ -73,20 +73,19 @@ PL011UartInitializePort (
   UINT32      LineControl;\r
   UINT32      Divisor;\r
 \r
-  LineControl = 0;\r
-\r
   // The PL011 supports a buffer of 1, 16 or 32 chars. Therefore we can accept\r
   // 1 char buffer as the minimum FIFO size. Because everything can be rounded\r
   // down, there is no maximum FIFO size.\r
   if ((*ReceiveFifoDepth == 0) || (*ReceiveFifoDepth >= 32)) {\r
     // Enable FIFO\r
-    LineControl |= PL011_UARTLCR_H_FEN;\r
+    LineControl = PL011_UARTLCR_H_FEN;\r
     if (PL011_UARTPID2_VER (MmioRead32 (UartBase + UARTPID2)) > PL011_VER_R1P4)\r
       *ReceiveFifoDepth = 32;\r
     else\r
       *ReceiveFifoDepth = 16;\r
   } else {\r
-    ASSERT (*ReceiveFifoDepth < 32);\r
+    // Disable FIFO\r
+    LineControl = 0;\r
     // Nothing else to do. 1 byte FIFO is default.\r
     *ReceiveFifoDepth = 1;\r
   }\r