]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdeModulePkg VarCheckPcd: Make sure the bin at required alignment
authorStar Zeng <star.zeng@intel.com>
Fri, 29 Dec 2017 10:12:36 +0000 (18:12 +0800)
committerStar Zeng <star.zeng@intel.com>
Tue, 2 Jan 2018 01:55:44 +0000 (09:55 +0800)
According to UEFI/PI spec, the AllocateXXXPool() interfaces should
return eight-byte aligned buffer that satisfies the required
HEADER_ALIGNMENT which is 4.

This patch adds ASSERT to make sure the bin at required alignment,
that can help catch the issue earlier about incorrect aligned buffer
returned from AllocateXXXPool().

Cc: Jian J Wang <jian.j.wang@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Star Zeng <star.zeng@intel.com>
Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
MdeModulePkg/Library/VarCheckPcdLib/VarCheckPcdLibNullClass.c

index 72b0363b1979a385ef3035ffea8111c245ce1622..d24ee966a44c49c5401762c8be619632e7bc9364 100644 (file)
@@ -1,7 +1,7 @@
 /** @file\r
   Var Check PCD handler.\r
 \r
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -435,6 +435,10 @@ LocateVarCheckPcdBin (
     //\r
     mVarCheckPcdBin = AllocateRuntimeCopyPool (VarCheckPcdBinSize, VarCheckPcdBin);\r
     ASSERT (mVarCheckPcdBin != NULL);\r
+    //\r
+    // Make sure the allocated buffer for VarCheckPcdBin at required alignment.\r
+    //\r
+    ASSERT ((((UINTN) mVarCheckPcdBin) & (HEADER_ALIGNMENT - 1)) == 0);\r
     mVarCheckPcdBinSize = VarCheckPcdBinSize;\r
     FreePool (VarCheckPcdBin);\r
 \r