EmbeddedPkg/Lan9118Dxe: Use LAN9118 MMIO wrappers

Migrate the existing code to use the new LAN9118 MMIO wrappers, ensuring
that timing requirements are respected.

The newly redundant stalls will be removed in a subsequent patch.

Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Ryan Harkin <ryan.harkin@linaro.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
index 50644e7b7d77e90dff60e7891d330c46ad640909..bef34c2e9c44613a4df253565be5aa29e091fd6a 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118Dxe.c
@@ -297,7 +297,7 @@ SnpInitialize (
   }\r
 \r
   // Read the PM register\r
-  PmConf = MmioRead32 (LAN9118_PMT_CTRL);\r
+  PmConf = Lan9118MmioRead32 (LAN9118_PMT_CTRL);\r
 \r
   // MPTCTRL_WOL_EN: Allow Wake-On-Lan to detect wake up frames or magic packets\r
   // MPTCTRL_ED_EN:  Allow energy detection to allow lowest power consumption mode\r
@@ -306,7 +306,7 @@ SnpInitialize (
   PmConf |= (MPTCTRL_WOL_EN | MPTCTRL_ED_EN | MPTCTRL_PME_EN);\r
 \r
   // Write the current configuration to the register\r
-  MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
+  Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
   gBS->Stall (LAN9118_STALL);\r
   gBS->Stall (LAN9118_STALL);\r
 \r
@@ -359,7 +359,7 @@ SnpInitialize (
   }\r
 \r
   // Now acknowledge all interrupts\r
-  MmioWrite32 (LAN9118_INT_STS, ~0);\r
+  Lan9118MmioWrite32 (LAN9118_INT_STS, ~0);\r
 \r
   // Declare the driver as initialized\r
   Snp->Mode->State = EfiSimpleNetworkInitialized;\r
@@ -422,7 +422,7 @@ SnpReset (
   }\r
 \r
   // Read the PM register\r
-  PmConf = MmioRead32 (LAN9118_PMT_CTRL);\r
+  PmConf = Lan9118MmioRead32 (LAN9118_PMT_CTRL);\r
 \r
   // MPTCTRL_WOL_EN: Allow Wake-On-Lan to detect wake up frames or magic packets\r
   // MPTCTRL_ED_EN:  Allow energy detection to allow lowest power consumption mode\r
@@ -430,7 +430,7 @@ SnpReset (
   PmConf |= (MPTCTRL_WOL_EN | MPTCTRL_ED_EN | MPTCTRL_PME_EN);\r
 \r
   // Write the current configuration to the register\r
-  MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
+  Lan9118MmioWrite32 (LAN9118_PMT_CTRL, PmConf);\r
   gBS->Stall (LAN9118_STALL);\r
 \r
   // Reactivate the LEDs\r
@@ -441,11 +441,11 @@ SnpReset (
 \r
   // Check that a buffer size was specified in SnpInitialize\r
   if (gTxBuffer != 0) {\r
-    HwConf = MmioRead32 (LAN9118_HW_CFG);        // Read the HW register\r
+    HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG);        // Read the HW register\r
     HwConf &= ~HW_CFG_TX_FIFO_SIZE_MASK;         // Clear buffer bits first\r
     HwConf |= HW_CFG_TX_FIFO_SIZE(gTxBuffer);    // assign size chosen in SnpInitialize\r
 \r
-    MmioWrite32 (LAN9118_HW_CFG, HwConf);        // Write the conf\r
+    Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf);        // Write the conf\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
@@ -454,7 +454,7 @@ SnpReset (
   StartTx (START_TX_MAC | START_TX_CFG | START_TX_CLEAR, Snp);\r
 \r
   // Now acknowledge all interrupts\r
-  MmioWrite32 (LAN9118_INT_STS, ~0);\r
+  Lan9118MmioWrite32 (LAN9118_INT_STS, ~0);\r
 \r
   return EFI_SUCCESS;\r
 }\r
@@ -996,12 +996,12 @@ SnpGetStatus (
   // consumer of SNP does not call GetStatus.)\r
   // TODO will we lose TxStatuses if this happens? Maybe in SnpTransmit we\r
   // should check for it and dump the TX Status FIFO.\r
-  FifoInt = MmioRead32 (LAN9118_FIFO_INT);\r
+  FifoInt = Lan9118MmioRead32 (LAN9118_FIFO_INT);\r
 \r
   // Clear the TX Status FIFO Overflow\r
   if ((FifoInt & INSTS_TXSO) == 0) {\r
     FifoInt |= INSTS_TXSO;\r
-    MmioWrite32 (LAN9118_FIFO_INT, FifoInt);\r
+    Lan9118MmioWrite32 (LAN9118_FIFO_INT, FifoInt);\r
   }\r
 \r
   // Read interrupt status if IrqStat is not NULL\r
@@ -1009,30 +1009,30 @@ SnpGetStatus (
     *IrqStat = 0;\r
 \r
     // Check for receive interrupt\r
-    if (MmioRead32 (LAN9118_INT_STS) & INSTS_RSFL) { // Data moved from rx FIFO\r
+    if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_RSFL) { // Data moved from rx FIFO\r
       *IrqStat |= EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT;\r
-      MmioWrite32 (LAN9118_INT_STS,INSTS_RSFL);\r
+      Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_RSFL);\r
     }\r
 \r
     // Check for transmit interrupt\r
-    if (MmioRead32 (LAN9118_INT_STS) & INSTS_TSFL) {\r
+    if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_TSFL) {\r
       *IrqStat |= EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT;\r
-      MmioWrite32 (LAN9118_INT_STS,INSTS_TSFL);\r
+      Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_TSFL);\r
     }\r
 \r
     // Check for software interrupt\r
-    if (MmioRead32 (LAN9118_INT_STS) & INSTS_SW_INT) {\r
+    if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_SW_INT) {\r
       *IrqStat |= EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT;\r
-      MmioWrite32 (LAN9118_INT_STS,INSTS_SW_INT);\r
+      Lan9118MmioWrite32 (LAN9118_INT_STS,INSTS_SW_INT);\r
     }\r
   }\r
 \r
   // Check Status of transmitted packets\r
   // (We ignore TXSTATUS_NO_CA has it might happen in Full Duplex)\r
 \r
-  NumTxStatusEntries = MmioRead32(LAN9118_TX_FIFO_INF) & TXFIFOINF_TXSUSED_MASK;\r
+  NumTxStatusEntries = Lan9118MmioRead32(LAN9118_TX_FIFO_INF) & TXFIFOINF_TXSUSED_MASK;\r
   if (NumTxStatusEntries > 0) {\r
-    TxStatus = MmioRead32 (LAN9118_TX_STATUS);\r
+    TxStatus = Lan9118MmioRead32 (LAN9118_TX_STATUS);\r
     PacketTag = TxStatus >> 16;\r
     TxStatus = TxStatus & 0xFFFF;\r
     if ((TxStatus & TXSTATUS_ES) && (TxStatus != (TXSTATUS_ES | TXSTATUS_NO_CA))) {\r
@@ -1063,7 +1063,7 @@ SnpGetStatus (
   }\r
 \r
   // Check for a TX Error interrupt\r
-  Interrupts = MmioRead32 (LAN9118_INT_STS);\r
+  Interrupts = Lan9118MmioRead32 (LAN9118_INT_STS);\r
   if (Interrupts & INSTS_TXE) {\r
     DEBUG ((EFI_D_ERROR, "LAN9118: Transmitter error. Restarting..."));\r
 \r
@@ -1221,25 +1221,25 @@ SnpTransmit (
     CommandB = TX_CMD_B_PACKET_TAG (PacketTag) | TX_CMD_B_PACKET_LENGTH (BuffSize);\r
 \r
     // Write the commands first\r
-    MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
-    MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
 \r
     // Write the destination address\r
-    MmioWrite32 (LAN9118_TX_DATA,\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA,\r
                (DstAddr->Addr[0]) |\r
                (DstAddr->Addr[1] << 8) |\r
                (DstAddr->Addr[2] << 16) |\r
                (DstAddr->Addr[3] << 24)\r
                );\r
 \r
-    MmioWrite32 (LAN9118_TX_DATA,\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA,\r
                (DstAddr->Addr[4]) |\r
                (DstAddr->Addr[5] << 8) |\r
                (SrcAddr->Addr[0] << 16) | // Write the Source Address\r
                (SrcAddr->Addr[1] << 24)\r
                );\r
 \r
-    MmioWrite32 (LAN9118_TX_DATA,\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA,\r
                (SrcAddr->Addr[2]) |\r
                (SrcAddr->Addr[3] << 8) |\r
                (SrcAddr->Addr[4] << 16) |\r
@@ -1247,18 +1247,18 @@ SnpTransmit (
                );\r
 \r
     // Write the Protocol\r
-    MmioWrite32 (LAN9118_TX_DATA, (UINT32)(HTONS (LocalProtocol)));\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, (UINT32)(HTONS (LocalProtocol)));\r
 \r
     // Next buffer is the payload\r
     CommandA = TX_CMD_A_LAST_SEGMENT | TX_CMD_A_BUFF_SIZE (BuffSize - HdrSize) | TX_CMD_A_COMPLETION_INT | TX_CMD_A_DATA_START_OFFSET (2); // 2 bytes beginning offset\r
 \r
     // Write the commands\r
-    MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
-    MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
 \r
     // Write the payload\r
     for (Count = 0; Count < ((BuffSize + 3) >> 2) - 3; Count++) {\r
-      MmioWrite32 (LAN9118_TX_DATA, LocalData[Count + 3]);\r
+      Lan9118MmioWrite32 (LAN9118_TX_DATA, LocalData[Count + 3]);\r
     }\r
   } else {\r
     // Format pointer\r
@@ -1269,12 +1269,12 @@ SnpTransmit (
     CommandB = TX_CMD_B_PACKET_TAG (PacketTag) | TX_CMD_B_PACKET_LENGTH (BuffSize);\r
 \r
     // Write the commands first\r
-    MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
-    MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandA);\r
+    Lan9118MmioWrite32 (LAN9118_TX_DATA, CommandB);\r
 \r
     // Write all the data\r
     for (Count = 0; Count < ((BuffSize + 3) >> 2); Count++) {\r
-      MmioWrite32 (LAN9118_TX_DATA, LocalData[Count]);\r
+      Lan9118MmioWrite32 (LAN9118_TX_DATA, LocalData[Count]);\r
     }\r
   }\r
 \r
@@ -1362,13 +1362,13 @@ SnpReceive (
   // explain those errors has been found so far and everything seems to\r
   // work perfectly when they are just ignored.\r
   //\r
-  IntSts = MmioRead32 (LAN9118_INT_STS);\r
+  IntSts = Lan9118MmioRead32 (LAN9118_INT_STS);\r
   if ((IntSts & INSTS_RXE) && (!(IntSts & INSTS_RSFF))) {\r
-    MmioWrite32 (LAN9118_INT_STS, INSTS_RXE);\r
+    Lan9118MmioWrite32 (LAN9118_INT_STS, INSTS_RXE);\r
   }\r
 \r
   // Count dropped frames\r
-  DroppedFrames = MmioRead32 (LAN9118_RX_DROP);\r
+  DroppedFrames = Lan9118MmioRead32 (LAN9118_RX_DROP);\r
   LanDriver->Stats.RxDroppedFrames += DroppedFrames;\r
 \r
   NumPackets = RxStatusUsedSpace (0, Snp) / 4;\r
@@ -1377,7 +1377,7 @@ SnpReceive (
   }\r
 \r
   // Read Rx Status (only if not empty)\r
-  RxFifoStatus = MmioRead32 (LAN9118_RX_STATUS);\r
+  RxFifoStatus = Lan9118MmioRead32 (LAN9118_RX_STATUS);\r
   LanDriver->Stats.RxTotalFrames += 1;\r
 \r
   // First check for errors\r
@@ -1450,13 +1450,13 @@ SnpReceive (
 \r
   // Set the amount of data to be transfered out of FIFO for THIS packet\r
   // This can be used to trigger an interrupt, and status can be checked\r
-  RxCfgValue = MmioRead32 (LAN9118_RX_CFG);\r
+  RxCfgValue = Lan9118MmioRead32 (LAN9118_RX_CFG);\r
   RxCfgValue &= ~(RXCFG_RX_DMA_CNT_MASK);\r
   RxCfgValue |= RXCFG_RX_DMA_CNT (ReadLimit);\r
 \r
   // Set end alignment to 4-bytes\r
   RxCfgValue &= ~(RXCFG_RX_END_ALIGN_MASK);\r
-  MmioWrite32 (LAN9118_RX_CFG, RxCfgValue);\r
+  Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfgValue);\r
 \r
   // Update buffer size\r
   *BuffSize = PLength; // -4 bytes may be needed: Received in buffer as\r
@@ -1471,7 +1471,7 @@ SnpReceive (
 \r
   // Read Rx Packet\r
   for (Count = 0; Count < ReadLimit; Count++) {\r
-    RawData[Count] = MmioRead32 (LAN9118_RX_DATA);\r
+    RawData[Count] = Lan9118MmioRead32 (LAN9118_RX_DATA);\r
   }\r
 \r
   // Get the destination address\r
@@ -1502,7 +1502,7 @@ SnpReceive (
   }\r
 \r
   // Check for Rx errors (worst possible error)\r
-  if (MmioRead32 (LAN9118_INT_STS) & INSTS_RXE) {\r
+  if (Lan9118MmioRead32 (LAN9118_INT_STS) & INSTS_RXE) {\r
     DEBUG ((EFI_D_WARN, "Warning: Receiver Error. Restarting...\n"));\r
 \r
     // Software reset, the RXE interrupt is cleared by the reset.\r

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h
index 11895849a49ce21bfb110bdab4a02c7985f73d9a..e44e2950a5b85f92d2cda0736c9fd88ff66b2511 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeHw.h
@@ -158,8 +158,8 @@
 #define TXSTATUS_PTAG_MASK                    (0xFFFF0000)              // Mask for Unique ID of packets (So we know who the packets are for)\r
 \r
 // ID_REV register bits\r
-#define IDREV_ID                              ((MmioRead32(LAN9118_ID_REV) & 0xFFFF0000) >> 16)\r
-#define IDREV_REV                             (MmioRead32(LAN9118_ID_REV) & 0x0000FFFF)\r
+#define IDREV_ID                              ((Lan9118MmioRead32(LAN9118_ID_REV) & 0xFFFF0000) >> 16)\r
+#define IDREV_REV                             (Lan9118MmioRead32(LAN9118_ID_REV) & 0x0000FFFF)\r
 \r
 // Interrupt Config Register bits\r
 #define IRQCFG_IRQ_TYPE                       BIT0                    // IRQ Buffer type\r

diff --git a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
index 002ea203ae56ba728a9ee992498047b827299f12..61f11b6e27606afe29d245b9934c507077454823 100644 (file)
--- a/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
+++ b/EmbeddedPkg/Drivers/Lan9118Dxe/Lan9118DxeUtil.c
@@ -98,7 +98,7 @@ IndirectMACRead32 (
   ASSERT(Index <= 12);\r
 \r
   // Wait until CSR busy bit is cleared\r
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
 \r
   // Set CSR busy bit to ensure read will occur\r
   // Set the R/W bit to indicate we are reading\r
@@ -106,13 +106,13 @@ IndirectMACRead32 (
   MacCSR = MAC_CSR_BUSY | MAC_CSR_READ | MAC_CSR_ADDR(Index);\r
 \r
   // Write to the register\r
-  MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);\r
+  Lan9118MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);\r
 \r
   // Wait until CSR busy bit is cleared\r
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
 \r
   // Now read from data register to get read value\r
-  return MmioRead32 (LAN9118_MAC_CSR_DATA);\r
+  return Lan9118MmioRead32 (LAN9118_MAC_CSR_DATA);\r
 }\r
 \r
 /*\r
@@ -134,8 +134,8 @@ WaitDummyReads (
   UINTN Count\r
   )\r
 {\r
-       while (Count--)\r
-         MmioRead32(LAN9118_BYTE_TEST);\r
+  while (Count--)\r
+    MmioRead32(LAN9118_BYTE_TEST);\r
 }\r
 \r
 UINT32\r
@@ -177,7 +177,7 @@ IndirectMACWrite32 (
   ASSERT(Index <= 12);\r
 \r
   // Wait until CSR busy bit is cleared\r
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
 \r
   // Set CSR busy bit to ensure read will occur\r
   // Set the R/W bit to indicate we are writing\r
@@ -185,13 +185,13 @@ IndirectMACWrite32 (
   MacCSR = MAC_CSR_BUSY | MAC_CSR_WRITE | MAC_CSR_ADDR(Index);\r
 \r
   // Now write the value to the register before issuing the write command\r
-  ValueWritten = MmioWrite32 (LAN9118_MAC_CSR_DATA, Value);\r
+  ValueWritten = Lan9118MmioWrite32 (LAN9118_MAC_CSR_DATA, Value);\r
 \r
   // Write the config to the register\r
-  MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);\r
+  Lan9118MmioWrite32 (LAN9118_MAC_CSR_CMD, MacCSR);\r
 \r
   // Wait until CSR busy bit is cleared\r
-  while ((MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
+  while ((Lan9118MmioRead32 (LAN9118_MAC_CSR_CMD) & MAC_CSR_BUSY) == MAC_CSR_BUSY);\r
 \r
   return ValueWritten;\r
 }\r
@@ -283,23 +283,23 @@ IndirectEEPROMRead32 (
   EepromCmd |= E2P_EPC_ADDRESS(Index);\r
 \r
   // Write to Eeprom command register\r
-  MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);\r
+  Lan9118MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);\r
   gBS->Stall (LAN9118_STALL);\r
 \r
   // Wait until operation has completed\r
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
 \r
   // Check that operation didn't time out\r
-  if (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {\r
+  if (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {\r
     DEBUG ((EFI_D_ERROR, "EEPROM Operation Timed out: Read command on index %x\n",Index));\r
     return 0;\r
   }\r
 \r
   // Wait until operation has completed\r
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
 \r
   // Finally read the value\r
-  return MmioRead32 (LAN9118_E2P_DATA);\r
+  return Lan9118MmioRead32 (LAN9118_E2P_DATA);\r
 }\r
 \r
 // Function to write to EEPROM memory\r
@@ -315,7 +315,7 @@ IndirectEEPROMWrite32 (
   ValueWritten = 0;\r
 \r
   // Read the EEPROM Command register\r
-  EepromCmd = MmioRead32 (LAN9118_E2P_CMD);\r
+  EepromCmd = Lan9118MmioRead32 (LAN9118_E2P_CMD);\r
 \r
   // Set the busy bit to ensure read will occur\r
   EepromCmd |= ((UINT32)1 << 31);\r
@@ -328,23 +328,23 @@ IndirectEEPROMWrite32 (
   EepromCmd |= (Index & 0xF);\r
 \r
   // Write the value to the data register first\r
-  ValueWritten = MmioWrite32 (LAN9118_E2P_DATA, Value);\r
+  ValueWritten = Lan9118MmioWrite32 (LAN9118_E2P_DATA, Value);\r
 \r
   // Write to Eeprom command register\r
-  MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);\r
+  Lan9118MmioWrite32 (LAN9118_E2P_CMD, EepromCmd);\r
   gBS->Stall (LAN9118_STALL);\r
 \r
   // Wait until operation has completed\r
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
 \r
   // Check that operation didn't time out\r
-  if (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {\r
+  if (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_TIMEOUT) {\r
     DEBUG ((EFI_D_ERROR, "EEPROM Operation Timed out: Write command at memloc 0x%x, with value 0x%x\n",Index, Value));\r
     return 0;\r
   }\r
 \r
   // Wait until operation has completed\r
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
 \r
   return ValueWritten;\r
 }\r
@@ -407,15 +407,15 @@ Lan9118Initialize (
   UINT64 DefaultMacAddress;\r
 \r
   // Attempt to wake-up the device if it is in a lower power state\r
-  if (((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {\r
+  if (((Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PM_MODE_MASK) >> 12) != 0) {\r
     DEBUG ((DEBUG_NET, "Waking from reduced power state.\n"));\r
-    MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);\r
+    Lan9118MmioWrite32 (LAN9118_BYTE_TEST, 0xFFFFFFFF);\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
   // Check that device is active\r
   Retries = 20;\r
-  while ((MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {\r
+  while ((Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_READY) == 0 && --Retries) {\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
   if (!Retries) {\r
@@ -424,7 +424,7 @@ Lan9118Initialize (
 \r
   // Check that EEPROM isn't active\r
   Retries = 20;\r
-  while ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){\r
+  while ((Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY) && --Retries){\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
   if (!Retries) {\r
@@ -433,7 +433,7 @@ Lan9118Initialize (
 \r
   // Check if a MAC address was loaded from EEPROM, and if it was, set it as the\r
   // current address.\r
-  if ((MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_MAC_ADDRESS_LOADED) == 0) {\r
+  if ((Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_MAC_ADDRESS_LOADED) == 0) {\r
     DEBUG ((EFI_D_ERROR, "Warning: There was an error detecting EEPROM or loading the MAC Address.\n"));\r
 \r
     // If we had an address before (set by StationAddess), continue to use it\r
@@ -453,9 +453,9 @@ Lan9118Initialize (
   }\r
 \r
   // Clear and acknowledge interrupts\r
-  MmioWrite32 (LAN9118_INT_EN, 0);\r
-  MmioWrite32 (LAN9118_IRQ_CFG, 0);\r
-  MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);\r
+  Lan9118MmioWrite32 (LAN9118_INT_EN, 0);\r
+  Lan9118MmioWrite32 (LAN9118_IRQ_CFG, 0);\r
+  Lan9118MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);\r
 \r
   // Do self tests here?\r
 \r
@@ -482,7 +482,7 @@ SoftReset (
   StopRx (STOP_RX_CLEAR, Snp); // Clear receiver FIFO\r
 \r
   // Issue the reset\r
-  HwConf = MmioRead32 (LAN9118_HW_CFG);\r
+  HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG);\r
   HwConf |= 1;\r
 \r
   // Set the Must Be One (MBO) bit\r
@@ -491,14 +491,14 @@ SoftReset (
   }\r
 \r
   // Check that EEPROM isn't active\r
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
 \r
   // Write the configuration\r
-  MmioWrite32 (LAN9118_HW_CFG, HwConf);\r
+  Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf);\r
   gBS->Stall (LAN9118_STALL);\r
 \r
   // Wait for reset to complete\r
-  while (MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {\r
+  while (Lan9118MmioRead32 (LAN9118_HW_CFG) & HWCFG_SRST) {\r
 \r
     gBS->Stall (LAN9118_STALL);\r
     ResetTime += 1;\r
@@ -511,15 +511,15 @@ SoftReset (
   }\r
 \r
   // Check that EEPROM isn't active\r
-  while (MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
+  while (Lan9118MmioRead32 (LAN9118_E2P_CMD) & E2P_EPC_BUSY);\r
 \r
   // TODO we probably need to re-set the mac address here.\r
 \r
   // Clear and acknowledge all interrupts\r
   if (Flags & SOFT_RESET_CLEAR_INT) {\r
-    MmioWrite32 (LAN9118_INT_EN, 0);\r
-    MmioWrite32 (LAN9118_IRQ_CFG, 0);\r
-    MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);\r
+    Lan9118MmioWrite32 (LAN9118_INT_EN, 0);\r
+    Lan9118MmioWrite32 (LAN9118_IRQ_CFG, 0);\r
+    Lan9118MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);\r
   }\r
 \r
   // Do self tests here?\r
@@ -542,12 +542,12 @@ PhySoftReset (
 \r
   // PMT PHY reset takes precedence over BCR\r
   if (Flags & PHY_RESET_PMT) {\r
-    PmtCtrl = MmioRead32 (LAN9118_PMT_CTRL);\r
+    PmtCtrl = Lan9118MmioRead32 (LAN9118_PMT_CTRL);\r
     PmtCtrl |= MPTCTRL_PHY_RST;\r
-    MmioWrite32 (LAN9118_PMT_CTRL,PmtCtrl);\r
+    Lan9118MmioWrite32 (LAN9118_PMT_CTRL,PmtCtrl);\r
 \r
     // Wait for completion\r
-    while (MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {\r
+    while (Lan9118MmioRead32 (LAN9118_PMT_CTRL) & MPTCTRL_PHY_RST) {\r
       gBS->Stall (LAN9118_STALL);\r
     }\r
   // PHY Basic Control Register reset\r
@@ -562,9 +562,9 @@ PhySoftReset (
 \r
   // Clear and acknowledge all interrupts\r
   if (Flags & PHY_SOFT_RESET_CLEAR_INT) {\r
-    MmioWrite32 (LAN9118_INT_EN, 0);\r
-    MmioWrite32 (LAN9118_IRQ_CFG, 0);\r
-    MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);\r
+    Lan9118MmioWrite32 (LAN9118_INT_EN, 0);\r
+    Lan9118MmioWrite32 (LAN9118_IRQ_CFG, 0);\r
+    Lan9118MmioWrite32 (LAN9118_INT_STS, 0xFFFFFFFF);\r
   }\r
 \r
   return EFI_SUCCESS;\r
@@ -582,14 +582,14 @@ ConfigureHardware (
 \r
   // Check if we want to use LEDs on GPIO\r
   if (Flags & HW_CONF_USE_LEDS) {\r
-    GpioConf = MmioRead32 (LAN9118_GPIO_CFG);\r
+    GpioConf = Lan9118MmioRead32 (LAN9118_GPIO_CFG);\r
 \r
     // Enable GPIO as LEDs and Config as Push-Pull driver\r
     GpioConf |= GPIO_GPIO0_PUSH_PULL | GPIO_GPIO1_PUSH_PULL | GPIO_GPIO2_PUSH_PULL |\r
                 GPIO_LED1_ENABLE | GPIO_LED2_ENABLE | GPIO_LED3_ENABLE;\r
 \r
     // Write the configuration\r
-    MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);\r
+    Lan9118MmioWrite32 (LAN9118_GPIO_CFG, GpioConf);\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
@@ -716,9 +716,9 @@ StopTx (
 \r
   // Check if we want to clear tx\r
   if (Flags & STOP_TX_CLEAR) {\r
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);\r
     TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;\r
-    MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
+    Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
@@ -733,15 +733,15 @@ StopTx (
   }\r
 \r
   if (Flags & STOP_TX_CFG) {\r
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);\r
 \r
     if (TxCfg & TXCFG_TX_ON) {\r
       TxCfg |= TXCFG_STOP_TX;\r
-      MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
+      Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
       gBS->Stall (LAN9118_STALL);\r
 \r
       // Wait for Tx to finish transmitting\r
-      while (MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);\r
+      while (Lan9118MmioRead32 (LAN9118_TX_CFG) & TXCFG_STOP_TX);\r
     }\r
   }\r
 \r
@@ -770,12 +770,12 @@ StopRx (
 \r
   // Check if we want to clear receiver FIFOs\r
   if (Flags & STOP_RX_CLEAR) {\r
-    RxCfg = MmioRead32 (LAN9118_RX_CFG);\r
+    RxCfg = Lan9118MmioRead32 (LAN9118_RX_CFG);\r
     RxCfg |= RXCFG_RX_DUMP;\r
-    MmioWrite32 (LAN9118_RX_CFG, RxCfg);\r
+    Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfg);\r
     gBS->Stall (LAN9118_STALL);\r
 \r
-    while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);\r
+    while (Lan9118MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);\r
   }\r
 \r
   return EFI_SUCCESS;\r
@@ -796,9 +796,9 @@ StartTx (
 \r
   // Check if we want to clear tx\r
   if (Flags & START_TX_CLEAR) {\r
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);\r
     TxCfg |= TXCFG_TXS_DUMP | TXCFG_TXD_DUMP;\r
-    MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
+    Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
     gBS->Stall (LAN9118_STALL);\r
   }\r
 \r
@@ -815,11 +815,11 @@ StartTx (
 \r
   // Check if tx was started from TX_CFG and enable if not\r
   if (Flags & START_TX_CFG) {\r
-    TxCfg = MmioRead32 (LAN9118_TX_CFG);\r
+    TxCfg = Lan9118MmioRead32 (LAN9118_TX_CFG);\r
     gBS->Stall (LAN9118_STALL);\r
     if ((TxCfg & TXCFG_TX_ON) == 0) {\r
       TxCfg |= TXCFG_TX_ON;\r
-      MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
+      Lan9118MmioWrite32 (LAN9118_TX_CFG, TxCfg);\r
       gBS->Stall (LAN9118_STALL);\r
     }\r
   }\r
@@ -847,12 +847,12 @@ StartRx (
   if ((MacCsr & MACCR_RX_EN) == 0) {\r
     // Check if we want to clear receiver FIFOs before starting\r
     if (Flags & START_RX_CLEAR) {\r
-      RxCfg = MmioRead32 (LAN9118_RX_CFG);\r
+      RxCfg = Lan9118MmioRead32 (LAN9118_RX_CFG);\r
       RxCfg |= RXCFG_RX_DUMP;\r
-      MmioWrite32 (LAN9118_RX_CFG, RxCfg);\r
+      Lan9118MmioWrite32 (LAN9118_RX_CFG, RxCfg);\r
       gBS->Stall (LAN9118_STALL);\r
 \r
-      while (MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);\r
+      while (Lan9118MmioRead32 (LAN9118_RX_CFG) & RXCFG_RX_DUMP);\r
     }\r
 \r
     MacCsr |= MACCR_RX_EN;\r
@@ -874,7 +874,7 @@ TxDataFreeSpace (
   UINT32 FreeSpace;\r
 \r
   // Get the amount of free space from information register\r
-  TxInf = MmioRead32 (LAN9118_TX_FIFO_INF);\r
+  TxInf = Lan9118MmioRead32 (LAN9118_TX_FIFO_INF);\r
   FreeSpace = (TxInf & TXFIFOINF_TDFREE_MASK);\r
 \r
   return FreeSpace; // Value in bytes\r
@@ -891,7 +891,7 @@ TxStatusUsedSpace (
   UINT32 UsedSpace;\r
 \r
   // Get the amount of used space from information register\r
-  TxInf = MmioRead32 (LAN9118_TX_FIFO_INF);\r
+  TxInf = Lan9118MmioRead32 (LAN9118_TX_FIFO_INF);\r
   UsedSpace = (TxInf & TXFIFOINF_TXSUSED_MASK) >> 16;\r
 \r
   return UsedSpace << 2; // Value in bytes\r
@@ -908,7 +908,7 @@ RxDataUsedSpace (
   UINT32 UsedSpace;\r
 \r
   // Get the amount of used space from information register\r
-  RxInf = MmioRead32 (LAN9118_RX_FIFO_INF);\r
+  RxInf = Lan9118MmioRead32 (LAN9118_RX_FIFO_INF);\r
   UsedSpace = (RxInf & RXFIFOINF_RXDUSED_MASK);\r
 \r
   return UsedSpace; // Value in bytes (rounded up to nearest DWORD)\r
@@ -925,7 +925,7 @@ RxStatusUsedSpace (
   UINT32 UsedSpace;\r
 \r
   // Get the amount of used space from information register\r
-  RxInf = MmioRead32 (LAN9118_RX_FIFO_INF);\r
+  RxInf = Lan9118MmioRead32 (LAN9118_RX_FIFO_INF);\r
   UsedSpace = (RxInf & RXFIFOINF_RXSUSED_MASK) >> 16;\r
 \r
   return UsedSpace << 2; // Value in bytes\r
@@ -963,7 +963,7 @@ ChangeFifoAllocation (
   // If we use the FIFOs (always use this first)\r
   if (Flags & ALLOC_USE_FIFOS) {\r
     // Read the current value of allocation\r
-    HwConf = MmioRead32 (LAN9118_HW_CFG);\r
+    HwConf = Lan9118MmioRead32 (LAN9118_HW_CFG);\r
     TxFifoOption = (HwConf >> 16) & 0xF;\r
 \r
     // Choose the correct size (always use larger than requested if possible)\r
@@ -1046,7 +1046,7 @@ ChangeFifoAllocation (
   // Clear and assign the new size option\r
   HwConf &= ~(0xF0000);\r
   HwConf |= ((TxFifoOption & 0xF) << 16);\r
-  MmioWrite32 (LAN9118_HW_CFG, HwConf);\r
+  Lan9118MmioWrite32 (LAN9118_HW_CFG, HwConf);\r
   gBS->Stall (LAN9118_STALL);\r
 \r
   return EFI_SUCCESS;\r