UefiCpuPkg/PiSmmCpuDxeSmm: Correct CPUID leaf used to detect SMM mode

Use Bit 29 of CPUID leaf CPUID_EXTENDED_CPU_SIG (0x80000001) to
determine the SMM save state mode.  The previous version of this
code used CPUID leaf CPUID_VERSION_INFO (0x00000001).

Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19503 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index fb4655128fadaa3ee96c173b372439b17348fa58..949dd4e5c1e7519edbbc8cacaa03c4454ea9ca13 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -913,13 +913,18 @@ PiCpuSmmEntry (
   //\r
   // Retrieve CPU Family\r
   //\r
-  AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, &RegEdx);\r
+  AsmCpuid (CPUID_VERSION_INFO, &RegEax, NULL, NULL, NULL);\r
   FamilyId = (RegEax >> 8) & 0xf;\r
   ModelId = (RegEax >> 4) & 0xf;\r
   if (FamilyId == 0x06 || FamilyId == 0x0f) {\r
     ModelId = ModelId | ((RegEax >> 12) & 0xf0);\r
   }\r
 \r
+  RegEdx = 0;\r
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL);\r
+  if (RegEax >= CPUID_EXTENDED_CPU_SIG) {\r
+    AsmCpuid (CPUID_EXTENDED_CPU_SIG, NULL, NULL, NULL, &RegEdx);\r
+  }\r
   //\r
   // Determine the mode of the CPU at the time an SMI occurs\r
   //   Intel(R) 64 and IA-32 Architectures Software Developer's Manual\r