ArmPlatformPkg: Removed the check on the CpuId to release the secondary cores from...

The idea is to remove the PCD PcdGicPrimaryCoreId to make the port easier (and also to allow changing
the primary boot CPU without adding more platform specific code to UEFI).

There is a risk the mailboxes contain garbage at boot time. But it should be easy enough to clear the
mailboxes when starting UEFI to workaround this limitation.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14477 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPlatformPkg/PrePeiCore/MainMPCore.c b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
index afe36a7538554ef1cc4ed2fb7764596c6b3b5e4e..29c96a2296fdaacb410c147c968473c541a2d206 100644 (file)
--- a/ArmPlatformPkg/PrePeiCore/MainMPCore.c
+++ b/ArmPlatformPkg/PrePeiCore/MainMPCore.c
@@ -45,7 +45,6 @@ SecondaryMain (
   UINT32                  CoreId;\r
   VOID                    (*SecondaryStart)(VOID);\r
   UINTN                   SecondaryEntryAddr;\r
-  UINTN                   AcknowledgedCoreId;\r
 \r
   ClusterId = GET_CLUSTER_ID(MpId);\r
   CoreId    = GET_CORE_ID(MpId);\r
@@ -88,8 +87,8 @@ SecondaryMain (
     SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);\r
 \r
     // Acknowledge the interrupt and send End of Interrupt signal.\r
-    ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL);\r
-  } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32 (PcdGicPrimaryCoreId)));\r
+    ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);\r
+  } while (SecondaryEntryAddr == 0);\r
 \r
   // Jump to secondary core entry point.\r
   SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r

diff --git a/ArmPlatformPkg/PrePi/MainMPCore.c b/ArmPlatformPkg/PrePi/MainMPCore.c
index 998a7763f4a45fd08f1f5704e6a32da78fe9fea3..e8cd75186f811e611df1d4853682cb9de36dc932 100644 (file)
--- a/ArmPlatformPkg/PrePi/MainMPCore.c
+++ b/ArmPlatformPkg/PrePi/MainMPCore.c
@@ -62,7 +62,6 @@ SecondaryMain (
   UINT32                  CoreId;\r
   VOID                    (*SecondaryStart)(VOID);\r
   UINTN                   SecondaryEntryAddr;\r
-  UINTN                   AcknowledgedCoreId;\r
 \r
   ClusterId = GET_CLUSTER_ID(MpId);\r
   CoreId    = GET_CORE_ID(MpId);\r
@@ -95,8 +94,8 @@ SecondaryMain (
     SecondaryEntryAddr = MmioRead32 (ArmCoreInfoTable[Index].MailboxGetAddress);\r
 \r
     // Acknowledge the interrupt and send End of Interrupt signal.\r
-    ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), &AcknowledgedCoreId, NULL);\r
-  } while ((SecondaryEntryAddr == 0) && (AcknowledgedCoreId != PcdGet32 (PcdGicPrimaryCoreId)));\r
+    ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);\r
+  } while (SecondaryEntryAddr == 0);\r
 \r
   // Jump to secondary core entry point.\r
   SecondaryStart = (VOID (*)())SecondaryEntryAddr;\r