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CommitLineData
093bc2cd
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1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
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14 */
15
d38ea87a 16#include "qemu/osdep.h"
da34e65c 17#include "qapi/error.h"
33c11879
PB
18#include "qemu-common.h"
19#include "cpu.h"
022c62cb
PB
20#include "exec/memory.h"
21#include "exec/address-spaces.h"
22#include "exec/ioport.h"
409ddd01 23#include "qapi/visitor.h"
1de7afc9 24#include "qemu/bitops.h"
8c56c1a5 25#include "qemu/error-report.h"
2c9b15ca 26#include "qom/object.h"
55d5d048 27#include "trace.h"
093bc2cd 28
022c62cb 29#include "exec/memory-internal.h"
220c3ebd 30#include "exec/ram_addr.h"
8c56c1a5 31#include "sysemu/kvm.h"
e1c57ab8 32#include "sysemu/sysemu.h"
67d95c15 33
d197063f
PB
34//#define DEBUG_UNASSIGNED
35
22bde714
JK
36static unsigned memory_region_transaction_depth;
37static bool memory_region_update_pending;
4dc56152 38static bool ioeventfd_update_pending;
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39static bool global_dirty_log = false;
40
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41static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 43
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44static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
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47typedef struct AddrRange AddrRange;
48
8417cebf 49/*
c9cdaa3a 50 * Note that signed integers are needed for negative offsetting in aliases
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51 * (large MemoryRegion::alias_offset).
52 */
093bc2cd 53struct AddrRange {
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54 Int128 start;
55 Int128 size;
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56};
57
08dafab4 58static AddrRange addrrange_make(Int128 start, Int128 size)
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59{
60 return (AddrRange) { start, size };
61}
62
63static bool addrrange_equal(AddrRange r1, AddrRange r2)
64{
08dafab4 65 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
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66}
67
08dafab4 68static Int128 addrrange_end(AddrRange r)
093bc2cd 69{
08dafab4 70 return int128_add(r.start, r.size);
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71}
72
08dafab4 73static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 74{
08dafab4 75 int128_addto(&range.start, delta);
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76 return range;
77}
78
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79static bool addrrange_contains(AddrRange range, Int128 addr)
80{
81 return int128_ge(addr, range.start)
82 && int128_lt(addr, addrrange_end(range));
83}
84
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85static bool addrrange_intersects(AddrRange r1, AddrRange r2)
86{
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87 return addrrange_contains(r1, r2.start)
88 || addrrange_contains(r2, r1.start);
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89}
90
91static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
92{
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93 Int128 start = int128_max(r1.start, r2.start);
94 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
95 return addrrange_make(start, int128_sub(end, start));
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96}
97
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98enum ListenerDirection { Forward, Reverse };
99
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100static bool memory_listener_match(MemoryListener *listener,
101 MemoryRegionSection *section)
102{
103 return !listener->address_space_filter
104 || listener->address_space_filter == section->address_space;
105}
106
107#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
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108 do { \
109 MemoryListener *_listener; \
110 \
111 switch (_direction) { \
112 case Forward: \
113 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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114 if (_listener->_callback) { \
115 _listener->_callback(_listener, ##_args); \
116 } \
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117 } \
118 break; \
119 case Reverse: \
120 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
121 memory_listeners, link) { \
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122 if (_listener->_callback) { \
123 _listener->_callback(_listener, ##_args); \
124 } \
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125 } \
126 break; \
127 default: \
128 abort(); \
129 } \
130 } while (0)
131
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132#define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
133 do { \
134 MemoryListener *_listener; \
135 \
136 switch (_direction) { \
137 case Forward: \
138 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
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139 if (_listener->_callback \
140 && memory_listener_match(_listener, _section)) { \
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141 _listener->_callback(_listener, _section, ##_args); \
142 } \
143 } \
144 break; \
145 case Reverse: \
146 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
147 memory_listeners, link) { \
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148 if (_listener->_callback \
149 && memory_listener_match(_listener, _section)) { \
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150 _listener->_callback(_listener, _section, ##_args); \
151 } \
152 } \
153 break; \
154 default: \
155 abort(); \
156 } \
157 } while (0)
158
dfde4e6e 159/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 160#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
7376e582 161 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
0e0d36b4 162 .mr = (fr)->mr, \
f6790af6 163 .address_space = (as), \
0e0d36b4 164 .offset_within_region = (fr)->offset_in_region, \
052e87b0 165 .size = (fr)->addr.size, \
0e0d36b4 166 .offset_within_address_space = int128_get64((fr)->addr.start), \
7a8499e8 167 .readonly = (fr)->readonly, \
b2dfd71c 168 }), ##_args)
0e0d36b4 169
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170struct CoalescedMemoryRange {
171 AddrRange addr;
172 QTAILQ_ENTRY(CoalescedMemoryRange) link;
173};
174
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175struct MemoryRegionIoeventfd {
176 AddrRange addr;
177 bool match_data;
178 uint64_t data;
753d5e14 179 EventNotifier *e;
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180};
181
182static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
183 MemoryRegionIoeventfd b)
184{
08dafab4 185 if (int128_lt(a.addr.start, b.addr.start)) {
3e9d69e7 186 return true;
08dafab4 187 } else if (int128_gt(a.addr.start, b.addr.start)) {
3e9d69e7 188 return false;
08dafab4 189 } else if (int128_lt(a.addr.size, b.addr.size)) {
3e9d69e7 190 return true;
08dafab4 191 } else if (int128_gt(a.addr.size, b.addr.size)) {
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192 return false;
193 } else if (a.match_data < b.match_data) {
194 return true;
195 } else if (a.match_data > b.match_data) {
196 return false;
197 } else if (a.match_data) {
198 if (a.data < b.data) {
199 return true;
200 } else if (a.data > b.data) {
201 return false;
202 }
203 }
753d5e14 204 if (a.e < b.e) {
3e9d69e7 205 return true;
753d5e14 206 } else if (a.e > b.e) {
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207 return false;
208 }
209 return false;
210}
211
212static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
213 MemoryRegionIoeventfd b)
214{
215 return !memory_region_ioeventfd_before(a, b)
216 && !memory_region_ioeventfd_before(b, a);
217}
218
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219typedef struct FlatRange FlatRange;
220typedef struct FlatView FlatView;
221
222/* Range of memory in the global map. Addresses are absolute. */
223struct FlatRange {
224 MemoryRegion *mr;
a8170e5e 225 hwaddr offset_in_region;
093bc2cd 226 AddrRange addr;
5a583347 227 uint8_t dirty_log_mask;
b138e654 228 bool romd_mode;
fb1cd6f9 229 bool readonly;
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230};
231
232/* Flattened global view of current active memory hierarchy. Kept in sorted
233 * order.
234 */
235struct FlatView {
374f2981 236 struct rcu_head rcu;
856d7245 237 unsigned ref;
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238 FlatRange *ranges;
239 unsigned nr;
240 unsigned nr_allocated;
241};
242
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243typedef struct AddressSpaceOps AddressSpaceOps;
244
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245#define FOR_EACH_FLAT_RANGE(var, view) \
246 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
247
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248static bool flatrange_equal(FlatRange *a, FlatRange *b)
249{
250 return a->mr == b->mr
251 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 252 && a->offset_in_region == b->offset_in_region
b138e654 253 && a->romd_mode == b->romd_mode
fb1cd6f9 254 && a->readonly == b->readonly;
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255}
256
257static void flatview_init(FlatView *view)
258{
856d7245 259 view->ref = 1;
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260 view->ranges = NULL;
261 view->nr = 0;
262 view->nr_allocated = 0;
263}
264
265/* Insert a range into a given position. Caller is responsible for maintaining
266 * sorting order.
267 */
268static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
269{
270 if (view->nr == view->nr_allocated) {
271 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 272 view->ranges = g_realloc(view->ranges,
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273 view->nr_allocated * sizeof(*view->ranges));
274 }
275 memmove(view->ranges + pos + 1, view->ranges + pos,
276 (view->nr - pos) * sizeof(FlatRange));
277 view->ranges[pos] = *range;
dfde4e6e 278 memory_region_ref(range->mr);
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279 ++view->nr;
280}
281
282static void flatview_destroy(FlatView *view)
283{
dfde4e6e
PB
284 int i;
285
286 for (i = 0; i < view->nr; i++) {
287 memory_region_unref(view->ranges[i].mr);
288 }
7267c094 289 g_free(view->ranges);
a9a0c06d 290 g_free(view);
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291}
292
856d7245
PB
293static void flatview_ref(FlatView *view)
294{
295 atomic_inc(&view->ref);
296}
297
298static void flatview_unref(FlatView *view)
299{
300 if (atomic_fetch_dec(&view->ref) == 1) {
301 flatview_destroy(view);
302 }
303}
304
3d8e6bf9
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305static bool can_merge(FlatRange *r1, FlatRange *r2)
306{
08dafab4 307 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 308 && r1->mr == r2->mr
08dafab4
AK
309 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
310 r1->addr.size),
311 int128_make64(r2->offset_in_region))
d0a9b5bc 312 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 313 && r1->romd_mode == r2->romd_mode
fb1cd6f9 314 && r1->readonly == r2->readonly;
3d8e6bf9
AK
315}
316
8508e024 317/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
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318static void flatview_simplify(FlatView *view)
319{
320 unsigned i, j;
321
322 i = 0;
323 while (i < view->nr) {
324 j = i + 1;
325 while (j < view->nr
326 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 327 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
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328 ++j;
329 }
330 ++i;
331 memmove(&view->ranges[i], &view->ranges[j],
332 (view->nr - j) * sizeof(view->ranges[j]));
333 view->nr -= j - i;
334 }
335}
336
e7342aa3
PB
337static bool memory_region_big_endian(MemoryRegion *mr)
338{
339#ifdef TARGET_WORDS_BIGENDIAN
340 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
341#else
342 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
343#endif
344}
345
e11ef3d1
PB
346static bool memory_region_wrong_endianness(MemoryRegion *mr)
347{
348#ifdef TARGET_WORDS_BIGENDIAN
349 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
350#else
351 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
352#endif
353}
354
355static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
356{
357 if (memory_region_wrong_endianness(mr)) {
358 switch (size) {
359 case 1:
360 break;
361 case 2:
362 *data = bswap16(*data);
363 break;
364 case 4:
365 *data = bswap32(*data);
366 break;
367 case 8:
368 *data = bswap64(*data);
369 break;
370 default:
371 abort();
372 }
373 }
374}
375
4779dc1d
HB
376static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
377{
378 MemoryRegion *root;
379 hwaddr abs_addr = offset;
380
381 abs_addr += mr->addr;
382 for (root = mr; root->container; ) {
383 root = root->container;
384 abs_addr += root->addr;
385 }
386
387 return abs_addr;
388}
389
5a68be94
HB
390static int get_cpu_index(void)
391{
392 if (current_cpu) {
393 return current_cpu->cpu_index;
394 }
395 return -1;
396}
397
cc05c43a
PM
398static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
399 hwaddr addr,
400 uint64_t *value,
401 unsigned size,
402 unsigned shift,
403 uint64_t mask,
404 MemTxAttrs attrs)
405{
406 uint64_t tmp;
407
408 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
23d92d68 409 if (mr->subpage) {
5a68be94 410 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
411 } else if (mr == &io_mem_notdirty) {
412 /* Accesses to code which has previously been translated into a TB show
413 * up in the MMIO path, as accesses to the io_mem_notdirty
414 * MemoryRegion. */
415 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
416 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
417 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 418 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 419 }
cc05c43a
PM
420 *value |= (tmp & mask) << shift;
421 return MEMTX_OK;
422}
423
424static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
425 hwaddr addr,
426 uint64_t *value,
427 unsigned size,
428 unsigned shift,
cc05c43a
PM
429 uint64_t mask,
430 MemTxAttrs attrs)
ce5d2f33 431{
ce5d2f33
PB
432 uint64_t tmp;
433
cc05c43a 434 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 435 if (mr->subpage) {
5a68be94 436 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
437 } else if (mr == &io_mem_notdirty) {
438 /* Accesses to code which has previously been translated into a TB show
439 * up in the MMIO path, as accesses to the io_mem_notdirty
440 * MemoryRegion. */
441 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
442 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
443 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 444 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 445 }
ce5d2f33 446 *value |= (tmp & mask) << shift;
cc05c43a 447 return MEMTX_OK;
ce5d2f33
PB
448}
449
cc05c43a
PM
450static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
451 hwaddr addr,
452 uint64_t *value,
453 unsigned size,
454 unsigned shift,
455 uint64_t mask,
456 MemTxAttrs attrs)
164a4dcd 457{
cc05c43a
PM
458 uint64_t tmp = 0;
459 MemTxResult r;
164a4dcd 460
cc05c43a 461 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 462 if (mr->subpage) {
5a68be94 463 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
464 } else if (mr == &io_mem_notdirty) {
465 /* Accesses to code which has previously been translated into a TB show
466 * up in the MMIO path, as accesses to the io_mem_notdirty
467 * MemoryRegion. */
468 trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
469 } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
470 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 471 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 472 }
164a4dcd 473 *value |= (tmp & mask) << shift;
cc05c43a 474 return r;
164a4dcd
AK
475}
476
cc05c43a
PM
477static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
478 hwaddr addr,
479 uint64_t *value,
480 unsigned size,
481 unsigned shift,
482 uint64_t mask,
483 MemTxAttrs attrs)
ce5d2f33 484{
ce5d2f33
PB
485 uint64_t tmp;
486
487 tmp = (*value >> shift) & mask;
23d92d68 488 if (mr->subpage) {
5a68be94 489 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
490 } else if (mr == &io_mem_notdirty) {
491 /* Accesses to code which has previously been translated into a TB show
492 * up in the MMIO path, as accesses to the io_mem_notdirty
493 * MemoryRegion. */
494 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
495 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
496 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 497 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 498 }
ce5d2f33 499 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
cc05c43a 500 return MEMTX_OK;
ce5d2f33
PB
501}
502
cc05c43a
PM
503static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
504 hwaddr addr,
505 uint64_t *value,
506 unsigned size,
507 unsigned shift,
508 uint64_t mask,
509 MemTxAttrs attrs)
164a4dcd 510{
164a4dcd
AK
511 uint64_t tmp;
512
513 tmp = (*value >> shift) & mask;
23d92d68 514 if (mr->subpage) {
5a68be94 515 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
516 } else if (mr == &io_mem_notdirty) {
517 /* Accesses to code which has previously been translated into a TB show
518 * up in the MMIO path, as accesses to the io_mem_notdirty
519 * MemoryRegion. */
520 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
521 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
522 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 523 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 524 }
164a4dcd 525 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 526 return MEMTX_OK;
164a4dcd
AK
527}
528
cc05c43a
PM
529static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
530 hwaddr addr,
531 uint64_t *value,
532 unsigned size,
533 unsigned shift,
534 uint64_t mask,
535 MemTxAttrs attrs)
536{
537 uint64_t tmp;
538
cc05c43a 539 tmp = (*value >> shift) & mask;
23d92d68 540 if (mr->subpage) {
5a68be94 541 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
f2d08942
HB
542 } else if (mr == &io_mem_notdirty) {
543 /* Accesses to code which has previously been translated into a TB show
544 * up in the MMIO path, as accesses to the io_mem_notdirty
545 * MemoryRegion. */
546 trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
4779dc1d
HB
547 } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
548 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
5a68be94 549 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
23d92d68 550 }
cc05c43a
PM
551 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
552}
553
554static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
555 uint64_t *value,
556 unsigned size,
557 unsigned access_size_min,
558 unsigned access_size_max,
cc05c43a
PM
559 MemTxResult (*access)(MemoryRegion *mr,
560 hwaddr addr,
561 uint64_t *value,
562 unsigned size,
563 unsigned shift,
564 uint64_t mask,
565 MemTxAttrs attrs),
566 MemoryRegion *mr,
567 MemTxAttrs attrs)
164a4dcd
AK
568{
569 uint64_t access_mask;
570 unsigned access_size;
571 unsigned i;
cc05c43a 572 MemTxResult r = MEMTX_OK;
164a4dcd
AK
573
574 if (!access_size_min) {
575 access_size_min = 1;
576 }
577 if (!access_size_max) {
578 access_size_max = 4;
579 }
ce5d2f33
PB
580
581 /* FIXME: support unaligned access? */
164a4dcd
AK
582 access_size = MAX(MIN(size, access_size_max), access_size_min);
583 access_mask = -1ULL >> (64 - access_size * 8);
e7342aa3
PB
584 if (memory_region_big_endian(mr)) {
585 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
586 r |= access(mr, addr + i, value, access_size,
587 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
588 }
589 } else {
590 for (i = 0; i < size; i += access_size) {
cc05c43a
PM
591 r |= access(mr, addr + i, value, access_size, i * 8,
592 access_mask, attrs);
e7342aa3 593 }
164a4dcd 594 }
cc05c43a 595 return r;
164a4dcd
AK
596}
597
e2177955
AK
598static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
599{
0d673e36
AK
600 AddressSpace *as;
601
feca4ac1
PB
602 while (mr->container) {
603 mr = mr->container;
e2177955 604 }
0d673e36
AK
605 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
606 if (mr == as->root) {
607 return as;
608 }
e2177955 609 }
eed2bacf 610 return NULL;
e2177955
AK
611}
612
093bc2cd
AK
613/* Render a memory region into the global view. Ranges in @view obscure
614 * ranges in @mr.
615 */
616static void render_memory_region(FlatView *view,
617 MemoryRegion *mr,
08dafab4 618 Int128 base,
fb1cd6f9
AK
619 AddrRange clip,
620 bool readonly)
093bc2cd
AK
621{
622 MemoryRegion *subregion;
623 unsigned i;
a8170e5e 624 hwaddr offset_in_region;
08dafab4
AK
625 Int128 remain;
626 Int128 now;
093bc2cd
AK
627 FlatRange fr;
628 AddrRange tmp;
629
6bba19ba
AK
630 if (!mr->enabled) {
631 return;
632 }
633
08dafab4 634 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 635 readonly |= mr->readonly;
093bc2cd
AK
636
637 tmp = addrrange_make(base, mr->size);
638
639 if (!addrrange_intersects(tmp, clip)) {
640 return;
641 }
642
643 clip = addrrange_intersection(tmp, clip);
644
645 if (mr->alias) {
08dafab4
AK
646 int128_subfrom(&base, int128_make64(mr->alias->addr));
647 int128_subfrom(&base, int128_make64(mr->alias_offset));
fb1cd6f9 648 render_memory_region(view, mr->alias, base, clip, readonly);
093bc2cd
AK
649 return;
650 }
651
652 /* Render subregions in priority order. */
653 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
fb1cd6f9 654 render_memory_region(view, subregion, base, clip, readonly);
093bc2cd
AK
655 }
656
14a3c10a 657 if (!mr->terminates) {
093bc2cd
AK
658 return;
659 }
660
08dafab4 661 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
662 base = clip.start;
663 remain = clip.size;
664
2eb74e1a 665 fr.mr = mr;
6f6a5ef3 666 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 667 fr.romd_mode = mr->romd_mode;
2eb74e1a
PC
668 fr.readonly = readonly;
669
093bc2cd 670 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
671 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
672 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
673 continue;
674 }
08dafab4
AK
675 if (int128_lt(base, view->ranges[i].addr.start)) {
676 now = int128_min(remain,
677 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
678 fr.offset_in_region = offset_in_region;
679 fr.addr = addrrange_make(base, now);
680 flatview_insert(view, i, &fr);
681 ++i;
08dafab4
AK
682 int128_addto(&base, now);
683 offset_in_region += int128_get64(now);
684 int128_subfrom(&remain, now);
093bc2cd 685 }
d26a8cae
AK
686 now = int128_sub(int128_min(int128_add(base, remain),
687 addrrange_end(view->ranges[i].addr)),
688 base);
689 int128_addto(&base, now);
690 offset_in_region += int128_get64(now);
691 int128_subfrom(&remain, now);
093bc2cd 692 }
08dafab4 693 if (int128_nz(remain)) {
093bc2cd
AK
694 fr.offset_in_region = offset_in_region;
695 fr.addr = addrrange_make(base, remain);
696 flatview_insert(view, i, &fr);
697 }
698}
699
700/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 701static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 702{
a9a0c06d 703 FlatView *view;
093bc2cd 704
a9a0c06d
PB
705 view = g_new(FlatView, 1);
706 flatview_init(view);
093bc2cd 707
83f3c251 708 if (mr) {
a9a0c06d 709 render_memory_region(view, mr, int128_zero(),
83f3c251
AK
710 addrrange_make(int128_zero(), int128_2_64()), false);
711 }
a9a0c06d 712 flatview_simplify(view);
093bc2cd
AK
713
714 return view;
715}
716
3e9d69e7
AK
717static void address_space_add_del_ioeventfds(AddressSpace *as,
718 MemoryRegionIoeventfd *fds_new,
719 unsigned fds_new_nb,
720 MemoryRegionIoeventfd *fds_old,
721 unsigned fds_old_nb)
722{
723 unsigned iold, inew;
80a1ea37
AK
724 MemoryRegionIoeventfd *fd;
725 MemoryRegionSection section;
3e9d69e7
AK
726
727 /* Generate a symmetric difference of the old and new fd sets, adding
728 * and deleting as necessary.
729 */
730
731 iold = inew = 0;
732 while (iold < fds_old_nb || inew < fds_new_nb) {
733 if (iold < fds_old_nb
734 && (inew == fds_new_nb
735 || memory_region_ioeventfd_before(fds_old[iold],
736 fds_new[inew]))) {
80a1ea37
AK
737 fd = &fds_old[iold];
738 section = (MemoryRegionSection) {
f6790af6 739 .address_space = as,
80a1ea37 740 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 741 .size = fd->addr.size,
80a1ea37
AK
742 };
743 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
753d5e14 744 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
745 ++iold;
746 } else if (inew < fds_new_nb
747 && (iold == fds_old_nb
748 || memory_region_ioeventfd_before(fds_new[inew],
749 fds_old[iold]))) {
80a1ea37
AK
750 fd = &fds_new[inew];
751 section = (MemoryRegionSection) {
f6790af6 752 .address_space = as,
80a1ea37 753 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 754 .size = fd->addr.size,
80a1ea37
AK
755 };
756 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
753d5e14 757 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
758 ++inew;
759 } else {
760 ++iold;
761 ++inew;
762 }
763 }
764}
765
856d7245
PB
766static FlatView *address_space_get_flatview(AddressSpace *as)
767{
768 FlatView *view;
769
374f2981
PB
770 rcu_read_lock();
771 view = atomic_rcu_read(&as->current_map);
856d7245 772 flatview_ref(view);
374f2981 773 rcu_read_unlock();
856d7245
PB
774 return view;
775}
776
3e9d69e7
AK
777static void address_space_update_ioeventfds(AddressSpace *as)
778{
99e86347 779 FlatView *view;
3e9d69e7
AK
780 FlatRange *fr;
781 unsigned ioeventfd_nb = 0;
782 MemoryRegionIoeventfd *ioeventfds = NULL;
783 AddrRange tmp;
784 unsigned i;
785
856d7245 786 view = address_space_get_flatview(as);
99e86347 787 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
788 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
789 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
790 int128_sub(fr->addr.start,
791 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
792 if (addrrange_intersects(fr->addr, tmp)) {
793 ++ioeventfd_nb;
7267c094 794 ioeventfds = g_realloc(ioeventfds,
3e9d69e7
AK
795 ioeventfd_nb * sizeof(*ioeventfds));
796 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
797 ioeventfds[ioeventfd_nb-1].addr = tmp;
798 }
799 }
800 }
801
802 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
803 as->ioeventfds, as->ioeventfd_nb);
804
7267c094 805 g_free(as->ioeventfds);
3e9d69e7
AK
806 as->ioeventfds = ioeventfds;
807 as->ioeventfd_nb = ioeventfd_nb;
856d7245 808 flatview_unref(view);
3e9d69e7
AK
809}
810
b8af1afb 811static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
812 const FlatView *old_view,
813 const FlatView *new_view,
b8af1afb 814 bool adding)
093bc2cd 815{
093bc2cd
AK
816 unsigned iold, inew;
817 FlatRange *frold, *frnew;
093bc2cd
AK
818
819 /* Generate a symmetric difference of the old and new memory maps.
820 * Kill ranges in the old map, and instantiate ranges in the new map.
821 */
822 iold = inew = 0;
a9a0c06d
PB
823 while (iold < old_view->nr || inew < new_view->nr) {
824 if (iold < old_view->nr) {
825 frold = &old_view->ranges[iold];
093bc2cd
AK
826 } else {
827 frold = NULL;
828 }
a9a0c06d
PB
829 if (inew < new_view->nr) {
830 frnew = &new_view->ranges[inew];
093bc2cd
AK
831 } else {
832 frnew = NULL;
833 }
834
835 if (frold
836 && (!frnew
08dafab4
AK
837 || int128_lt(frold->addr.start, frnew->addr.start)
838 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 839 && !flatrange_equal(frold, frnew)))) {
41a6e477 840 /* In old but not in new, or in both but attributes changed. */
093bc2cd 841
b8af1afb 842 if (!adding) {
72e22d2f 843 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
844 }
845
093bc2cd
AK
846 ++iold;
847 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 848 /* In both and unchanged (except logging may have changed) */
093bc2cd 849
b8af1afb 850 if (adding) {
50c1e149 851 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB
852 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
853 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
854 frold->dirty_log_mask,
855 frnew->dirty_log_mask);
856 }
857 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
858 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
859 frold->dirty_log_mask,
860 frnew->dirty_log_mask);
b8af1afb 861 }
5a583347
AK
862 }
863
093bc2cd
AK
864 ++iold;
865 ++inew;
093bc2cd
AK
866 } else {
867 /* In new */
868
b8af1afb 869 if (adding) {
72e22d2f 870 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
b8af1afb
AK
871 }
872
093bc2cd
AK
873 ++inew;
874 }
875 }
b8af1afb
AK
876}
877
878
879static void address_space_update_topology(AddressSpace *as)
880{
856d7245 881 FlatView *old_view = address_space_get_flatview(as);
a9a0c06d 882 FlatView *new_view = generate_memory_topology(as->root);
b8af1afb
AK
883
884 address_space_update_topology_pass(as, old_view, new_view, false);
885 address_space_update_topology_pass(as, old_view, new_view, true);
886
374f2981
PB
887 /* Writes are protected by the BQL. */
888 atomic_rcu_set(&as->current_map, new_view);
889 call_rcu(old_view, flatview_unref, rcu);
856d7245
PB
890
891 /* Note that all the old MemoryRegions are still alive up to this
892 * point. This relieves most MemoryListeners from the need to
893 * ref/unref the MemoryRegions they get---unless they use them
894 * outside the iothread mutex, in which case precise reference
895 * counting is necessary.
896 */
897 flatview_unref(old_view);
898
3e9d69e7 899 address_space_update_ioeventfds(as);
093bc2cd
AK
900}
901
4ef4db86
AK
902void memory_region_transaction_begin(void)
903{
bb880ded 904 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
905 ++memory_region_transaction_depth;
906}
907
4dc56152
GA
908static void memory_region_clear_pending(void)
909{
910 memory_region_update_pending = false;
911 ioeventfd_update_pending = false;
912}
913
4ef4db86
AK
914void memory_region_transaction_commit(void)
915{
0d673e36
AK
916 AddressSpace *as;
917
4ef4db86
AK
918 assert(memory_region_transaction_depth);
919 --memory_region_transaction_depth;
4dc56152
GA
920 if (!memory_region_transaction_depth) {
921 if (memory_region_update_pending) {
922 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 923
4dc56152
GA
924 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
925 address_space_update_topology(as);
926 }
02e2b95f 927
4dc56152
GA
928 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
929 } else if (ioeventfd_update_pending) {
930 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
931 address_space_update_ioeventfds(as);
932 }
933 }
934 memory_region_clear_pending();
935 }
4ef4db86
AK
936}
937
545e92e0
AK
938static void memory_region_destructor_none(MemoryRegion *mr)
939{
940}
941
942static void memory_region_destructor_ram(MemoryRegion *mr)
943{
f1060c55 944 qemu_ram_free(mr->ram_block);
545e92e0
AK
945}
946
d0a9b5bc
AK
947static void memory_region_destructor_rom_device(MemoryRegion *mr)
948{
f1060c55 949 qemu_ram_free(mr->ram_block);
d0a9b5bc
AK
950}
951
b4fefef9
PC
952static bool memory_region_need_escape(char c)
953{
954 return c == '/' || c == '[' || c == '\\' || c == ']';
955}
956
957static char *memory_region_escape_name(const char *name)
958{
959 const char *p;
960 char *escaped, *q;
961 uint8_t c;
962 size_t bytes = 0;
963
964 for (p = name; *p; p++) {
965 bytes += memory_region_need_escape(*p) ? 4 : 1;
966 }
967 if (bytes == p - name) {
968 return g_memdup(name, bytes + 1);
969 }
970
971 escaped = g_malloc(bytes + 1);
972 for (p = name, q = escaped; *p; p++) {
973 c = *p;
974 if (unlikely(memory_region_need_escape(c))) {
975 *q++ = '\\';
976 *q++ = 'x';
977 *q++ = "0123456789abcdef"[c >> 4];
978 c = "0123456789abcdef"[c & 15];
979 }
980 *q++ = c;
981 }
982 *q = 0;
983 return escaped;
984}
985
093bc2cd 986void memory_region_init(MemoryRegion *mr,
2c9b15ca 987 Object *owner,
093bc2cd
AK
988 const char *name,
989 uint64_t size)
990{
22a893e4 991 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
08dafab4
AK
992 mr->size = int128_make64(size);
993 if (size == UINT64_MAX) {
994 mr->size = int128_2_64();
995 }
302fa283 996 mr->name = g_strdup(name);
612263cf 997 mr->owner = owner;
58eaa217 998 mr->ram_block = NULL;
b4fefef9
PC
999
1000 if (name) {
843ef73a
PC
1001 char *escaped_name = memory_region_escape_name(name);
1002 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB
1003
1004 if (!owner) {
1005 owner = container_get(qdev_get_machine(), "/unattached");
1006 }
1007
843ef73a 1008 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
b4fefef9 1009 object_unref(OBJECT(mr));
843ef73a
PC
1010 g_free(name_array);
1011 g_free(escaped_name);
b4fefef9
PC
1012 }
1013}
1014
d7bce999
EB
1015static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
1016 void *opaque, Error **errp)
409ddd01
PC
1017{
1018 MemoryRegion *mr = MEMORY_REGION(obj);
1019 uint64_t value = mr->addr;
1020
51e72bc1 1021 visit_type_uint64(v, name, &value, errp);
409ddd01
PC
1022}
1023
d7bce999
EB
1024static void memory_region_get_container(Object *obj, Visitor *v,
1025 const char *name, void *opaque,
1026 Error **errp)
409ddd01
PC
1027{
1028 MemoryRegion *mr = MEMORY_REGION(obj);
1029 gchar *path = (gchar *)"";
1030
1031 if (mr->container) {
1032 path = object_get_canonical_path(OBJECT(mr->container));
1033 }
51e72bc1 1034 visit_type_str(v, name, &path, errp);
409ddd01
PC
1035 if (mr->container) {
1036 g_free(path);
1037 }
1038}
1039
1040static Object *memory_region_resolve_container(Object *obj, void *opaque,
1041 const char *part)
1042{
1043 MemoryRegion *mr = MEMORY_REGION(obj);
1044
1045 return OBJECT(mr->container);
1046}
1047
d7bce999
EB
1048static void memory_region_get_priority(Object *obj, Visitor *v,
1049 const char *name, void *opaque,
1050 Error **errp)
d33382da
PC
1051{
1052 MemoryRegion *mr = MEMORY_REGION(obj);
1053 int32_t value = mr->priority;
1054
51e72bc1 1055 visit_type_int32(v, name, &value, errp);
d33382da
PC
1056}
1057
d7bce999
EB
1058static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1059 void *opaque, Error **errp)
52aef7bb
PC
1060{
1061 MemoryRegion *mr = MEMORY_REGION(obj);
1062 uint64_t value = memory_region_size(mr);
1063
51e72bc1 1064 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC
1065}
1066
b4fefef9
PC
1067static void memory_region_initfn(Object *obj)
1068{
1069 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1070 ObjectProperty *op;
b4fefef9
PC
1071
1072 mr->ops = &unassigned_mem_ops;
6bba19ba 1073 mr->enabled = true;
5f9a5ea1 1074 mr->romd_mode = true;
196ea131 1075 mr->global_locking = true;
545e92e0 1076 mr->destructor = memory_region_destructor_none;
093bc2cd 1077 QTAILQ_INIT(&mr->subregions);
093bc2cd 1078 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1079
1080 op = object_property_add(OBJECT(mr), "container",
1081 "link<" TYPE_MEMORY_REGION ">",
1082 memory_region_get_container,
1083 NULL, /* memory_region_set_container */
1084 NULL, NULL, &error_abort);
1085 op->resolve = memory_region_resolve_container;
1086
1087 object_property_add(OBJECT(mr), "addr", "uint64",
1088 memory_region_get_addr,
1089 NULL, /* memory_region_set_addr */
1090 NULL, NULL, &error_abort);
d33382da
PC
1091 object_property_add(OBJECT(mr), "priority", "uint32",
1092 memory_region_get_priority,
1093 NULL, /* memory_region_set_priority */
1094 NULL, NULL, &error_abort);
52aef7bb
PC
1095 object_property_add(OBJECT(mr), "size", "uint64",
1096 memory_region_get_size,
1097 NULL, /* memory_region_set_size, */
1098 NULL, NULL, &error_abort);
093bc2cd
AK
1099}
1100
b018ddf6
PB
1101static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1102 unsigned size)
1103{
1104#ifdef DEBUG_UNASSIGNED
1105 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1106#endif
4917cf44
AF
1107 if (current_cpu != NULL) {
1108 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
c658b94f 1109 }
68a7439a 1110 return 0;
b018ddf6
PB
1111}
1112
1113static void unassigned_mem_write(void *opaque, hwaddr addr,
1114 uint64_t val, unsigned size)
1115{
1116#ifdef DEBUG_UNASSIGNED
1117 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1118#endif
4917cf44
AF
1119 if (current_cpu != NULL) {
1120 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
c658b94f 1121 }
b018ddf6
PB
1122}
1123
d197063f
PB
1124static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1125 unsigned size, bool is_write)
1126{
1127 return false;
1128}
1129
1130const MemoryRegionOps unassigned_mem_ops = {
1131 .valid.accepts = unassigned_mem_accepts,
1132 .endianness = DEVICE_NATIVE_ENDIAN,
1133};
1134
d2702032
PB
1135bool memory_region_access_valid(MemoryRegion *mr,
1136 hwaddr addr,
1137 unsigned size,
1138 bool is_write)
093bc2cd 1139{
a014ed07
PB
1140 int access_size_min, access_size_max;
1141 int access_size, i;
897fa7cf 1142
093bc2cd
AK
1143 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1144 return false;
1145 }
1146
a014ed07 1147 if (!mr->ops->valid.accepts) {
093bc2cd
AK
1148 return true;
1149 }
1150
a014ed07
PB
1151 access_size_min = mr->ops->valid.min_access_size;
1152 if (!mr->ops->valid.min_access_size) {
1153 access_size_min = 1;
1154 }
1155
1156 access_size_max = mr->ops->valid.max_access_size;
1157 if (!mr->ops->valid.max_access_size) {
1158 access_size_max = 4;
1159 }
1160
1161 access_size = MAX(MIN(size, access_size_max), access_size_min);
1162 for (i = 0; i < size; i += access_size) {
1163 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1164 is_write)) {
1165 return false;
1166 }
093bc2cd 1167 }
a014ed07 1168
093bc2cd
AK
1169 return true;
1170}
1171
cc05c43a
PM
1172static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1173 hwaddr addr,
1174 uint64_t *pval,
1175 unsigned size,
1176 MemTxAttrs attrs)
093bc2cd 1177{
cc05c43a 1178 *pval = 0;
093bc2cd 1179
ce5d2f33 1180 if (mr->ops->read) {
cc05c43a
PM
1181 return access_with_adjusted_size(addr, pval, size,
1182 mr->ops->impl.min_access_size,
1183 mr->ops->impl.max_access_size,
1184 memory_region_read_accessor,
1185 mr, attrs);
1186 } else if (mr->ops->read_with_attrs) {
1187 return access_with_adjusted_size(addr, pval, size,
1188 mr->ops->impl.min_access_size,
1189 mr->ops->impl.max_access_size,
1190 memory_region_read_with_attrs_accessor,
1191 mr, attrs);
ce5d2f33 1192 } else {
cc05c43a
PM
1193 return access_with_adjusted_size(addr, pval, size, 1, 4,
1194 memory_region_oldmmio_read_accessor,
1195 mr, attrs);
74901c3b 1196 }
093bc2cd
AK
1197}
1198
3b643495
PM
1199MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1200 hwaddr addr,
1201 uint64_t *pval,
1202 unsigned size,
1203 MemTxAttrs attrs)
a621f38d 1204{
cc05c43a
PM
1205 MemTxResult r;
1206
791af8c8
PB
1207 if (!memory_region_access_valid(mr, addr, size, false)) {
1208 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1209 return MEMTX_DECODE_ERROR;
791af8c8 1210 }
a621f38d 1211
cc05c43a 1212 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
791af8c8 1213 adjust_endianness(mr, pval, size);
cc05c43a 1214 return r;
a621f38d 1215}
093bc2cd 1216
8c56c1a5
PF
1217/* Return true if an eventfd was signalled */
1218static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1219 hwaddr addr,
1220 uint64_t data,
1221 unsigned size,
1222 MemTxAttrs attrs)
1223{
1224 MemoryRegionIoeventfd ioeventfd = {
1225 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1226 .data = data,
1227 };
1228 unsigned i;
1229
1230 for (i = 0; i < mr->ioeventfd_nb; i++) {
1231 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1232 ioeventfd.e = mr->ioeventfds[i].e;
1233
1234 if (memory_region_ioeventfd_equal(ioeventfd, mr->ioeventfds[i])) {
1235 event_notifier_set(ioeventfd.e);
1236 return true;
1237 }
1238 }
1239
1240 return false;
1241}
1242
3b643495
PM
1243MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1244 hwaddr addr,
1245 uint64_t data,
1246 unsigned size,
1247 MemTxAttrs attrs)
a621f38d 1248{
897fa7cf 1249 if (!memory_region_access_valid(mr, addr, size, true)) {
b018ddf6 1250 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1251 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1252 }
1253
a621f38d
AK
1254 adjust_endianness(mr, &data, size);
1255
8c56c1a5
PF
1256 if ((!kvm_eventfds_enabled()) &&
1257 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1258 return MEMTX_OK;
1259 }
1260
ce5d2f33 1261 if (mr->ops->write) {
cc05c43a
PM
1262 return access_with_adjusted_size(addr, &data, size,
1263 mr->ops->impl.min_access_size,
1264 mr->ops->impl.max_access_size,
1265 memory_region_write_accessor, mr,
1266 attrs);
1267 } else if (mr->ops->write_with_attrs) {
1268 return
1269 access_with_adjusted_size(addr, &data, size,
1270 mr->ops->impl.min_access_size,
1271 mr->ops->impl.max_access_size,
1272 memory_region_write_with_attrs_accessor,
1273 mr, attrs);
ce5d2f33 1274 } else {
cc05c43a
PM
1275 return access_with_adjusted_size(addr, &data, size, 1, 4,
1276 memory_region_oldmmio_write_accessor,
1277 mr, attrs);
74901c3b 1278 }
093bc2cd
AK
1279}
1280
093bc2cd 1281void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1282 Object *owner,
093bc2cd
AK
1283 const MemoryRegionOps *ops,
1284 void *opaque,
1285 const char *name,
1286 uint64_t size)
1287{
2c9b15ca 1288 memory_region_init(mr, owner, name, size);
6d6d2abf 1289 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1290 mr->opaque = opaque;
14a3c10a 1291 mr->terminates = true;
093bc2cd
AK
1292}
1293
1294void memory_region_init_ram(MemoryRegion *mr,
2c9b15ca 1295 Object *owner,
093bc2cd 1296 const char *name,
49946538
HT
1297 uint64_t size,
1298 Error **errp)
093bc2cd 1299{
2c9b15ca 1300 memory_region_init(mr, owner, name, size);
8ea9252a 1301 mr->ram = true;
14a3c10a 1302 mr->terminates = true;
545e92e0 1303 mr->destructor = memory_region_destructor_ram;
8e41fb63 1304 mr->ram_block = qemu_ram_alloc(size, mr, errp);
677e7805 1305 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
0b183fc8
PB
1306}
1307
60786ef3
MT
1308void memory_region_init_resizeable_ram(MemoryRegion *mr,
1309 Object *owner,
1310 const char *name,
1311 uint64_t size,
1312 uint64_t max_size,
1313 void (*resized)(const char*,
1314 uint64_t length,
1315 void *host),
1316 Error **errp)
1317{
1318 memory_region_init(mr, owner, name, size);
1319 mr->ram = true;
1320 mr->terminates = true;
1321 mr->destructor = memory_region_destructor_ram;
8e41fb63
FZ
1322 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1323 mr, errp);
677e7805 1324 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
60786ef3
MT
1325}
1326
0b183fc8
PB
1327#ifdef __linux__
1328void memory_region_init_ram_from_file(MemoryRegion *mr,
1329 struct Object *owner,
1330 const char *name,
1331 uint64_t size,
dbcb8981 1332 bool share,
7f56e740
PB
1333 const char *path,
1334 Error **errp)
0b183fc8
PB
1335{
1336 memory_region_init(mr, owner, name, size);
1337 mr->ram = true;
1338 mr->terminates = true;
1339 mr->destructor = memory_region_destructor_ram;
8e41fb63 1340 mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
677e7805 1341 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
093bc2cd 1342}
0b183fc8 1343#endif
093bc2cd
AK
1344
1345void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1346 Object *owner,
093bc2cd
AK
1347 const char *name,
1348 uint64_t size,
1349 void *ptr)
1350{
2c9b15ca 1351 memory_region_init(mr, owner, name, size);
8ea9252a 1352 mr->ram = true;
14a3c10a 1353 mr->terminates = true;
fc3e7665 1354 mr->destructor = memory_region_destructor_ram;
677e7805 1355 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
ef701d7b
HT
1356
1357 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1358 assert(ptr != NULL);
8e41fb63 1359 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK
1360}
1361
e4dc3f59
ND
1362void memory_region_set_skip_dump(MemoryRegion *mr)
1363{
1364 mr->skip_dump = true;
1365}
1366
093bc2cd 1367void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1368 Object *owner,
093bc2cd
AK
1369 const char *name,
1370 MemoryRegion *orig,
a8170e5e 1371 hwaddr offset,
093bc2cd
AK
1372 uint64_t size)
1373{
2c9b15ca 1374 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1375 mr->alias = orig;
1376 mr->alias_offset = offset;
1377}
1378
a1777f7f
PM
1379void memory_region_init_rom(MemoryRegion *mr,
1380 struct Object *owner,
1381 const char *name,
1382 uint64_t size,
1383 Error **errp)
1384{
1385 memory_region_init(mr, owner, name, size);
1386 mr->ram = true;
1387 mr->readonly = true;
1388 mr->terminates = true;
1389 mr->destructor = memory_region_destructor_ram;
1390 mr->ram_block = qemu_ram_alloc(size, mr, errp);
1391 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1392}
1393
d0a9b5bc 1394void memory_region_init_rom_device(MemoryRegion *mr,
2c9b15ca 1395 Object *owner,
d0a9b5bc 1396 const MemoryRegionOps *ops,
75f5941c 1397 void *opaque,
d0a9b5bc 1398 const char *name,
33e0eb52
HT
1399 uint64_t size,
1400 Error **errp)
d0a9b5bc 1401{
39e0b03d 1402 assert(ops);
2c9b15ca 1403 memory_region_init(mr, owner, name, size);
7bc2b9cd 1404 mr->ops = ops;
75f5941c 1405 mr->opaque = opaque;
d0a9b5bc 1406 mr->terminates = true;
75c578dc 1407 mr->rom_device = true;
d0a9b5bc 1408 mr->destructor = memory_region_destructor_rom_device;
8e41fb63 1409 mr->ram_block = qemu_ram_alloc(size, mr, errp);
d0a9b5bc
AK
1410}
1411
30951157 1412void memory_region_init_iommu(MemoryRegion *mr,
2c9b15ca 1413 Object *owner,
30951157
AK
1414 const MemoryRegionIOMMUOps *ops,
1415 const char *name,
1416 uint64_t size)
1417{
2c9b15ca 1418 memory_region_init(mr, owner, name, size);
30951157
AK
1419 mr->iommu_ops = ops,
1420 mr->terminates = true; /* then re-forwards */
06866575 1421 notifier_list_init(&mr->iommu_notify);
30951157
AK
1422}
1423
b4fefef9 1424static void memory_region_finalize(Object *obj)
093bc2cd 1425{
b4fefef9
PC
1426 MemoryRegion *mr = MEMORY_REGION(obj);
1427
2e2b8eb7
PB
1428 assert(!mr->container);
1429
1430 /* We know the region is not visible in any address space (it
1431 * does not have a container and cannot be a root either because
1432 * it has no references, so we can blindly clear mr->enabled.
1433 * memory_region_set_enabled instead could trigger a transaction
1434 * and cause an infinite loop.
1435 */
1436 mr->enabled = false;
1437 memory_region_transaction_begin();
1438 while (!QTAILQ_EMPTY(&mr->subregions)) {
1439 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1440 memory_region_del_subregion(mr, subregion);
1441 }
1442 memory_region_transaction_commit();
1443
545e92e0 1444 mr->destructor(mr);
093bc2cd 1445 memory_region_clear_coalescing(mr);
302fa283 1446 g_free((char *)mr->name);
7267c094 1447 g_free(mr->ioeventfds);
093bc2cd
AK
1448}
1449
803c0816
PB
1450Object *memory_region_owner(MemoryRegion *mr)
1451{
22a893e4
PB
1452 Object *obj = OBJECT(mr);
1453 return obj->parent;
803c0816
PB
1454}
1455
46637be2
PB
1456void memory_region_ref(MemoryRegion *mr)
1457{
22a893e4
PB
1458 /* MMIO callbacks most likely will access data that belongs
1459 * to the owner, hence the need to ref/unref the owner whenever
1460 * the memory region is in use.
1461 *
1462 * The memory region is a child of its owner. As long as the
1463 * owner doesn't call unparent itself on the memory region,
1464 * ref-ing the owner will also keep the memory region alive.
612263cf
PB
1465 * Memory regions without an owner are supposed to never go away;
1466 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1467 */
612263cf
PB
1468 if (mr && mr->owner) {
1469 object_ref(mr->owner);
46637be2
PB
1470 }
1471}
1472
1473void memory_region_unref(MemoryRegion *mr)
1474{
612263cf
PB
1475 if (mr && mr->owner) {
1476 object_unref(mr->owner);
46637be2
PB
1477 }
1478}
1479
093bc2cd
AK
1480uint64_t memory_region_size(MemoryRegion *mr)
1481{
08dafab4
AK
1482 if (int128_eq(mr->size, int128_2_64())) {
1483 return UINT64_MAX;
1484 }
1485 return int128_get64(mr->size);
093bc2cd
AK
1486}
1487
5d546d4b 1488const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1489{
d1dd32af
PC
1490 if (!mr->name) {
1491 ((MemoryRegion *)mr)->name =
1492 object_get_canonical_path_component(OBJECT(mr));
1493 }
302fa283 1494 return mr->name;
8991c79b
AK
1495}
1496
e4dc3f59
ND
1497bool memory_region_is_skip_dump(MemoryRegion *mr)
1498{
1499 return mr->skip_dump;
1500}
1501
2d1a35be 1502uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1503{
6f6a5ef3
PB
1504 uint8_t mask = mr->dirty_log_mask;
1505 if (global_dirty_log) {
1506 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1507 }
1508 return mask;
55043ba3
AK
1509}
1510
2d1a35be
PB
1511bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1512{
1513 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1514}
1515
06866575
DG
1516void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1517{
d22d8956
AK
1518 if (mr->iommu_ops->notify_started &&
1519 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1520 mr->iommu_ops->notify_started(mr);
1521 }
06866575
DG
1522 notifier_list_add(&mr->iommu_notify, n);
1523}
1524
f682e9c2 1525uint64_t memory_region_iommu_get_min_page_size(MemoryRegion *mr)
a788f227 1526{
f682e9c2
AK
1527 assert(memory_region_is_iommu(mr));
1528 if (mr->iommu_ops && mr->iommu_ops->get_min_page_size) {
1529 return mr->iommu_ops->get_min_page_size(mr);
1530 }
1531 return TARGET_PAGE_SIZE;
1532}
1533
1534void memory_region_iommu_replay(MemoryRegion *mr, Notifier *n, bool is_write)
1535{
1536 hwaddr addr, granularity;
a788f227
DG
1537 IOMMUTLBEntry iotlb;
1538
f682e9c2
AK
1539 granularity = memory_region_iommu_get_min_page_size(mr);
1540
a788f227
DG
1541 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
1542 iotlb = mr->iommu_ops->translate(mr, addr, is_write);
1543 if (iotlb.perm != IOMMU_NONE) {
1544 n->notify(n, &iotlb);
1545 }
1546
1547 /* if (2^64 - MR size) < granularity, it's possible to get an
1548 * infinite loop here. This should catch such a wraparound */
1549 if ((addr + granularity) < addr) {
1550 break;
1551 }
1552 }
1553}
1554
d22d8956 1555void memory_region_unregister_iommu_notifier(MemoryRegion *mr, Notifier *n)
06866575
DG
1556{
1557 notifier_remove(n);
d22d8956
AK
1558 if (mr->iommu_ops->notify_stopped &&
1559 QLIST_EMPTY(&mr->iommu_notify.notifiers)) {
1560 mr->iommu_ops->notify_stopped(mr);
1561 }
06866575
DG
1562}
1563
1564void memory_region_notify_iommu(MemoryRegion *mr,
1565 IOMMUTLBEntry entry)
1566{
1567 assert(memory_region_is_iommu(mr));
1568 notifier_list_notify(&mr->iommu_notify, &entry);
1569}
1570
093bc2cd
AK
1571void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1572{
5a583347 1573 uint8_t mask = 1 << client;
deb809ed 1574 uint8_t old_logging;
5a583347 1575
dbddac6d 1576 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB
1577 old_logging = mr->vga_logging_count;
1578 mr->vga_logging_count += log ? 1 : -1;
1579 if (!!old_logging == !!mr->vga_logging_count) {
1580 return;
1581 }
1582
59023ef4 1583 memory_region_transaction_begin();
5a583347 1584 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 1585 memory_region_update_pending |= mr->enabled;
59023ef4 1586 memory_region_transaction_commit();
093bc2cd
AK
1587}
1588
a8170e5e
AK
1589bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1590 hwaddr size, unsigned client)
093bc2cd 1591{
8e41fb63
FZ
1592 assert(mr->ram_block);
1593 return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
1594 size, client);
093bc2cd
AK
1595}
1596
a8170e5e
AK
1597void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1598 hwaddr size)
093bc2cd 1599{
8e41fb63
FZ
1600 assert(mr->ram_block);
1601 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
1602 size,
58d2707e 1603 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK
1604}
1605
6c279db8
JQ
1606bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1607 hwaddr size, unsigned client)
1608{
8e41fb63
FZ
1609 assert(mr->ram_block);
1610 return cpu_physical_memory_test_and_clear_dirty(
1611 memory_region_get_ram_addr(mr) + addr, size, client);
6c279db8
JQ
1612}
1613
1614
093bc2cd
AK
1615void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1616{
0d673e36 1617 AddressSpace *as;
5a583347
AK
1618 FlatRange *fr;
1619
0d673e36 1620 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856d7245 1621 FlatView *view = address_space_get_flatview(as);
99e86347 1622 FOR_EACH_FLAT_RANGE(fr, view) {
0d673e36
AK
1623 if (fr->mr == mr) {
1624 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1625 }
5a583347 1626 }
856d7245 1627 flatview_unref(view);
5a583347 1628 }
093bc2cd
AK
1629}
1630
1631void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1632{
fb1cd6f9 1633 if (mr->readonly != readonly) {
59023ef4 1634 memory_region_transaction_begin();
fb1cd6f9 1635 mr->readonly = readonly;
22bde714 1636 memory_region_update_pending |= mr->enabled;
59023ef4 1637 memory_region_transaction_commit();
fb1cd6f9 1638 }
093bc2cd
AK
1639}
1640
5f9a5ea1 1641void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 1642{
5f9a5ea1 1643 if (mr->romd_mode != romd_mode) {
59023ef4 1644 memory_region_transaction_begin();
5f9a5ea1 1645 mr->romd_mode = romd_mode;
22bde714 1646 memory_region_update_pending |= mr->enabled;
59023ef4 1647 memory_region_transaction_commit();
d0a9b5bc
AK
1648 }
1649}
1650
a8170e5e
AK
1651void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1652 hwaddr size, unsigned client)
093bc2cd 1653{
8e41fb63
FZ
1654 assert(mr->ram_block);
1655 cpu_physical_memory_test_and_clear_dirty(
1656 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK
1657}
1658
a35ba7be
PB
1659int memory_region_get_fd(MemoryRegion *mr)
1660{
4ff87573
PB
1661 int fd;
1662
1663 rcu_read_lock();
1664 while (mr->alias) {
1665 mr = mr->alias;
a35ba7be 1666 }
4ff87573
PB
1667 fd = mr->ram_block->fd;
1668 rcu_read_unlock();
a35ba7be 1669
4ff87573
PB
1670 return fd;
1671}
a35ba7be 1672
4ff87573
PB
1673void memory_region_set_fd(MemoryRegion *mr, int fd)
1674{
1675 rcu_read_lock();
1676 while (mr->alias) {
1677 mr = mr->alias;
1678 }
1679 mr->ram_block->fd = fd;
1680 rcu_read_unlock();
a35ba7be
PB
1681}
1682
093bc2cd
AK
1683void *memory_region_get_ram_ptr(MemoryRegion *mr)
1684{
49b24afc
PB
1685 void *ptr;
1686 uint64_t offset = 0;
093bc2cd 1687
49b24afc
PB
1688 rcu_read_lock();
1689 while (mr->alias) {
1690 offset += mr->alias_offset;
1691 mr = mr->alias;
1692 }
8e41fb63 1693 assert(mr->ram_block);
0878d0e1 1694 ptr = qemu_map_ram_ptr(mr->ram_block, offset);
49b24afc 1695 rcu_read_unlock();
093bc2cd 1696
0878d0e1 1697 return ptr;
093bc2cd
AK
1698}
1699
07bdaa41
PB
1700MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
1701{
1702 RAMBlock *block;
1703
1704 block = qemu_ram_block_from_host(ptr, false, offset);
1705 if (!block) {
1706 return NULL;
1707 }
1708
1709 return block->mr;
1710}
1711
7ebb2745
FZ
1712ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1713{
1714 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
1715}
1716
37d7c084
PB
1717void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1718{
8e41fb63 1719 assert(mr->ram_block);
37d7c084 1720
fa53a0e5 1721 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB
1722}
1723
0d673e36 1724static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
093bc2cd 1725{
99e86347 1726 FlatView *view;
093bc2cd
AK
1727 FlatRange *fr;
1728 CoalescedMemoryRange *cmr;
1729 AddrRange tmp;
95d2994a 1730 MemoryRegionSection section;
093bc2cd 1731
856d7245 1732 view = address_space_get_flatview(as);
99e86347 1733 FOR_EACH_FLAT_RANGE(fr, view) {
093bc2cd 1734 if (fr->mr == mr) {
95d2994a 1735 section = (MemoryRegionSection) {
f6790af6 1736 .address_space = as,
95d2994a 1737 .offset_within_address_space = int128_get64(fr->addr.start),
052e87b0 1738 .size = fr->addr.size,
95d2994a
AK
1739 };
1740
1741 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1742 int128_get64(fr->addr.start),
1743 int128_get64(fr->addr.size));
093bc2cd
AK
1744 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1745 tmp = addrrange_shift(cmr->addr,
08dafab4
AK
1746 int128_sub(fr->addr.start,
1747 int128_make64(fr->offset_in_region)));
093bc2cd
AK
1748 if (!addrrange_intersects(tmp, fr->addr)) {
1749 continue;
1750 }
1751 tmp = addrrange_intersection(tmp, fr->addr);
95d2994a
AK
1752 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1753 int128_get64(tmp.start),
1754 int128_get64(tmp.size));
093bc2cd
AK
1755 }
1756 }
1757 }
856d7245 1758 flatview_unref(view);
093bc2cd
AK
1759}
1760
0d673e36
AK
1761static void memory_region_update_coalesced_range(MemoryRegion *mr)
1762{
1763 AddressSpace *as;
1764
1765 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1766 memory_region_update_coalesced_range_as(mr, as);
1767 }
1768}
1769
093bc2cd
AK
1770void memory_region_set_coalescing(MemoryRegion *mr)
1771{
1772 memory_region_clear_coalescing(mr);
08dafab4 1773 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
1774}
1775
1776void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 1777 hwaddr offset,
093bc2cd
AK
1778 uint64_t size)
1779{
7267c094 1780 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 1781
08dafab4 1782 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd
AK
1783 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1784 memory_region_update_coalesced_range(mr);
d410515e 1785 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
1786}
1787
1788void memory_region_clear_coalescing(MemoryRegion *mr)
1789{
1790 CoalescedMemoryRange *cmr;
ab5b3db5 1791 bool updated = false;
093bc2cd 1792
d410515e
JK
1793 qemu_flush_coalesced_mmio_buffer();
1794 mr->flush_coalesced_mmio = false;
1795
093bc2cd
AK
1796 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1797 cmr = QTAILQ_FIRST(&mr->coalesced);
1798 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
7267c094 1799 g_free(cmr);
ab5b3db5
FZ
1800 updated = true;
1801 }
1802
1803 if (updated) {
1804 memory_region_update_coalesced_range(mr);
093bc2cd 1805 }
093bc2cd
AK
1806}
1807
d410515e
JK
1808void memory_region_set_flush_coalesced(MemoryRegion *mr)
1809{
1810 mr->flush_coalesced_mmio = true;
1811}
1812
1813void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1814{
1815 qemu_flush_coalesced_mmio_buffer();
1816 if (QTAILQ_EMPTY(&mr->coalesced)) {
1817 mr->flush_coalesced_mmio = false;
1818 }
1819}
1820
196ea131
JK
1821void memory_region_set_global_locking(MemoryRegion *mr)
1822{
1823 mr->global_locking = true;
1824}
1825
1826void memory_region_clear_global_locking(MemoryRegion *mr)
1827{
1828 mr->global_locking = false;
1829}
1830
8c56c1a5
PF
1831static bool userspace_eventfd_warning;
1832
3e9d69e7 1833void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 1834 hwaddr addr,
3e9d69e7
AK
1835 unsigned size,
1836 bool match_data,
1837 uint64_t data,
753d5e14 1838 EventNotifier *e)
3e9d69e7
AK
1839{
1840 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1841 .addr.start = int128_make64(addr),
1842 .addr.size = int128_make64(size),
3e9d69e7
AK
1843 .match_data = match_data,
1844 .data = data,
753d5e14 1845 .e = e,
3e9d69e7
AK
1846 };
1847 unsigned i;
1848
8c56c1a5
PF
1849 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
1850 userspace_eventfd_warning))) {
1851 userspace_eventfd_warning = true;
1852 error_report("Using eventfd without MMIO binding in KVM. "
1853 "Suboptimal performance expected");
1854 }
1855
b8aecea2
JW
1856 if (size) {
1857 adjust_endianness(mr, &mrfd.data, size);
1858 }
59023ef4 1859 memory_region_transaction_begin();
3e9d69e7
AK
1860 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1861 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1862 break;
1863 }
1864 }
1865 ++mr->ioeventfd_nb;
7267c094 1866 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
1867 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1868 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1869 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1870 mr->ioeventfds[i] = mrfd;
4dc56152 1871 ioeventfd_update_pending |= mr->enabled;
59023ef4 1872 memory_region_transaction_commit();
3e9d69e7
AK
1873}
1874
1875void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 1876 hwaddr addr,
3e9d69e7
AK
1877 unsigned size,
1878 bool match_data,
1879 uint64_t data,
753d5e14 1880 EventNotifier *e)
3e9d69e7
AK
1881{
1882 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
1883 .addr.start = int128_make64(addr),
1884 .addr.size = int128_make64(size),
3e9d69e7
AK
1885 .match_data = match_data,
1886 .data = data,
753d5e14 1887 .e = e,
3e9d69e7
AK
1888 };
1889 unsigned i;
1890
b8aecea2
JW
1891 if (size) {
1892 adjust_endianness(mr, &mrfd.data, size);
1893 }
59023ef4 1894 memory_region_transaction_begin();
3e9d69e7
AK
1895 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1896 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1897 break;
1898 }
1899 }
1900 assert(i != mr->ioeventfd_nb);
1901 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1902 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1903 --mr->ioeventfd_nb;
7267c094 1904 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 1905 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 1906 ioeventfd_update_pending |= mr->enabled;
59023ef4 1907 memory_region_transaction_commit();
3e9d69e7
AK
1908}
1909
feca4ac1 1910static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 1911{
feca4ac1 1912 MemoryRegion *mr = subregion->container;
093bc2cd
AK
1913 MemoryRegion *other;
1914
59023ef4
JK
1915 memory_region_transaction_begin();
1916
dfde4e6e 1917 memory_region_ref(subregion);
093bc2cd
AK
1918 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1919 if (subregion->priority >= other->priority) {
1920 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1921 goto done;
1922 }
1923 }
1924 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1925done:
22bde714 1926 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1927 memory_region_transaction_commit();
093bc2cd
AK
1928}
1929
0598701a
PC
1930static void memory_region_add_subregion_common(MemoryRegion *mr,
1931 hwaddr offset,
1932 MemoryRegion *subregion)
1933{
feca4ac1
PB
1934 assert(!subregion->container);
1935 subregion->container = mr;
0598701a 1936 subregion->addr = offset;
feca4ac1 1937 memory_region_update_container_subregions(subregion);
0598701a 1938}
093bc2cd
AK
1939
1940void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 1941 hwaddr offset,
093bc2cd
AK
1942 MemoryRegion *subregion)
1943{
093bc2cd
AK
1944 subregion->priority = 0;
1945 memory_region_add_subregion_common(mr, offset, subregion);
1946}
1947
1948void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 1949 hwaddr offset,
093bc2cd 1950 MemoryRegion *subregion,
a1ff8ae0 1951 int priority)
093bc2cd 1952{
093bc2cd
AK
1953 subregion->priority = priority;
1954 memory_region_add_subregion_common(mr, offset, subregion);
1955}
1956
1957void memory_region_del_subregion(MemoryRegion *mr,
1958 MemoryRegion *subregion)
1959{
59023ef4 1960 memory_region_transaction_begin();
feca4ac1
PB
1961 assert(subregion->container == mr);
1962 subregion->container = NULL;
093bc2cd 1963 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 1964 memory_region_unref(subregion);
22bde714 1965 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 1966 memory_region_transaction_commit();
6bba19ba
AK
1967}
1968
1969void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1970{
1971 if (enabled == mr->enabled) {
1972 return;
1973 }
59023ef4 1974 memory_region_transaction_begin();
6bba19ba 1975 mr->enabled = enabled;
22bde714 1976 memory_region_update_pending = true;
59023ef4 1977 memory_region_transaction_commit();
093bc2cd 1978}
1c0ffa58 1979
e7af4c67
MT
1980void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1981{
1982 Int128 s = int128_make64(size);
1983
1984 if (size == UINT64_MAX) {
1985 s = int128_2_64();
1986 }
1987 if (int128_eq(s, mr->size)) {
1988 return;
1989 }
1990 memory_region_transaction_begin();
1991 mr->size = s;
1992 memory_region_update_pending = true;
1993 memory_region_transaction_commit();
1994}
1995
67891b8a 1996static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 1997{
feca4ac1 1998 MemoryRegion *container = mr->container;
2282e1af 1999
feca4ac1 2000 if (container) {
67891b8a
PC
2001 memory_region_transaction_begin();
2002 memory_region_ref(mr);
feca4ac1
PB
2003 memory_region_del_subregion(container, mr);
2004 mr->container = container;
2005 memory_region_update_container_subregions(mr);
67891b8a
PC
2006 memory_region_unref(mr);
2007 memory_region_transaction_commit();
2282e1af 2008 }
67891b8a 2009}
2282e1af 2010
67891b8a
PC
2011void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2012{
2013 if (addr != mr->addr) {
2014 mr->addr = addr;
2015 memory_region_readd_subregion(mr);
2016 }
2282e1af
AK
2017}
2018
a8170e5e 2019void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 2020{
4703359e 2021 assert(mr->alias);
4703359e 2022
59023ef4 2023 if (offset == mr->alias_offset) {
4703359e
AK
2024 return;
2025 }
2026
59023ef4
JK
2027 memory_region_transaction_begin();
2028 mr->alias_offset = offset;
22bde714 2029 memory_region_update_pending |= mr->enabled;
59023ef4 2030 memory_region_transaction_commit();
4703359e
AK
2031}
2032
a2b257d6
IM
2033uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2034{
2035 return mr->align;
2036}
2037
e2177955
AK
2038static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2039{
2040 const AddrRange *addr = addr_;
2041 const FlatRange *fr = fr_;
2042
2043 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2044 return -1;
2045 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2046 return 1;
2047 }
2048 return 0;
2049}
2050
99e86347 2051static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2052{
99e86347 2053 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
2054 sizeof(FlatRange), cmp_flatrange_addr);
2055}
2056
eed2bacf
IM
2057bool memory_region_is_mapped(MemoryRegion *mr)
2058{
2059 return mr->container ? true : false;
2060}
2061
c6742b14
PB
2062/* Same as memory_region_find, but it does not add a reference to the
2063 * returned region. It must be called from an RCU critical section.
2064 */
2065static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2066 hwaddr addr, uint64_t size)
e2177955 2067{
052e87b0 2068 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
2069 MemoryRegion *root;
2070 AddressSpace *as;
2071 AddrRange range;
99e86347 2072 FlatView *view;
73034e9e
PB
2073 FlatRange *fr;
2074
2075 addr += mr->addr;
feca4ac1
PB
2076 for (root = mr; root->container; ) {
2077 root = root->container;
73034e9e
PB
2078 addr += root->addr;
2079 }
e2177955 2080
73034e9e 2081 as = memory_region_to_address_space(root);
eed2bacf
IM
2082 if (!as) {
2083 return ret;
2084 }
73034e9e 2085 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2086
2b647668 2087 view = atomic_rcu_read(&as->current_map);
99e86347 2088 fr = flatview_lookup(view, range);
e2177955 2089 if (!fr) {
c6742b14 2090 return ret;
e2177955
AK
2091 }
2092
99e86347 2093 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
2094 --fr;
2095 }
2096
2097 ret.mr = fr->mr;
73034e9e 2098 ret.address_space = as;
e2177955
AK
2099 range = addrrange_intersection(range, fr->addr);
2100 ret.offset_within_region = fr->offset_in_region;
2101 ret.offset_within_region += int128_get64(int128_sub(range.start,
2102 fr->addr.start));
052e87b0 2103 ret.size = range.size;
e2177955 2104 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2105 ret.readonly = fr->readonly;
c6742b14
PB
2106 return ret;
2107}
2108
2109MemoryRegionSection memory_region_find(MemoryRegion *mr,
2110 hwaddr addr, uint64_t size)
2111{
2112 MemoryRegionSection ret;
2113 rcu_read_lock();
2114 ret = memory_region_find_rcu(mr, addr, size);
2115 if (ret.mr) {
2116 memory_region_ref(ret.mr);
2117 }
2b647668 2118 rcu_read_unlock();
e2177955
AK
2119 return ret;
2120}
2121
c6742b14
PB
2122bool memory_region_present(MemoryRegion *container, hwaddr addr)
2123{
2124 MemoryRegion *mr;
2125
2126 rcu_read_lock();
2127 mr = memory_region_find_rcu(container, addr, 1).mr;
2128 rcu_read_unlock();
2129 return mr && mr != container;
2130}
2131
1d671369 2132void address_space_sync_dirty_bitmap(AddressSpace *as)
86e775c6 2133{
99e86347 2134 FlatView *view;
7664e80c
AK
2135 FlatRange *fr;
2136
856d7245 2137 view = address_space_get_flatview(as);
99e86347 2138 FOR_EACH_FLAT_RANGE(fr, view) {
72e22d2f 2139 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
7664e80c 2140 }
856d7245 2141 flatview_unref(view);
7664e80c
AK
2142}
2143
2144void memory_global_dirty_log_start(void)
2145{
7664e80c 2146 global_dirty_log = true;
6f6a5ef3 2147
7376e582 2148 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
6f6a5ef3
PB
2149
2150 /* Refresh DIRTY_LOG_MIGRATION bit. */
2151 memory_region_transaction_begin();
2152 memory_region_update_pending = true;
2153 memory_region_transaction_commit();
7664e80c
AK
2154}
2155
2156void memory_global_dirty_log_stop(void)
2157{
7664e80c 2158 global_dirty_log = false;
6f6a5ef3
PB
2159
2160 /* Refresh DIRTY_LOG_MIGRATION bit. */
2161 memory_region_transaction_begin();
2162 memory_region_update_pending = true;
2163 memory_region_transaction_commit();
2164
7376e582 2165 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
7664e80c
AK
2166}
2167
2168static void listener_add_address_space(MemoryListener *listener,
2169 AddressSpace *as)
2170{
99e86347 2171 FlatView *view;
7664e80c
AK
2172 FlatRange *fr;
2173
221b3a3f 2174 if (listener->address_space_filter
f6790af6 2175 && listener->address_space_filter != as) {
221b3a3f
JG
2176 return;
2177 }
2178
680a4783
PB
2179 if (listener->begin) {
2180 listener->begin(listener);
2181 }
7664e80c 2182 if (global_dirty_log) {
975aefe0
AK
2183 if (listener->log_global_start) {
2184 listener->log_global_start(listener);
2185 }
7664e80c 2186 }
975aefe0 2187
856d7245 2188 view = address_space_get_flatview(as);
99e86347 2189 FOR_EACH_FLAT_RANGE(fr, view) {
7664e80c
AK
2190 MemoryRegionSection section = {
2191 .mr = fr->mr,
f6790af6 2192 .address_space = as,
7664e80c 2193 .offset_within_region = fr->offset_in_region,
052e87b0 2194 .size = fr->addr.size,
7664e80c 2195 .offset_within_address_space = int128_get64(fr->addr.start),
7a8499e8 2196 .readonly = fr->readonly,
7664e80c 2197 };
680a4783
PB
2198 if (fr->dirty_log_mask && listener->log_start) {
2199 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2200 }
975aefe0
AK
2201 if (listener->region_add) {
2202 listener->region_add(listener, &section);
2203 }
7664e80c 2204 }
680a4783
PB
2205 if (listener->commit) {
2206 listener->commit(listener);
2207 }
856d7245 2208 flatview_unref(view);
7664e80c
AK
2209}
2210
f6790af6 2211void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
7664e80c 2212{
72e22d2f 2213 MemoryListener *other = NULL;
0d673e36 2214 AddressSpace *as;
72e22d2f 2215
7376e582 2216 listener->address_space_filter = filter;
72e22d2f
AK
2217 if (QTAILQ_EMPTY(&memory_listeners)
2218 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2219 memory_listeners)->priority) {
2220 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2221 } else {
2222 QTAILQ_FOREACH(other, &memory_listeners, link) {
2223 if (listener->priority < other->priority) {
2224 break;
2225 }
2226 }
2227 QTAILQ_INSERT_BEFORE(other, listener, link);
2228 }
0d673e36
AK
2229
2230 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2231 listener_add_address_space(listener, as);
2232 }
7664e80c
AK
2233}
2234
2235void memory_listener_unregister(MemoryListener *listener)
2236{
72e22d2f 2237 QTAILQ_REMOVE(&memory_listeners, listener, link);
86e775c6 2238}
e2177955 2239
7dca8043 2240void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 2241{
ac95190e 2242 memory_region_ref(root);
59023ef4 2243 memory_region_transaction_begin();
f0c02d15 2244 as->ref_count = 1;
8786db7c 2245 as->root = root;
f0c02d15 2246 as->malloced = false;
8786db7c
AK
2247 as->current_map = g_new(FlatView, 1);
2248 flatview_init(as->current_map);
4c19eb72
AK
2249 as->ioeventfd_nb = 0;
2250 as->ioeventfds = NULL;
0d673e36 2251 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 2252 as->name = g_strdup(name ? name : "anonymous");
ac1970fb 2253 address_space_init_dispatch(as);
f43793c7
PB
2254 memory_region_update_pending |= root->enabled;
2255 memory_region_transaction_commit();
1c0ffa58 2256}
658b2224 2257
374f2981 2258static void do_address_space_destroy(AddressSpace *as)
83f3c251 2259{
078c44f4 2260 MemoryListener *listener;
f0c02d15 2261 bool do_free = as->malloced;
078c44f4 2262
83f3c251 2263 address_space_destroy_dispatch(as);
078c44f4
DG
2264
2265 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2266 assert(listener->address_space_filter != as);
2267 }
2268
856d7245 2269 flatview_unref(as->current_map);
7dca8043 2270 g_free(as->name);
4c19eb72 2271 g_free(as->ioeventfds);
ac95190e 2272 memory_region_unref(as->root);
f0c02d15
PC
2273 if (do_free) {
2274 g_free(as);
2275 }
2276}
2277
2278AddressSpace *address_space_init_shareable(MemoryRegion *root, const char *name)
2279{
2280 AddressSpace *as;
2281
2282 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2283 if (root == as->root && as->malloced) {
2284 as->ref_count++;
2285 return as;
2286 }
2287 }
2288
2289 as = g_malloc0(sizeof *as);
2290 address_space_init(as, root, name);
2291 as->malloced = true;
2292 return as;
83f3c251
AK
2293}
2294
374f2981
PB
2295void address_space_destroy(AddressSpace *as)
2296{
ac95190e
PB
2297 MemoryRegion *root = as->root;
2298
f0c02d15
PC
2299 as->ref_count--;
2300 if (as->ref_count) {
2301 return;
2302 }
374f2981
PB
2303 /* Flush out anything from MemoryListeners listening in on this */
2304 memory_region_transaction_begin();
2305 as->root = NULL;
2306 memory_region_transaction_commit();
2307 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
6e48e8f9 2308 address_space_unregister(as);
374f2981
PB
2309
2310 /* At this point, as->dispatch and as->current_map are dummy
2311 * entries that the guest should never use. Wait for the old
2312 * values to expire before freeing the data.
2313 */
ac95190e 2314 as->root = root;
374f2981
PB
2315 call_rcu(as, do_address_space_destroy, rcu);
2316}
2317
314e2987
BS
2318typedef struct MemoryRegionList MemoryRegionList;
2319
2320struct MemoryRegionList {
2321 const MemoryRegion *mr;
314e2987
BS
2322 QTAILQ_ENTRY(MemoryRegionList) queue;
2323};
2324
2325typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2326
2327static void mtree_print_mr(fprintf_function mon_printf, void *f,
2328 const MemoryRegion *mr, unsigned int level,
a8170e5e 2329 hwaddr base,
9479c57a 2330 MemoryRegionListHead *alias_print_queue)
314e2987 2331{
9479c57a
JK
2332 MemoryRegionList *new_ml, *ml, *next_ml;
2333 MemoryRegionListHead submr_print_queue;
314e2987
BS
2334 const MemoryRegion *submr;
2335 unsigned int i;
2336
f8a9f720 2337 if (!mr) {
314e2987
BS
2338 return;
2339 }
2340
2341 for (i = 0; i < level; i++) {
2342 mon_printf(f, " ");
2343 }
2344
2345 if (mr->alias) {
2346 MemoryRegionList *ml;
2347 bool found = false;
2348
2349 /* check if the alias is already in the queue */
9479c57a 2350 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
f54bb15f 2351 if (ml->mr == mr->alias) {
314e2987
BS
2352 found = true;
2353 }
2354 }
2355
2356 if (!found) {
2357 ml = g_new(MemoryRegionList, 1);
2358 ml->mr = mr->alias;
9479c57a 2359 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
314e2987 2360 }
4896d74b
JK
2361 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2362 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
f8a9f720 2363 "-" TARGET_FMT_plx "%s\n",
314e2987 2364 base + mr->addr,
08dafab4 2365 base + mr->addr
fd1d9926
AW
2366 + (int128_nz(mr->size) ?
2367 (hwaddr)int128_get64(int128_sub(mr->size,
2368 int128_one())) : 0),
4b474ba7 2369 mr->priority,
5f9a5ea1
JK
2370 mr->romd_mode ? 'R' : '-',
2371 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2372 : '-',
3fb18b4d
PC
2373 memory_region_name(mr),
2374 memory_region_name(mr->alias),
314e2987 2375 mr->alias_offset,
08dafab4 2376 mr->alias_offset
a66670c7
AK
2377 + (int128_nz(mr->size) ?
2378 (hwaddr)int128_get64(int128_sub(mr->size,
f8a9f720
GH
2379 int128_one())) : 0),
2380 mr->enabled ? "" : " [disabled]");
314e2987 2381 } else {
4896d74b 2382 mon_printf(f,
f8a9f720 2383 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
314e2987 2384 base + mr->addr,
08dafab4 2385 base + mr->addr
fd1d9926
AW
2386 + (int128_nz(mr->size) ?
2387 (hwaddr)int128_get64(int128_sub(mr->size,
2388 int128_one())) : 0),
4b474ba7 2389 mr->priority,
5f9a5ea1
JK
2390 mr->romd_mode ? 'R' : '-',
2391 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2392 : '-',
f8a9f720
GH
2393 memory_region_name(mr),
2394 mr->enabled ? "" : " [disabled]");
314e2987 2395 }
9479c57a
JK
2396
2397 QTAILQ_INIT(&submr_print_queue);
2398
314e2987 2399 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
2400 new_ml = g_new(MemoryRegionList, 1);
2401 new_ml->mr = submr;
2402 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2403 if (new_ml->mr->addr < ml->mr->addr ||
2404 (new_ml->mr->addr == ml->mr->addr &&
2405 new_ml->mr->priority > ml->mr->priority)) {
2406 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2407 new_ml = NULL;
2408 break;
2409 }
2410 }
2411 if (new_ml) {
2412 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2413 }
2414 }
2415
2416 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2417 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2418 alias_print_queue);
2419 }
2420
88365e47 2421 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
9479c57a 2422 g_free(ml);
314e2987
BS
2423 }
2424}
2425
2426void mtree_info(fprintf_function mon_printf, void *f)
2427{
2428 MemoryRegionListHead ml_head;
2429 MemoryRegionList *ml, *ml2;
0d673e36 2430 AddressSpace *as;
314e2987
BS
2431
2432 QTAILQ_INIT(&ml_head);
2433
0d673e36 2434 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
e48816aa
GH
2435 mon_printf(f, "address-space: %s\n", as->name);
2436 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2437 mon_printf(f, "\n");
b9f9be88
BS
2438 }
2439
314e2987
BS
2440 /* print aliased regions */
2441 QTAILQ_FOREACH(ml, &ml_head, queue) {
e48816aa
GH
2442 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2443 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2444 mon_printf(f, "\n");
314e2987
BS
2445 }
2446
2447 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
88365e47 2448 g_free(ml);
314e2987 2449 }
314e2987 2450}
b4fefef9
PC
2451
2452static const TypeInfo memory_region_info = {
2453 .parent = TYPE_OBJECT,
2454 .name = TYPE_MEMORY_REGION,
2455 .instance_size = sizeof(MemoryRegion),
2456 .instance_init = memory_region_initfn,
2457 .instance_finalize = memory_region_finalize,
2458};
2459
2460static void memory_register_types(void)
2461{
2462 type_register_static(&memory_region_info);
2463}
2464
2465type_init(memory_register_types)